DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This Office Action acknowledges the applicant’s amendment filed on 10/30/2025. Claims 1-10 are pending in the application. Claims 10 is withdrawn from consideration.
The text of those sections of Title 35, U.S. code not included in this action can be found in a prior Office Action.
Claim Rejections - 35 USC § 102
Claim(s) 1-9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yajima et al. 2007/0284282 A1.
With regards to claim 1, Yajima (Fig. 8A and 8B) discloses a wafer housing container, comprising: two or more chassis frames 10 stacked on each other; and at least one wafer holding structure formed between the two or more chassis frames, wherein the wafer holding structure includes a plurality of arms 14/27/28 extending from each of the two or more chassis frames on both of two opposing sides of the wafer holding structure, the wafer holding structure being configured to sandwich an outer edge portion of a wafer with the plurality of arms on one of the two or more chassis frames on one side of the wafer to hold the wafer and the plurality of arms on another one of the two or more chassis frames on another side of the wafer to hold the wafer. (Para. 0033 and 0039-0040)
With regards to claim 2, Yajima (Fig. 8A and 8B) discloses the two or more chassis frames 10 can be attached to and detached from each other.
With regards to claim 3, Yajima (Fig. 5, 8A and 8B) discloses three or more chassis frames which include the two or more chassis frames 10, wherein at least one intermediate chassis frame 10 (middle frame) in the three or more chassis frames stacked on each other includes the plurality of arms on both sides, and the wafer holding structure is formed on both of two opposing sides of the intermediate chassis frame.
With regards to claim 4, Yajima (Fig. 8A and 8B) discloses the three or more chassis frames 10 can be attached to and detached from each other, and a total number of the wafer holding structures can be changed by changing a total number of intermediate chassis frames.
With regards to claim 5, Yajima (Fig. 8A and 8B) discloses the wafer holding structure is configured such that a lateral portion of the wafer held by the wafer holding structure has four portions that are spaced from the two or more chassis frames 10 and spaced from the plurality of arms 14/27/28, depending on the wafer to be held.
The wafer holding structure of Yajima is capable of being configured to hold a wafer having a lateral portion that has four portions that are spaced from the two or more chassis frames and spaced from the plurality of arms, depending on the wafer to be held, since such a limitation is considered an intended use because the wafer is not being claimed.
With regards to claim 6, Yajima (Fig. 8A and 8B) discloses the plurality of arms 14/27/28 are capable of being disposed not to have contact with a position located on a lowermost side of the outer edge portion of the wafer while the wafer housing container is located so that a main surface of the wafer held by the wafer holding structure is configured to be directed to a lateral side, depending on the wafer to be held.
The plurality of arms of Yajima are capable of being disposed not to have contact with a position located on a lowermost side of the outer edge portion of the wafer while the wafer housing container is located so that a main surface of the wafer held by the wafer holding structure configured to be directed to a lateral side, depending on the wafer to be held and the position being referenced, since such a limitation is considered an intended use because the wafer is not being claimed.
With regards to claim 7, Yajima (Fig. 8A and 8B) discloses the plurality of arms 14/27/28 are capable of being disposed to be located so that a position located on a lowermost side of the outer edge portion of the wafer is located to be higher than a bottom of the wafer housing container while the wafer housing container is located so that a main surface of the wafer held by the wafer holding structure is configured to be directed to a lateral side, depending on the wafer to be held.
The plurality of arms of Yajima are capable of being disposed to be located so that a position located on a lowermost side of the outer edge portion of the wafer is located to be higher than a bottom of the wafer housing container while the wafer housing container is located so that a main surface of the wafer held by the wafer holding structure is configured to be directed to a lateral side, depending on the wafer to be held and the position being referenced, since such a limitation is considered an intended use because the wafer is not being claimed.
With regards to claim 8, Yajima (Fig. 8A and 8B) discloses at least one of the plurality of arms 14/27/28 is disposed to have contact with a position located on an upper side of a middle portion of the wafer while the wafer housing container is located so that a main surface of the wafer held by the wafer holding structure is configured to be directed to a lateral side, depending on the wafer to be held.
At least one of the plurality of arms of Yajima is capable of being disposed to have contact with a position located on an upper side of a middle portion of the wafer while the wafer housing container is located so that a main surface of the wafer held by the wafer holding structure is configured to be directed to a lateral side, depending on the wafer to be held and the position being referenced, since such a limitation is considered an intended use because the wafer is not being claimed.
With regards to claim 9, Yajima (Fig. 8A and 8B) discloses the plurality of arms 14/27/28 are capable of being configured to hold a bevel part as an outermost edge portion of the wafer and are configured to not have contact with a main surface of the wafer, depending on the wafer to be held.
The plurality of arms of Yajima are capable of being configured to hold a bevel part as an outermost edge portion of the wafer and are configured to not have contact with a main surface of the wafer, since such a limitation is considered an intended use because the wafer is not being claimed.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-9 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/JENINE SPICER/Examiner, Art Unit 3736
/ORLANDO E AVILES/Supervisory Patent Examiner, Art Unit 3736