Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: DETECTION MODULE FOR MEMORY LEAK DETECTION USING TEST COMMANDS REQUESTING MEMORY PARAMETERS PERTAINING TO QUANTITY OF ALLOCATED MEMORY BLOCKS FOR COMPARISON.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. The claims are directed to methods, and a detection module for detecting a memory leak by sending commands, collecting target memory values, and determining the presence/location of a leak based on data comparisons.
The claimed invention, when taken as a whole, is directed to the abstract idea of collecting and analyzing information and reporting a result, because: Sending commands to an electronic device to request memory parameters, receiving target values representing quantities and sizes of allocated memory blocks and associated code locations for first and second operations, comparing the first and second target values including comparing differences to a threshold and determining the existence and location of a memory leak based on the relative values and differences amounts to a process of collecting, analyzing, and evaluating data to reach a diagnostic conclusion which is an abstract idea under prong I step 2a .
The recited sending, receiving, determining, comparing, and ranking/locating operations are claimed at a high level of generality without any specific technical implementation beyond generic use of a detection module, electronic device, processor, memory and commands As such the claim recites mental processes and certain methods of organizing and evaluating information, diagnostic data, that fall within the abstract idea groupings of mental processes and methods of organizing human activity or diagnosis & decision-making based on collected information. Accordingly the claims recite an abstract idea
The claim(s) recite an electronic device, detection module, processor and memory, however generically recited computer elements do not add a meaningful limitation to the abstract idea because they amount to simply implementing the abstract idea on a computer.
This judicial exception is not integrated into a practical application because The additional elements in method claims 1-9 consist of steps that are performed by a detection module or performed by a first electronic device and reciting the sending and receiving of commands and target values between these entities. These elements amount to implementing the mental evaluation of memory usage on generic computer components and using generic messaging to move data between them which are mere instructions to apply the abstract idea using generic computer technology. As such the claim(s) do not include additional elements that are sufficient to amount to significantly more than the judicial exception because they merely implement the abstract idea using generic computer components and these are well-understood, routine, conventional computer functions as recognized by the court decisions listed in MPEP § 2106.05(d). As such, the claims do not amount to significantly more than the abstract idea.
Claims 10-14, 15-18 recite a detection module comprising a processor memory and a program or instructions that cause the module to perform the same abstract processing steps. The processor and memory are recited at a high level of generality and perform nothing more than generic computer functions of sending and receiving information and processing data according to conditional logic. Such generic computer implementation does not impose a meaningful limit on practicing the abstract idea
Claims 19-20 recite non transitory computer readable storage media storing a program or instructions that cause a processor to perform the abstract method steps of claims 1 and 6r. Storing instructions for implementing an abstract idea on a generic computer does not integrate the abstract idea into a practical application.
In conclusion, the claims do not recite a transformation of an article, nor do they add any meaningful limitations beyond generally linking the abstract idea to a technological environment of a generic first electronic device, detection module, & non-transitory computer readable storage medium. Thus the abstract idea is not integrated into a practical application and the claims do not include additional elements individually or in combination that amount to significantly more than the abstract idea itself,
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103(a) are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Qin (US PGPUB # 20150234700) in view of Zeng (US PGPUB # 20210334192). With respect to independent claims 1, 6, 10 Qin discloses: A detection method, wherein the method is performed by a detection module [method for detecting memory leaks - Qin 0009] and comprises:
sending a first command to a first electronic device, wherein the first command is used to request a first memory parameter of the first electronic device [administrative client begins a method for detecting memory leaks by transmitting, to a plurality of processes running on at least one computing device, a first command to return an indication of a memory allocation by each of the plurality of processes - Qin 0009, fig 5];
receiving a first target value sent by the first electronic device, wherein the first target value comprises a quantity of allocated memory blocks [a quantity of allocated memory blocks is not explicitly taught by Qin, although this limitations is suggested by Qin since number/quantity of allocated bytes (suggests blocks) of memory - Qin 0015, claim 3; receive memory allocation information from each process 520 - Qin fig 5. Nevertheless in the same field of endeavor Zeng teaches comparing a number/quantity of memory pages/blocks to determine if a memory leak has occurred – Zeng abstract, 0011, 0049; it is noted that a broadest reasonable interpretation of the claimed ‘blocks’ is coextensive in scope with the 4 KB memory areas comprised of memory pages – Zeng 0014, 0053] in the first electronic device in a case that the first electronic device performs a first operation [receives a first plurality of indications of memory allocation corresponding to the plurality of processes, and combines them into a first system wide memory allocation- Qin 0009, fig 5; memory indications 420 may include entries in a data structure that describe a process identifier (process ID), the user-defined memory type, and the number of allocated bytes of memory - Qin 0015] [acquiring the return addresses of the allocation functions of each of the plurality of memory pages and the number of the memory pages thereof; releasing the return addresses of the allocation functions and the number of the memory pages counted by the node; reading the node again, acquiring the return address of each of the allocation functions and the number of the memory pages thereof; comparing the number in each case to calculate a difference value, if the difference value is a positive value and monotonically increases, it's determined that the memory leak occurs in the memory pages allocated correspondingly by the allocation functions – Zeng abstract];
sending a second command to the first electronic device in a case that the first electronic device performs a second operation, wherein the second command is used to request a second memory parameter of the first electronic device [administrative client transmits an instruction to run a test case process, and then transmits, to each of the processes, a second command to return memory track information. The administrative client receives the second set of memory track information and combines it to generate a second system wide memory allocation. To generate a list of potential memory leaks originating from the test case process, the administrative client compares the first system wide memory allocation with the second system wide memory allocation - Qin abstract, fig 5];
receiving a second target value sent by the first electronic device, wherein the second target value comprises a quantity of allocated memory blocks in the first electronic device in the case that the first electronic device performs the second operation [receive memory allocation information from each process 560 - Qin fig 5; administrative client receives a second set of dumped memory allocation information at step 560. The second set of dumped memory allocation information is combined in step 570 to form a second system wide memory allocation. If the test case does not need to be run again, as determined in step 580, then the administrative client compares the first and second system wide memory allocations to generate memory leak candidates - Qin 0018] [second reading of number/quantity of pages/block of memory allocated - Zeng fig 1, abstract, 0011]; and
determining, in a case that the second target value is greater than the first target value, that there is a memory leak in the first electronic device [To generate a list of potential memory leaks originating from the test case process, the administrative client compares the first system wide memory allocation with the second system wide memory allocation - Qin abstract] [comparing the number in each case to calculate a difference value, if the difference value is a positive value and monotonically increases, it's determined that the memory leak occurs in the memory pages allocated correspondingly by the allocation functions – Zeng abstract].
Qin does not explicitly disclose a quantity of allocated memory blocks is not explicitly taught by Qin, although this limitations is suggested by Qin as: number/quantity of allocated bytes (reads on blocks) of memory (Qin 0015, claim 3) & receive memory allocation information from each process 520 (Qin fig 5). Nevertheless, in the same field of endeavor Zeng teaches comparing a number/quantity of memory pages/blocks to determine if a memory leak has occurred (Zeng abstract, 0011, 0049), it is noted that a broadest reasonable interpretation of the claimed ‘blocks’ is coextensive in scope with the 4 KB memory areas comprised of memory pages (Zeng 0014, 0053).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to compare a quantity of memory blocks to determine a memory leak in the invention of Qin as taught by Zeng because it would be advantageous for executing a means for detection of a memory leak, while consuming less memory without affecting an efficiency of allocating and releasing memory (Zeng abstract).
With respect to dependent claim 2, 7, 11, 16 Qin/Zeng discloses wherein the second operation comprises a plurality of second sub-operations [Step S3, reading the node again – Zeng 0010; sequential readings and comparison across steps reads on multiple sub-operations or repeated comparisons – Zeng fig 1 and paragraph 0008-0011], and the second target value comprises a plurality of sub-target values corresponding to the plurality of second sub-operations [Zeng fig 1]; and the determining, in a case that the second target value is greater than the first target value, that there is a memory leak in the first electronic device comprises: in a case that each two adjacent sub-target values in the plurality of sub-target values correspond to a same variation, determining that there is a memory leak in the first electronic device [if the difference value is a positive value and it monotonically increases, it is determined that the memory leak occurs in the memory pages allocated correspondingly by the allocation functions – Zeng abstract, 0011], wherein a sequence of the plurality of sub-target values is determined according to an execution sequence of the plurality of second sub-operations [s1-s4 are ordered, producing ordered readings that are aligned with execution order - Zeng fig 1 and paragraph 0008-0011] [repeated iterations create an ordered sequence of allocations for comparison and user may specify number of iterations - Qin fig 5-6, paragraph 0019].
With respect to dependent claim 3, 8, 12, 17 Qin/Zeng discloses wherein before the sending a first command to a first electronic device, the method further comprises: sending a third command to the first electronic device, wherein the third command is used to request the first electronic device to run a target program in a first manner [administrative client transmits an instruction to run a test case process, and then transmits, to each of the processes, a second command to return memory track information - Qin abstract; In some examples, the commands to dump the memory indications from each process may be given from a command line interface, such as "debug process memory usage [iteration <num>]." In this example, the option [iteration <num>] provides a user with the option run a test case process a number <num> times. While running the debug process in one shell, the test case process is run <num> times in a separate shell. After each time the test case is run, the debug process captures the system wide memory allocation. Increasing the number of iterations may provide a more accurate report of memory leaks, at the expense of a longer process in getting the report - Qin 0020], wherein the first target value further comprises a size of an allocated memory block in the first electronic device and code used when the allocated memory block is called in the case that the first electronic device performs the first operation [Qin 0015-0016, fig 4, 6] [Zeng abstract, 0012-0013, 0050]; and the second target value further comprises a size of an allocated memory block in the first electronic device and code used when the allocated memory block is called in the case that the first electronic device performs the second operation [Qin 0015, 0018, fig 4, 6] [Zeng abstract, 0012-0013, 0050]; and after the determining that there is a memory leak in the first electronic device, the method further comprises: determining a location of the memory leak in the first electronic device according to the first target value and the second target value [debugger may use the memory type entry from the list of potential memory leaks to pinpoint specific portions of source code that may have caused the memory leak Qin 0015-0016, fig 4, 6] [Zeng 0049-0050].
With respect to dependent claim 4, 13 Qin/Zeng discloses wherein the determining a location of the memory leak in the first electronic device according to the first target value and the second target value comprises: in a case that a target difference is greater than or equal to a preset threshold, determining a first location as the location of the memory leak in the first electronic device, wherein the first location is a memory location of the code used when the allocated memory block is called in the case that the first electronic device performs the second operation [debugger may use the memory type entry from the list of potential memory leaks to pinpoint specific portions of source code that may have caused the memory leak - Qin abstract, 0015-0016, fig 4, 6] [comparing the number in each case to calculate a difference value, if the difference value is a positive value and monotonically increases, it's determined that the memory leak occurs in the memory pages allocated correspondingly by the allocation functions, the leak is tied to the return address of the allocation function - Zeng abstract, 0049-0050]; or in a case that a target difference is less than a preset threshold, determining a second location as the location of the memory leak in the first electronic device, wherein the second location is a memory location of the code used when the allocated memory block is called in the case that the first electronic device performs the first operation [difference based selection where growth indicates choosing corresponding code location - Zeng abstract, 0049-0050], wherein the target difference is a difference between the size of the allocated memory block in the first electronic device in the case that the first electronic device performs the second operation and the size of the allocated memory block in the first electronic device in the case that the first electronic device performs the first operation [comparing the number in each case to calculate a difference value, if the difference value between sequential reads - Zeng fig abstract, 0011, 0049-0050].
With respect to dependent claim 5, 9, 14, 18 Qin/Zeng discloses wherein after the determining a location of the memory leak in the first electronic device, the method further comprises: sending a fourth command to the first electronic device, wherein the fourth command is used to request the first electronic device to run the target program in a second manner [test case may be run again, user may specify number of iterations, note fig 6 shows multiple runs - Qin fig 5-6, paragraph 0019-0020] [repeated reads producing new values reads on running in a ‘second manner’ – Zeng, fig 1].
With respect to dependent claim 15, 19, 20 Qin/Zeng discloses since the instant claim is substantially similar in scope relative to claim 1, it is rejected according to substantially the same rationale as applied to claim 1, with minor differences considered as follows:
wherein the electronic device is a first electronic device, comprising a processor, a memory, and a program or an instruction stored in the memory and executable on the processor [Qin 0011, 0014],
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Li US PGPUB # 20170168886 teaches: A resource leak detection method, apparatus, and system that includes obtaining a target resource called when target code of a program runs, where the target code is partial code in program code, determining a first storage resource amount occupied by the target resource, determining whether the first storage resource amount occupied by the target resource satisfies a first preset condition, and if the first storage resource amount occupied by the target resource satisfies the first preset condition, determining a storage location of the target code as a resource leak location. In the embodiments of the present disclosure, the target code of the program can be tracked, and further, by means of detection, the storage location of the target code can be determined as the resource leak location.
Moser US patent # 9104567 teaches: A memory-leak source in a data structure can be identified by counting insertions into the data structure and deletions from the data structure for locations in the execution path of a computer program. These insertion and deletion values can be used to identify at least one location as a memory-leak source that corresponds to an imbalance between insertions and deletions during the execution of the computer program..
When responding to this Office Action, any new claims and/or limitations should be accompanied by a reference as to where the new claims and/or limitations are supported in the original disclosure.
Any inquiry concerning this communication or earlier communication from the examiner should be directed to MARWAN AYASH at (571)270-1179. The examiner may be reached via email at marwan.ayash@uspto.gov – provided that applicant files form PTO/SB/439 to authorize internet communication, found online at http://www.uspto.gov/sites/default/files/documents/sb0439.pdf
The examiner can normally be reached 9a-530p M-R. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rocio del Mar Perez-Velez can be reached on 571-270-5935. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Marwan Ayash/
Examiner, Art Unit 2133
/ROCIO DEL MAR PEREZ-VELEZ/Supervisory Patent Examiner, Art Unit 2133