Prosecution Insights
Last updated: April 19, 2026
Application No. 18/413,391

TOLERATING DEFECTIVE MEMORY BANKS IN EMERGING MEMORY COMPONENTS

Non-Final OA §101§112
Filed
Jan 16, 2024
Examiner
BRYAN, JASON B
Art Unit
2114
Tech Center
2100 — Computer Architecture & Software
Assignee
Sandisk Technologies Inc.
OA Round
3 (Non-Final)
76%
Grant Probability
Favorable
3-4
OA Rounds
2y 9m
To Grant
91%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
234 granted / 307 resolved
+21.2% vs TC avg
Moderate +15% lift
Without
With
+14.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
15 currently pending
Career history
322
Total Applications
across all art units

Statute-Specific Performance

§101
14.2%
-25.8% vs TC avg
§103
40.2%
+0.2% vs TC avg
§102
14.6%
-25.4% vs TC avg
§112
25.8%
-14.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 307 resolved cases

Office Action

§101 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments regarding the 101 rejections of claims 10-21 are unpersuasive. As detailed below, the determinations and generation of addresses can be performed in the mind or with pen and paper (or considered mathematical calculations in the case of generating addresses). Storing the data is insignificant extra-solution activity. Claims 10-21 are rejected for the reasons stated below. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 10-21 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. As to claim 10, there does not appear to be support in the specification for: determining a number of defective memory banks of the at least one memory component based, at least in part, on determining the at least one memory component includes the non-power-of-two number of memory banks. The specification does not seem to detail this process anywhere and paragraph 0090 and 0092 of the specification appears to be the most relevant portion as they discuss new memory component address generation. There also does not appear to be support for: storing the new memory component address in a bank remapping register array associated with the controller such that the at least one memory component is grouped with another memory component having a same number of defective memory banks. The specification seems to describe a sorting process by which memory components having the same number of available banks are grouped together (see paragraphs 0075 for example). There does not appear to be description such sorting being connected to storing the new memory component address so that storing the address is done “such that the at least one memory component is grouped with another memory component having a same number of defective memory banks.” As to claim 16, there does not appear to be support for: means for determining a number of defective memory means of the at least one memory component, wherein the means for determining the number of defective memory means determines the number of defective memory means of the at least one memory component in response to the means for determining whether the memory component includes the non-power- of-two number of memory means determines the memory component includes the non-power-of- two number of memory means. The specification does not seem to detail this process anywhere and paragraph 0090 and 0092 of the specification appears to be the most relevant portion as they discuss new memory component address generation. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 10-15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 10, it is unclear precisely what is meant by storing the new memory component address “such that the at least one memory component is grouped with another memory component having the same number of defective memory banks.” It is unclear how storing an address affects the groupings by defective memory banks. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 10-21 are rejected under 35 U.S.C. § 101 because the claimed invention is directed to an abstract idea without significantly more. As to claim 10 (this analysis also applies to claim 16): Step 1 Analysis: Is the claim to a process, machine, manufacture or composition of matter? See MPEP § 2106.03. Yes, the claim is to a machine. Step 2A Prong One Analysis: Does the claim recite an abstract idea, law of nature, or natural phenomenon? See MPEP § 2106.04(II)(A)(1). Yes, the limitation “determining . . . based on determining” “determining a number . . .”is the abstract idea of a mental process that can practically be performed in the human mind, with or without the use of a physical aid such as pen and paper (including an observation, evaluation, judgment, opinion). See MPEP § 2106.04(a)(2)(III). Yes, the limitation “based on . . .generating” is the abstract idea of a mental process that can practically be performed in the human mind, with or without the use of a physical aid such as pen and paper (including an observation, evaluation, judgment, opinion). See MPEP § 2106.04(a)(2)(III). This limitation could also be considered the abstract idea of a mathematical calculation. See MPEP § 2106.04(a)(2)(I)(C). Step 2A Prong Two Analysis: Does the claim recite additional elements that integrate the judicial exception into a practical application? See MPEP § 2106.04(d). No, the limitations of memory and a controller is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process. See MPEP §§ 2106.04(d), 2106.05(f)(2). No, the limitations of memory and a controller are considered an additional element that generally links the use of the judicial exception to a particular technological environment or field of use. See MPEP § 2106.05(h). No, the limitation “storing” is an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. See MPEP §§ 2106.04(d), 2106.05(g). Step 2B Analysis: Does the claim recite additional elements that amount to significantly more than the judicial exception? See MPEP § 2106.05. No, the limitations of memory and a controller is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process. See MPEP § 2106.05(f)(2). No, the limitations of memory and a controller are considered an additional element that generally links the use of the judicial exception to a particular technological environment or field of use. See MPEP § 2106.05(h). No, the limitation “storing” is an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. See MPEP § 2106.05(g). Furthermore the additional element is directed to receiving or transmitting data over a network / electronic recordkeeping / storing and retrieving information in memory, which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II). As to claim 11 (similar reasoning applies to claim 17, The limitation “determining” is the abstract idea of a mental process that can practically be performed in the human mind, with or without the use of a physical aid such as pen and paper (including an observation, evaluation, judgment, opinion). See MPEP § 2106.04(a)(2)(III). The limitation “controller” is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process. See MPEP §§ 2106.04(d), 2106.05(f)(2). The limitation checking a register is an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. See MPEP § 2106.05(g). Furthermore the additional element is directed to electronic recordkeeping / storing and retrieving information in memory which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II). As to claim 12, The limitation “mod division circuit” is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process. See MPEP §§ 2106.04(d), 2106.05(f)(2). As to claim 13 (similar reasoning applies to the means for dividing in claim 18), The limitation “mod division circuit” is an additional element that amounts to adding the words “apply it” (or an equivalent) with the judicial exception, or merely uses a computer in its ordinary capacity as a tool to perform an existing process. See MPEP §§ 2106.04(d), 2106.05(f)(2). The remaining elements simply further describe the mental process/mathematical calculation of claim 10. As to claim 14 (similar reasoning applies to the means for dividing in claim 19), The remaining elements simply further describe the mental process/mathematical calculation of claim 10. As to claim 15 (similar reasoning applies to the means for dividing in claim 20), The limitation use of a register is an additional element that amounts to adding insignificant extra-solution activity to the judicial exception. See MPEP § 2106.05(g). Furthermore the additional element is directed to electronic recordkeeping / storing and retrieving information in memory which the courts have recognized as well‐understood, routine, and conventional when they are claimed in a generic manner. See MPEP § 2106.05(d)(II). As to claim 21, the claimed grouping may be the abstract idea of a mental process that can practically be performed in the human mind, with or without the use of a physical aid such as pen and paper (including an observation, evaluation, judgment, opinion). See MPEP § 2106.04(a)(2)(III). Conclusion No prior art was found with which it would be appropriate to reject the claims as amended. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 5247645 A. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON B BRYAN whose telephone number is (571)270-7091. The examiner can normally be reached Mon-Fri, 8-5 First Friday off. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ashish Thomas can be reached at 5712720631. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JASON B BRYAN/ Primary Examiner, Art Unit 2114
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Prosecution Timeline

Jan 16, 2024
Application Filed
Mar 04, 2024
Response after Non-Final Action
May 09, 2025
Non-Final Rejection — §101, §112
Aug 08, 2025
Response Filed
Sep 26, 2025
Final Rejection — §101, §112
Dec 29, 2025
Request for Continued Examination
Jan 17, 2026
Response after Non-Final Action
Jan 24, 2026
Non-Final Rejection — §101, §112
Apr 09, 2026
Applicant Interview (Telephonic)
Apr 12, 2026
Examiner Interview Summary

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
76%
Grant Probability
91%
With Interview (+14.8%)
2y 9m
Median Time to Grant
High
PTA Risk
Based on 307 resolved cases by this examiner. Grant probability derived from career allow rate.

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