DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim 8 has been amended. Claims 1-16 are pending in the instant application. Claims 1-7 and 13-16 are withdrawn by Applicant.
Priority
This application was filed January 16, 2024, which claims priority benefit to Korean Patent Application No.10-0023-0025700 filed on February 27, 2023.
However, the certified foreign priority document has not been received, nor retrieved by the Office successfully. Applicant needs to provide the priority document.
Information Disclosure Statements
Applicants’ Information Disclosure Statements, filed on 01/31/2025 and 01/16/2024, have been considered. Please refer to Applicant’s copies of the PTO-1449 submitted herewith.
Response to Restriction Requirement
Applicant’s election without traverse of Group I (i.e. claims 8-12) in the reply filed by Applicant’s representative Jae Deok Ahn on 08/24/2026 is acknowledged.
Status of the Claims
Claims 1-7 and 13-15 were withdrawn from further consideration by Applicant as being drawn to non-elected inventions due to the restriction requirement. Claims 8-12 are under examination on the merits.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim 8 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Liang et al., Coatings, (2020), v.10, p282(1-16).
Applicant’s claim 8 is drawn to a ferroelectric thin film transistor, comprising: a gate electrode formed on a substrate; a gate insulating layer formed on the gate electrode; an oxide semiconductor layer formed on the gate insulating layer; and a source electrode and drain electrode respectively formed on opposite sides of the oxide semiconductor layer, wherein the gate insulating layer comprises the ferroelectric zirconium aluminum oxide (ZAO) compound comprising zirconium and aluminum.
Liang et al. discloses a ferroelectric thin film transistor and a method for preparing the ferroelectric thin film transistor, see “2.3. Metal-insulator-Metal Device Fabrication and Characterization” and “2.4. Thin-Film Transistor Applications and Characterization” at p.282(3 of 16). Specifically, Liang et al. discloses the ferroelectric thin film transistor was prepared by depositing 150 nm-thick indium tin oxide (ITO) on glass substrates, and the ITO film was used as a bottom electrode (a gate electrode), followed by ZAO films (a gate insulating layer), and an IGZO film composed of the atomic ratio of In:Ga:Zn:O=1:1:1:4 (an oxide semiconductor layer) with 10 nm thickness was deposited on the ZAO films; and at the end, the Al (aluminum) source/drain electrodes were deposited on it. In addition, Liang et al. discloses 100 nm-thick circular aluminum electrode was deposited by RF sputtering through a shadow metal mask. It can be seen from the above description that the Al (aluminum) source/drain electrodes are two different electrodes and were deposited on the ZAO films (a gate insulating layer) separately. Accordingly, the source electrode and drain electrode formed on opposite sides of the oxide semiconductor layer. Therefore, Liang et al. anticipates claim 8.
Claim 8 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by KR102283203B1 (“the `203 patent”) to Lee et al.
The `203 patent [0026] discloses a diagram of FIG. 1
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illustrating the structure of a ferroelectric transistor includes a structure in which a gate electrode layer, a ferroelectric layer (gate insulating layer), and oxide semiconductor layer, a source electrode, and a drain electrode are stacked in order. FIG.1 shows the source electrode and drain electrode respectively formed on opposite sides of the oxide semiconductor layer. The `203 patent [0011] discloses the gate electrode layer may be deposited on a silicon substrate on which silicon oxide is deposited. In addition, the `203 patent [0014] discloses the ferroelectric layer may comprise an oxide film having at least one of Zr, Si, Al, Gd, Hf, and Y. Therefore, the `203 patent anticipates claim 8.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over the `203 patent in view of Liang et al., Peng et al., Nanoscale Research Letters, (2019), v.14, p.115(1-9), and US2019/088758 (“the `758 publication”) to Jeong et al.
In terms of claim 9 wherein the gate electrode comprises a first gate electrode and a second gate electrode, the `203 patent [0013 and 0027] discloses the gate electrode layer may include at least one film of TiN, Cu, Mo, W, Pt, Au, Ta, Al and Ni. Because the gate electrode layer may include at least one film, it suggests the gate electrode layer may include multiple films, and each film can function as a gate electrode. Therefore, the `203 patent teaches and/or suggests the limitation “the gate electrode comprises a first gate electrode and a second gate electrode”.
In terms of claim 10 wherein the gate insulating layer has a thickness of 30 nm to 60 nm, the `203 patent [0033] discloses a ferroelectric layer (gate insulating layer) has a thickness of 20nm to 30 nm.
In terms of claim 11 wherein the oxide semiconductor layer contains nanocrystals, Peng et al. (Absrtract) discloses a nanocrystal-embedded-insulator (NEI) ferroelectric field-effect transistor (FeFET) for memory applications.
In terms of claim 12 wherein the oxide semiconductor layer has a thickness of 40 nm to 60 nm, Liang et al. teaches the oxide semiconductor layer of IGZO film with 10 nm thickness was deposited, see “2.4. Thin-Film Transistor Applications and Characterization” at p.282(3 of 16). However, the difference of the thickness of the layer is further taught and/or suggested by the `758 publication. The `758 publication [0014, 0040, and claim 25] teaches the thin film transistor comprises the gate insulating film having a thickness of 30 nm to 40 nm.
Conclusions
Claims 8-12 are rejected.
Claims 1-7 and 13-16 are withdrawn.
Telephone Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Yong L. Chu, whose telephone number is (571)272-5759. The examiner can normally be reached on M-F 8:30am-5:00pm.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amber R. Orlando can be reached on 571-270-3149. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300.
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/YONG L CHU/Primary Examiner, Art Unit 1731
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