DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required: [a fault condition; an energy storage component coupling terminal; a fault; an energy storage component].
Claim Objections
Claims 10-12, 14, 18 and 23 are objected to because of the following informalities:
In claim 10 line 3, “a fault condition” ---, should be corrected to ---, “the fault condition” ---.
In claim 11 line 2, “a fault condition” ---, should be corrected to ---, “the fault condition” ---.
In claim 11 line 2, “a voltage” ---, should be corrected to ---, “the voltage” ---.
In claim 11 line 2, “an energy” ---, should be corrected to ---, “the energy” ---.
In claim 12 line 2, “an energy” ---, should be corrected to ---, “the energy” ---.
In claim 12 line 2, “a voltage” ---, should be corrected to ---, “the voltage” ---.
In claim 14 line 3, “a fault condition” ---, should be corrected to ---, “the fault condition” ---.
In claim 14 line 4, “a fault detection” ---, should be corrected to ---, “the fault detection” ---.
In claim 18 line 1, “an energy” ---, should be corrected to ---, “the energy” ---.
In claim 24 line 4, “an energy” ---, should be corrected to ---, “the energy” ---.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4-15, 18 and 21-26 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Petty (US Patent No. 20100026250).
Regarding claim 1, Petty discloses an integrated circuit (IC) (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) comprising: control circuitry (i.e., such as MODE-CTRL/see fig. 3 for more details, X110, A125, and X130; see for example fig. 1, para. [0016]- [0028]) operable to control (i.e., such as T101 is controlled via CTRL-1 and T102 is controlled via CTRL-2; see for example fig. 1, para. [0016]- [0028]): an external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]) of a primary current path (i.e., such as primary current path/CTRL-1; for instance, the current flows from the source VDD at transistor T101; see for example fig. 1, para. [0016]- [0028]) for an energy storage component (i.e., such as energy storage component L135; see for example fig. 1, para. [0016]- [0028]) of a circuit (i.e., such as circuit of any off-chip load connected to terminal OUTPUT; see for example fig. 1, para. [0016]- [0028]), wherein the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]) of the primary current path (i.e., such as primary current path/CTRL 1; for instance, the current flows from the source VDD at transistor T101; see for example fig. 1, para. [0016]- [0028]) is external (i.e., such as external/off-chip; see for example fig. 1, para. [0016]- [0028]) to the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a first internal switch (i.e., such as first internal switch T102; see for example fig. 1, para. [0016]- [0028]) of a secondary current path (i.e., such as secondary current path/CTRL-2; the current flows from the source VDD at transistor T102; see for example fig. 1, para. [0016]- [0028]) for the energy storage component (i.e., such as energy storage component L135; see for example fig. 1, para. [0016]- [0028]), wherein the first internal switch (i.e., such as first internal switch T102; see for example fig. 1, para. [0016]- [0028]) is internal (i.e., such as internal/on-chip; see for example fig. 1, para. [0016]- [0028]) to the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]), wherein the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) is selectively (i.e., such as selectively; for instance, switch S160 is configured to selectively route the error signal to the first control path in the low-current mode and to the second control path in the high-current mode; see for example fig. 1, para. [0016]- [0028]) operable in either (i.e., such as either CTRL-1 or CTRL-2; see for example fig. 1, para. [0016]- [0028]): a first mode (i.e., such as first mode/high-current mode/CTRL-2; see for example fig. 1, para. [0016]- [0028]) in which the first internal switch (i.e., such as first internal switch T102; see for example fig. 1, para. [0016]- [0028]) of the secondary current path (i.e., such as secondary current path/CTRL-2; the current flows from the source VDD at transistor T102; see for example fig. 1, para. [0016]- [0028]) is actuated (i.e., such as S160 is actuated via MODE-CTRL to CTRL-2; see for example fig. 1, para. [0016]- [0028]) to enable the secondary current path (i.e., such as secondary current path/CTRL-2; the current flows from the source VDD at transistor T102; see for example fig. 1, para. [0016]- [0028]); or a second mode (i.e., such as second mode/low-current mode/CTRL-1; see for example fig. 1, para. [0016]- [0028]) in which the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]) of the primary current path (i.e., such as primary current path/CTRL-1; for instance, the current flows from the source VDD at transistor T101; see for example fig. 1, para. [0016]- [0028]) is actuated (i.e., such as S160 is actuated via MODE-CTRL to CTRL-1; see for example fig. 1, para. [0016]- [0028]) to enable the primary current path (i.e., such as primary current path/CTRL-1; for instance, the current flows from the source VDD at transistor T101; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 4, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein an on-resistance (i.e., such as on-resistance; for instance, the shared transistor operates as a variable-resistance pass transistor in the low-current mode and as a low-on-resistance switching transistor in the high-current mode. Such a configuration may be used to reduce the overall circuit size and/or cost, although those skilled in the art will appreciate that any savings in size or cost might be outweighed in some applications by difficulties in simultaneously optimizing the on-resistance, for switching mode operation, and leakage currents and/or control linearity, for linear mode operation. In some embodiments, such difficulties may be at least partially mitigated by employing a more complex transistor structure, such as a transistor with multiple gates; see for example fig. 1, para. [0016]- [0028]) of the first internal switch (i.e., such as first internal switch T102; see for example fig. 1, para. [0016]- [0028]) is controllable (i.e., such as T102 is controllable operational wise via X110; for instance, the shared transistor operates as a variable-resistance pass transistor in the low-current mode and as a low-on-resistance switching transistor in the high-current mode; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 5, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); further comprising a second internal switch (i.e., such as second internal switch T103; see for example fig. 1, para. [0016]- [0028]) of a tertiary current path (i.e., such as tertiary current path; for instance, even when T102 is OFF and the IC mode operation is in the CRTL-1/low-current mode, L135 still getting fed by the VDD of T101, and still connected in a complete close circuit via T103; see for example fig. 1, para. [0016]- [0028]) for the energy storage element (i.e., such as energy storage component L135; see for example fig. 1, para. [0016]- [0028]), wherein the second internal switch (i.e., such as second internal switch T103; see for example fig. 1, para. [0016]- [0028]) is internal (i.e., such as internal/on-chip; see for example fig. 1, para. [0016]- [0028]) to the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 6, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the control circuitry (i.e., such as MODE-CTRL/see fig. 3 for more details, X110, A125, and X130; see for example fig. 1, para. [0016]- [0028]) is configured to control (i.e., such as T101 is controlled via CTRL-1 and T102 is controlled via CTRL-2; see for example fig. 1, para. [0016]- [0028]) the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]) and the first internal switch (i.e., such as first internal switch T102; see for example fig. 1, para. [0016]- [0028]) based on signal indicative (i.e., such as signal indicative of the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) of a voltage (i.e., such as signal indicative of the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) at an energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) of the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 7, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the control circuitry (i.e., such as MODE-CTRL/see fig. 3 for more details, X110, A125, and X130; see for example fig. 1, para. [0016]- [0028]) comprises comparator circuitry (i.e., such as comparator circuitry ERROR AMPLIFIER A125; see for example fig. 1, para. [0016]- [0028]) configured to compare (i.e., such as A125 is configured to compare V_FEEDBACK/(-) vs V_REFERENCE/(+); see for example fig. 1, para. [0016]- [0028]) the signal indicative (i.e., such as signal indicative of the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) of the voltage (i.e., such as signal indicative of the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) at the energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) to a signal indicative (i.e., such as signal indicative of predefined threshold voltage V_REFERENCE/(+)/X130; see for example fig. 1, para. [0016]- [0028]) of a predefined threshold voltage (i.e., such as signal indicative of predefined threshold voltage V_REFERENCE/(+)/X130; see for example fig. 1, para. [0016]- [0028]) and to selectively actuate (i.e., such as selectively actuate; for instance, the output of A125 is the input to S160 to selectively actuate either CTRL-1 or CTRL-2 as decided by the MODE-CTRL; see for example fig. 1, para. [0016]- [0028]) the first internal switch (i.e., such as first internal switch T102; see for example fig. 1, para. [0016]- [0028]) and the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]) based on the comparison (i.e., such as the comparison of V_FEEDBACK/(-) vs V_REFERENCE/(+); see for example fig. 1, para. [0016]- [0028]).
Regarding claim 8, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the control circuitry (i.e., such as MODE-CTRL/see fig. 3 for more details, X110, A125, and X130; see for example fig. 1, para. [0016]- [0028]) is configured to actuate (i.e., such as selectively actuate; for instance, the output of A125 is the input to S160 to selectively actuate either CTRL-1 or CTRL-2 as decided by the MODE-CTRL; see for example fig. 1, para. [0016]- [0028]) the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]) to enable the primary current path (i.e., such as primary current path/CTRL 1; for instance, the current flows from the source VDD at transistor T101; see for example fig. 1, para. [0016]- [0028]) when the voltage (i.e., such as the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) at the energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) falls below (i.e., such as falls below; for instance, if the current is less than the threshold, the process begins (or continues in) a low-current mode/2nd-mode/CTRL-1; see for example fig. 1, para. [0016]- [0028]) the predefined threshold voltage (i.e., such as predefined threshold voltage V_REFERENCE/(+)/X130; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 9, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); further comprising fault detection circuitry (i.e., such as fault detection circuitry X310-X330 and ERROR AMPLIFIER A125; for instance, load current sensing or output voltage sensing may be used to switch the hybrid regulator between linear and switching modes; see for example fig. 3, para. [0023]- [0026]) configured (i.e., such as signal indicative of detection MODE-CTRL signal; see for example fig. 3, para. [0023]- [0026]) to output a signal indicative of detection (i.e., such as signal indicative of detection MODE-CTRL signal; see for example fig. 3, para. [0023]- [0026]) of a fault condition (i.e., such as fault condition to trigger the command route in the MODE-CTRL signal, either to issue CTRL-1 or CTRL-2 based upon the load current at L135 terminal; for instance, the regulator sub-circuits share error amplifier 125 and reference voltage X130. A feedback signal V.sub.FEEDBACK is derived from the regulator circuit output, through a resistive divider comprising resistors R140 and R142, and compared to a reference voltage supplied by voltage reference circuit X130. In low-current mode, i.e., when the load's current needs are below a pre-determined threshold, the error signal produced by error amplifier A125 is routed, via switch S160, to the control path for the linear regulator sub-circuit. In high-current mode, i.e., when the load requires an operating current above the threshold, the error signal is instead routed to the control path for the switching regulator; see for example fig. 1, para. [0016]- [0028]) if the voltage (i.e., such as the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) at the energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) subsequently equals (i.e., such as equals as the output of A125 is zero; for instance, if the outcome of A125 is zero because the feedback voltage and the reference cancel each other out, consequently corresponds to continue the current status mode operation; see for example fig. 1, para. [0016]- [0028]) or exceeds (i.e., such as exceeds; for instance, the operation in low-current mode continues until the detected current exceeds the pre-determined threshold, at which time operation switches to high-current mode; see for example fig. 1, para. [0016]- [0028]) the predefined threshold voltage (i.e., such as predefined threshold voltage V_REFERENCE/(+)/X130; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 10, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); further comprising fault detection circuitry (i.e., such as fault detection circuitry X310-X330 and ERROR AMPLIFIER A125; for instance, load current sensing or output voltage sensing may be used to switch the hybrid regulator between linear and switching modes; see for example fig. 3, para. [0023]- [0026]) configured to compare (i.e., such as block X330 compares SENSE-1 vs SENSE-2; see for example fig. 3, para. [0023]- [0026]) an actual charging (i.e., such as an actual charging; for instance, switching between low-current mode/CTRL-1 and high-current mode/CTRL-2 creates charge/discharge event to the inductor L135; see for example fig. 1, para. [0016]- [0028]) or discharging profile (i.e., such as discharging profile; for instance, switching between low-current mode/CTRL-1 and high-current mode/CTRL-2 creates charge/discharge event to the inductor L135; see for example fig. 1, para. [0016]- [0028]) of the energy storage component (i.e., such as energy storage component L135; see for example fig. 1, para. [0016]- [0028]) to an expected charging (i.e., such as expected charging; for instance, the inductor L135 is expected to be charged faster in the high-current mode than the charging under the low-current mode; see for example fig. 1, para. [0016]- [0028]) or discharging profile (i.e., such as discharging profile; for instance, switching between low-current mode/CTRL-1 and high-current mode/CTRL-2 creates charge/discharge event to the inductor L135; see for example fig. 1, para. [0016]- [0028]) of the energy storage component to identify the existence (i.e., such as identify the existence of the difference between the actual load current and the expected load current that's reflected by the inductor L135; see for example fig. 1, para. [0016]- [0028]) of a fault condition (i.e., such as fault condition to trigger the command route in the MODE-CTRL signal, either to issue CTRL-1 or CTRL-2 based upon the load current at L135 terminal; for instance, the regulator sub-circuits share error amplifier 125 and reference voltage X130. A feedback signal V.sub.FEEDBACK is derived from the regulator circuit output, through a resistive divider comprising resistors R140 and R142, and compared to a reference voltage supplied by voltage reference circuit X130. In low-current mode, i.e., when the load's current needs are below a pre-determined threshold, the error signal produced by error amplifier A125 is routed, via switch S160, to the control path for the linear regulator sub-circuit. In high-current mode, i.e., when the load requires an operating current above the threshold, the error signal is instead routed to the control path for the switching regulator; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 11, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the fault detection circuitry (i.e., such as fault detection circuitry X310-X330 and ERROR AMPLIFIER A125; for instance, load current sensing or output voltage sensing may be used to switch the hybrid regulator between linear and switching modes; see for example fig. 3, para. [0023]- [0026]) is configured (i.e., such as signal indicative of detection MODE-CTRL signal; see for example fig. 3, para. [0023]- [0026]) to output a signal indicative of detection (i.e., such as signal indicative of detection MODE-CTRL signal; see for example fig. 3, para. [0023]- [0026]) of a fault condition (i.e., such as fault condition to trigger the command route in the MODE-CTRL signal, either to issue CTRL-1 or CTRL-2 based upon the load current at L135 terminal; for instance, the regulator sub-circuits share error amplifier 125 and reference voltage X130. A feedback signal V.sub.FEEDBACK is derived from the regulator circuit output, through a resistive divider comprising resistors R140 and R142, and compared to a reference voltage supplied by voltage reference circuit X130. In low-current mode, i.e., when the load's current needs are below a pre-determined threshold, the error signal produced by error amplifier A125 is routed, via switch S160, to the control path for the linear regulator sub-circuit. In high-current mode, i.e., when the load requires an operating current above the threshold, the error signal is instead routed to the control path for the switching regulator; see for example fig. 1, para. [0016]- [0028]) if a time (i.e., such as time; for instance, the inductor L135 takes less-time/fast-charging to be charged in the high-current mode than the charging under the low-current mode more-time/slow-charging; see for example fig. 1, para. [0016]- [0028]) taken for a voltage (i.e., such as the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) at an energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) of the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) to reach a predefined threshold voltage (i.e., such as predefined threshold voltage V_REFERENCE/(+)/X130; see for example fig. 1, para. [0016]- [0028]) does not correspond to an expected time (i.e., such as expected time; for instance, the inductor L135 is expected to take less time to be charged faster in the high-current mode than the time needed for charging under the low-current mode; see for example fig. 1, para. [0016]- [0028]) for the voltage (i.e., such as the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) at the energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) to reach the predefined threshold voltage (i.e., such as predefined threshold voltage V_REFERENCE/(+)/X130; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 12, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) is configured to output a fault detection voltage (i.e., such as fault detection voltage line MODE-CTRL as the output of block X330 which reflects the final total output load current as to be reflected in terms of voltage via resistors 140 and 142; see for example fig. 1, para. [0016]- [0028]) to an energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) of the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) and to monitor (i.e., such as X310 monitors T101 and X320 monitors T102; see for example fig. 3, para. [0023]- [0026]) a voltage (i.e., such as the feedback voltage V_FEEDBACK; see for example fig. 1, para. [0016]- [0028]) at the energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) to detect a fault (i.e., such as fault condition to trigger the command route in the MODE-CTRL signal, either to issue CTRL-1 or CTRL-2 based upon the load current at L135 terminal; for instance, the regulator sub-circuits share error amplifier 125 and reference voltage X130. A feedback signal V.sub.FEEDBACK is derived from the regulator circuit output, through a resistive divider comprising resistors R140 and R142, and compared to a reference voltage supplied by voltage reference circuit X130. In low-current mode, i.e., when the load's current needs are below a pre-determined threshold, the error signal produced by error amplifier A125 is routed, via switch S160, to the control path for the linear regulator sub-circuit. In high-current mode, i.e., when the load requires an operating current above the threshold, the error signal is instead routed to the control path for the switching regulator; see for example fig. 1, para. [0016]- [0028]) in the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 13, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) comprises a fault detection voltage source (i.e., such as fault detection voltage source X510 to output V-switch driven by X530; see for example fig. 5, para. [0019]- [0031]) and a fault detection switch (i.e., such as fault detection switch S540; see for example fig. 5, para. [0019]- [0031]) configured to selectively couple (i.e., such as S540 is selectively couple driver X530 to switching transistor/internal terminal of L135 via MODE-CTRL; see for example fig. 5, para. [0019]- [0031]) the fault detection voltage source (i.e., such as fault detection voltage source X510 to output V-SWITCH driven by X530; see for example fig. 5, para. [0019]- [0031]) to the energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 14, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) is configured to compare (i.e., such as comparator A520 is to compare V-RAMP vs CTRL-2; see for example fig. 5, para. [0019]- [0031]) the monitored voltage (i.e., such as monitored voltage V-RAMP (+); see for example fig. 5, para. [0019]- [0031]) at the energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) to a fault detection voltage threshold voltage (i.e., such as fault detection voltage threshold voltage CTRL-2 (-); see for example fig. 5, para. [0019]- [0031]). As for the rest of the limitations/features in claim 14 is rejected for the same reasons that have already been stated/discussed above in rejected claim 9. {See rejection of claim 9}
Regarding claim 15, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a comparator (i.e., such as comparator A520; see for example fig. 5, para. [0019]- [0031]). As for the rest of the limitations/features in claim 15 is rejected for the same reasons that have already been stated/discussed above in rejected claim 14. {See rejection of claim 14}
Regarding claim 18, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the second internal switch (i.e., such as second internal switch T103; see for example fig. 1, para. [0016]- [0028]) is coupled between an energy storage component coupling terminal (i.e., such as energy storage component coupling terminal R/140-R/142; for instance, the power energy stored in L135 can be read by the resistive divider circuit R140 and R142; see for example fig. 1, para. [0016]- [0028]) of the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) and an internal reference voltage terminal (i.e., such as internal reference voltage terminal GND; see for example fig. 1, para. [0016]- [0028]) of the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]), such that in use of the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) the second internal switch (i.e., such as second internal switch T103; see for example fig. 1, para. [0016]- [0028]) is coupled between the energy storage component (i.e., such as energy storage component L135; see for example fig. 1, para. [0016]- [0028]) and internal reference voltage terminal (i.e., such as internal reference voltage terminal GND; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 21, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the energy storage component (i.e., such as energy storage component L135; see for example fig. 1, para. [0016]- [0028]) comprises a capacitor or an inductor (i.e., such as inductor L135; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 22, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); wherein the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]) comprises: a power converter IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a boost converter IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a buck converter IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a buck-boost converter IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a charge pump IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a rectifier IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); an inverter IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); or a cell balancing IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 23, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a module (i.e., such as module IC 100; see for example fig. 1, para. [0016]- [0028]) comprising: the integrated circuit (i.e., such as integrated circuit IC 100; see for example fig. 1, para. [0016]- [0028]);the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]); and an energy storage component (i.e., such as energy storage component L135; see for example fig. 1, para. [0016]- [0028]) coupled to the integrated circuit (i.e., such as integrated circuit IC 100; see for example fig. 1, para. [0016]- [0028]) and the external switch (i.e., such as external switch T101; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 24, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]); a host device (i.e., such host device mobile phone; for instance, a mobile phone's idle state, which comprises short, periodic, spurts of activity, separated by relatively long periods of inactivity, are typically triggered by a "wake-up" timer that runs during the mobile phone's "sleep" state. Each change in operating mode may include the activation of a MODE_CTRL signal, by a microprocessor, microcontroller, or other digital hardware, to reconfigure the voltage regulator circuit for the new operating mode. This signal may be the same as or linked to other control signals, such as a hardware signal that turns the phone's master clock on and off; see for example para. [0022]) comprising the integrated circuit (i.e., such as integrated circuit IC 100; see for example fig. 1, para. [0016]- [0028]).
Regarding claim 25, is rejected for the same reasons that have already been stated/discussed above in rejected claim 24. {See rejection of claim 24}
Regarding claim 26, is rejected for the same reasons that have already been stated/discussed above in rejected claim 1. {See rejection of claim 1}
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Petty (US Patent No. 20100026250) in view of Fujioka et al (US Patent No. 4686426).
Regarding claim 2, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]).
Petty does not explicitly disclose wherein the first internal switch is configured to have a higher on-resistance.
Fujioka discloses a thin-film EL display panel drive circuit (i.e., 10; see for example fig. 3, Col. 2 lines 32+); wherein the first internal switch (i.e., such as internal switches from PT1 to PTi-1; for instance, the P-channel MOS IC having a large ON-resistance; see for example fig. 1, Col. 7 lines 59+) is configured to have a higher on-resistance (i.e., such as internal switches from PT1 to PTi-1; for instance, the P-channel MOS IC having a large ON-resistance; see for example fig. 1, Col. 7 lines 59+).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the switch-high on-resistance in Petty, as taught by Fujioka, as it provides the advantage of optimizing the circuit design towards efficient and reliable adjustable on-resistance IC chip.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Petty (US Patent No. 20100026250) in view of Fujioka et al (US Patent No. 4686426) and further in view of Burgener et al (US Publication No. 20030090313).
Regarding claim 3, Petty in view of Fujioka and the teachings of Petty as modified by Fujioka have been discussed above.
Petty further discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]).
Fujioka furthermore discloses the thin-film EL display panel drive circuit (i.e., 10; see for example fig. 3, Col. 2 lines 32+).
Neither Petty nor Fujioka explicitly discloses wherein the first internal switch is physically smaller than the external switch.
Burgener discloses a novel RF switch circuit (i.e., 100; see for example fig. 4, para. [0072]- [0098]); wherein the first internal switch (i.e., such as internal switch 330, 310 at the first stage; see for example fig. 8a, para. [0118]) is physically smaller than (i.e., the transistors used to implement the first stage level shifter 300 are physically smaller than those used to implement the second stage RF buffer circuit 402; see for example fig. 6b, para. [0103] the external switch (i.e., such as external switch 410, 412 at the second stage; see for example fig. 8a, para. [0118]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the switch fabrication in Petty, as taught by Burgener, as it provides the advantage of optimizing the circuit design towards a smaller size of IC chips.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Petty (US Patent No. 20100026250) in view of Heiling et al (US Publication No. 20180226817).
Regarding claim 16, Petty discloses the IC (i.e., such as IC 100; see for example fig. 1, para. [0016]- [0028]).
Petty does not explicitly disclose wherein the fault detection switch comprises a MOSFET.
Heiling discloses a supply voltage switching circuitry (i.e., driver IC 104; see for example fig. 6, para. [0036]); wherein the fault detection switch (i.e., such as fault detection switch M1; see for example fig. 6, para. [0036]) comprises a MOSFET (i.e., such as fault detection switch MOSFET M1; see for example fig. 6, para. [0036]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the MOSFET device in Petty, as taught by Heiling, as it provides the advantage of optimizing the circuit design towards a faster switching element.
Allowable Subject Matter
Claims 17 and 19-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 17, Petty teaches the invention set forth above. However, Petty does not particularly teach wherein: the IC comprises a first output terminal and an energy storage component coupling terminal, wherein, in use of the IC, a first terminal of the energy storage component is coupled to the first output terminal and a second terminal of the energy storage component is coupled to the energy storage component coupling terminal and the external switch is coupled between the second terminal of the energy storage component and an external reference voltage terminal; and the first internal switch is coupled between an energy storage component coupling terminal of the IC and an internal reference voltage terminal of the IC, such that in use of the IC the first internal switch is coupled between the energy storage component and internal reference voltage terminal.
Hence claim 17 will be deemed allowable if rewritten in an independent form.
Regarding claim 19, Petty teaches the invention set forth above. However, Petty does not particularly teach further comprising: second control circuitry operable to control: a second external switch of a primary current path for a second energy storage component of a circuit, wherein the external switch of the primary current path for the second energy storage component is external to the IC; a third internal switch of a secondary current path for the second energy storage element, wherein the second internal switch is internal to the IC.
Hence claim 19 will be deemed allowable if rewritten in an independent form.
Claim 20 depends on objected claim 19, consequently claim 20 will also be deemed allowable.
Conclusion
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/MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838