DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgement is made to a claim of foreign priority to Taiwanese application filed on January 1st, 2023. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Election/Restrictions
Applicant's provisional election without traverse of Species D (Figures 7-8, Claims 1,5,6,10, and 11) in the reply filed on June 4th, 2026 is acknowledged. Claim 11 does not to read on elected species D (Figures 7-8) because the “p-type junction termination region” is abutted by the “p-type doping extension region” and as such are not “spaced apart” from one another as claimed in claim 11. Examiner respectfully submits that claim 11 is read on by Figures 9-10, not Figures 7-8 as applicant indicated.
The requirement is made FINAL, claims 1,5,6, and 10 are being examined on their merits and all non-elected claims (i.e. claims 2-4, 7-9, and 11-14) are withdrawn from consideration at this time.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Urakami et al. (US20190341308A1).
Regarding claim 1;
Urakami et al. in figure 1 teaches A Semiconductor device (e.g. Detailed description [0042]), comprising: A substrate (e.g. ref 1, Detailed description [0043] “The SiC semiconductor device is formed with the use of a semiconductor substrate…an n+-type substrate 1…”); a main body disposed on said substrate (e.g. ref 2, Detailed description [0043] “…a semiconductor substrate in which an n−-type drift layer 2…is epitaxially grown on a front surface of an n+-type substrate 1…”), and including a cell region (e.g. ref “cell portion”), an edge termination region (e.g. ref “outer peripheral portion”) that surrounds said cell region, and an oxide insulation layer that is disposed on said cell region and said edge termination region so as to be spaced apart from said substrate (e.g. ref 10, Detailed description [0072] “The interlayer insulating film 10 is made of PBSG serving as a flowable oxide film…”), said cell region including a first p-well region (e.g. ref 3, Detailed description [0047] “In the cell portion and the connecting portion, a contact region 3 a formed of p-type high concentration layers is formed on a surface of the p-type base region 3.”), said edge termination region including a p-type extension unit that is adjacent to said first p-well region (see examiner markup below), an outer surrounding region that surrounds said p-type extension unit (see examiner markup below), an electrode unit including a source electrode that is disposed on said oxide insulation layer (e.g. ref 9, Detailed description [0052] “Surfaces of the n+-type source region 4 and the contact region 3 a are connected to a source electrode 9 corresponding to a first electrode.”), a drain electrode that is disposed on said substrate opposite to said main body (e.g. ref 11, Detailed description [0087] “…the drain electrode 11 is formed on the rear surface of the n+-type substrate 1.”), a gate electrode that is disposed in said oxide insulation layer and that corresponds in position to said cell region (e.g. ref 8, Detailed description [0052] “…the gate electrode 8 is connected to a gate pad 31 at a portion extended to the connecting portion.”, see examiner markup).
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Regarding claim 6;
Urakami et al. in figure 1 further teaches that said p-type extension unit includes a plurality of p-well rings that are disposed in said edge termination region (e.g. ref 21, Fig. 1 ref 21, Detailed description [0062] “Also, a surface layer portion of the n−-type drift layer 2…is provided with multiple p-type guard rings 21 to surround the cell portion. A top view layout of the p-type guard rings 21 has a square shape, a circular shape, or the like in which four corners are rounded…”).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Urakami et al. (US20190341308A1) in view of Hirao et al. ("Edge Termination With Enhanced Field-Limiting Rings Insensitive to Surface Charge for High-Voltage SiC Power Devices," in IEEE Transactions on Electron Devices, vol. 67, no. 7, pp. 2850-2853, July 2020, doi: 10.1109/TED.2020.2992577.) for the following reasons:
Regarding claim 5;
Urakami et al. teaches the semiconductor device of claim 1.
Urakami et al. is silent to the plurality of junction termination extension rings that are disposed in said p-type extension unit as claimed.
However, Hirao et al. teaches an edge termination structure with enhanced field-limiting rings (referred to as enhanced FLRs) alternating with conventional FLRs (e.g. Fig. 1c).
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At the effective time of filing, it would have been obvious to someone having ordinary
skill in the art to incorporate the enhanced FLRs taught in Hirao et al. into the semiconductor device taught by Urakami et al.’s edge termination structure since including the enhanced FLRs serves to mitigate electric field pile-up at device edges and expand the depletion layer of the device leading to improved and further stabilized breakdown voltage characteristics (e.g. abstract, conclusion).
Allowable Subject Matter
Claim 10 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM ROBERT MANN whose telephone number is (571)270-0210. The examiner can normally be reached Monday thru Thursday 0800-1800 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM ROBERT MANN/Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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