Prosecution Insights
Last updated: May 29, 2026
Application No. 18/416,436

OPTICAL/ELECTRICAL MODULE, COMMUNICATION METHOD, AND RELATED DEVICE

Non-Final OA §102§103
Filed
Jan 18, 2024
Priority
Jul 19, 2021 — continuation of PCTCN2021107037
Examiner
VANDERPUYE, KENNETH N
Art Unit
2634
Tech Center
2600 — Communications
Assignee
Huawei Technologies Co., Ltd.
OA Round
1 (Non-Final)
15%
Grant Probability
At Risk
1-2
OA Rounds
1y 1m
Est. Remaining
15%
With Interview

Examiner Intelligence

Grants only 15% of cases
15%
Career Allowance Rate
9 granted / 59 resolved
-46.7% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
6 currently pending
Career history
65
Total Applications
across all art units

Statute-Specific Performance

§101
6.6%
-33.4% vs TC avg
§103
73.6%
+33.6% vs TC avg
§102
10.4%
-29.6% vs TC avg
§112
6.6%
-33.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 59 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-2, 5, 15 are rejected under 35 U.S.C. 102(b)(2) as being anticipated by Cunningham et. al. (US 2009/0103927 A1). With regards to claim 1, Cunningham discloses an optical/electrical module (Fig 7@130), comprising: an analog equalizer (Fig 7@180, 190) and an optical/electrical converter(Fig 7@ 40, 70) wherein the analog equalizer is connected to the optical/electrical converter; wherein the analog equalizer is configured to: perform first analog signal equalization processing on a first electrical signal to obtain a second electrical signal (Fig 7, input/output), and send the second electrical signal to the optical/electrical converter (Fig 7, equalizer output sent to laser), or receive a third electrical signal from the optical/electrical converter, and perform second analog signal equalization processing on the third electrical signal to obtain a fourth electrical signa(Fig 7, photodiode output sent to equalizer)l; and wherein the optical/electrical signal converter is configured to: receive the second electrical signal from the analog equalizer and convert the second electrical signal into a first optical signal (Fig 7, equalizer output to laser), or convert a second optical signal into the third electrical signal and send the third electrical signal to the analog equalizer (Fig 7, optical signal input to photodiode and electrical output from photodiode). Regarding claim 2, Cunningham teaches the optical/ electrical module according to claim 1, wherein the optical/electrical converter (Fig 7@130) comprises a first optical/electrical converter (Fig 7, laser or photodiode), configured to receive the second electrical signal from the analog equalizer and convert the second electrical signal into the first optical signal (Fig 7, photodiode); and wherein the analog equalizer comprises a transmit equalizer (Fig7 @180), configured to: perform the first analog signal equalization processing on the first electrical signal to obtain the second electrical signal, and send the second electrical signal to the first optical/electrical converter (Fig 7, equalizer output sent to laser). Regarding claim 5, Cunningham teaches optical/electrical module according to claim 1, wherein the optical/ electrical converter comprises a second optical/electrical converter (Fig. 7@70, photodiode) , configured to: convert the second optical signal into the third electrical signal and send the third electrical signal to the analog equalizer(Fig 7@190); and wherein the analog equalizer comprises a receive equalize r(Fig 7@190), configured to: receive the third electrical signal from the second optical/electrical converter, and perform the second analog signal equalization processing on the third electrical signal to obtain the fourth electrical signal.(Fig 7@190) Regarding claim 15, Cunningham teaches a method in which an optical/ electrical module (Fig 7@130) is used, comprising: performing first analog signal equalization processing on a first electrical signal by using an analog equalizer in the optical/electrical module to obtain a second electrical signal(Fig 7@180, input and output of equalizer); performing: sending the second electrical signal to an optical/electrical converter (Fig 7@40, laser), or, receiving a third electrical signal(Fig 7, input to the equalizer 190) from the optical/ electrical converter by using the analog equalizer(Fig 7@190), and performing second analog signal equalization processing on the third electrical signal to obtain a fourth electrical signal(Fig 7 output of equalizer 190); and receiving the second electrical signal from the analog equalizer(Fig.7, laser 40 receives output of equalizer 180) by using the optical/electrical converter in the optical/electrical module; and performing converting the second electrical signal into a first optical signal(fig 7 Transmitter side ); or converting a second optical signal into the third electrical signal by using the optical/electrical converter, and sending the third electrical signal to the analog equalizer.(Fig 7, receiver side) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 3, 6 are rejected under 35 U.S.C. 103 as being unpatentable over Cunningham et. al. (US 2009/0103927 A1) in view of Latchman (US 20210218472 A1) Regarding claim 3, 6 Cunningham teaches the optical/electrical module according to claim 2, however fails to teach wherein the transmit equalizer comprises at least one of, a first continuous time linear equalizer (CTLE), a first low frequency equalizer (LFEQ), or a first level mismatch compensation circuit. Latchman teaches a linear module with a transmit side CTLE (Fig 4A@512). It would be obvious to combine Cunningham with Latchman for the purpose of enhancing signal quality by compensating for frequency-dependent losses in the transmission medium. By boosting these frequencies, the CTLE helps to equalize a signal and improve overall performance. Claim(s) 8 is rejected under 35 U.S.C. 103 as being unpatentable over Cunningham et. al. (US 2009/0103927 A1) in view Moran et al. (US 2005/0196172 A1) With regards to claim 8, Cunningham teaches a device, comprising: an optical/electrical module(Fig 7@130), comprising an analog equalizer and an optical/electrical converter(Fig 7@180, 40), wherein the analog equalizer is connected to the optical/ electrical converter(laser 40 connected to equalizer 180); wherein the analog equalizer is configured to: perform first analog signal equalization processing on a first electrical signal to obtain a second electrical signal (Fig 7 input and output of equalizer), and send the second electrical signal to the optical/ electrical converter(Fig 7 equalizer output sent to laser); or receive a third electrical signal from the optical/electrical converter, and perform second analog signal equalization processing on the third electrical signal to obtain a fourth electrical signal;(Fig 7 receiver side photodiode and equalizer) and wherein the optical/electrical converter is configured to: receive the second electrical signal from the analog equalizer and convert the second electrical signal into a first optical signal (Fig 7@40 laser output), or convert a second optical signal into the third electrical signal and send the third electrical signal to the analog equalizer (Fig 7 photodiode output to the equalizer); Cunningham fails to teach a digital signal interface; and wherein the digital signal interface is configured to: receive a first digital electrical signal from a processing device, convert the first digital electrical signal into the first electrical signal, and send the first electrical signal to the analog equalizer, or receive the fourth electrical signal from the analog equalizer, convert the fourth electrical signal into a second digital electrical signal, and send the second digital electrical signal to the processing device. Moran et al. teaches a digital signal interface (Fig 1@101); and wherein the digital signal interface is configured to: receive a first digital electrical signal from a processing device (Fig1@111, processing device not shown), convert the first digital electrical signal into the first electrical signal (Fig. 1@111, 112). It would be obvious to connect the digital interface in Moran to the equalizer in Cunningham and send the first electrical signal to the analog equalizer for the purpose of receiving digital signals and converting said signals to analog prior to inputting to the analog equalizer on the transmission side of the optical/electrical module in Cunningham, or It would have been obvious to connect the digital interface to the receiver side equalizer output (Fig 7@90) to receive the fourth electrical signal from the analog equalizer, convert the fourth electrical signal into a second digital electrical signal, and send the second digital electrical signal to the processing device(Fig. 7@90). On the receiver side of Fig 7 in Cunningham connect the digital interface to the output og the equalizer (90) to convert he analog output to a digital output for digital processing. Claim(s) 9 is rejected under 35 U.S.C. 103 as being unpatentable over Cunningham et. al. (US 2009/0103927 A1) in view Moran et al. (US 2005/0196172 A1) as applied in claim 8 above and further in view of Latchman (US 20210218472 A1) With regards to claim 9, Cunningham in view of Moran fails to teach the elements of claim 9, however Lachman teaches a high-speed passive component (connector in Fig. 5@628). It would be obvious to use this connector to connect the digital signal interface to the analog equalizer for the purpose of using connectors that provide almost zero latency and which do not degrade performance ta high frequencies. Claim(s) 12, 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cunningham et. al. (US 2009/0103927 A1) in view of Jopson (US 11,212,005) . Regarding claim 12 Cunningham teaches and optical/electrical module, comprising: at least two optical/electrical modules (Fig 16@510, 520); and a optical fiber (Fig16@525, 527); wherein each optical/ electrical module comprises an analog equalizer and an optical/electrical converter(Fig 18@640, 40, equalizer and laser), wherein the analog equalizer of each optical/electrical module is connected to the corresponding optical/ electrical converter(Fig 18, equalizer connected to laser driver/laser); wherein the analog equalizer of each optical/electrical module is configured to: perform first analog signal equalization processing on a first electrical signal to obtain a second electrical signal(Fig 18, equalizer input/output), and send the second electrical signal to the corresponding optical/ electrical converter (Fig 18, equalizer output sent to laser); or receive a third electrical signal from the corresponding optical/electrical converter(Fig 18@70 photodiode, receiver side), and perform second analog signal equalization processing on the third electrical signal to obtain a fourth electrical signal(Fig 18@190); and wherein the optical/electrical converter of each optical/electrical module is configured to: receive the second electrical signal from the corresponding analog equalizer and convert the second electrical signal into a first optical signal(Fig 18@40,30), or convert a second optical signal into the third electrical signal and send the third electrical signal to the corresponding analog equalizer; and wherein the at least two optical/electrical modules are connected through the optical fiber. (Fig 16, 18). Cunningham fails to teach the fiber being a hollow-core optical fiber. Jopson teaches the use of a hollow-core fiber in a bidirectional communications system (Fig. 1, 2). It would be obvious to replace the fiber in Cunningham with the hollow-fiber in Jopson so the hollow-core fiber can be used to simultaneously transmit, in opposite directions, optical data signals having substantially the same carrier wavelength. With regards to claim 13 Cunningham in view of Jopson teaches a communication system, comprising a plurality of communication devices (Cunningham, Fig 16@510, 520), wherein the plurality of communication devices are connected through the active optical cable according to claim 12,(Jopson Fig 1, 2). It would be obvious to replace the fiber in Cunningham with the hollow-fiber in Jopson so the hollow-core fiber can be used to simultaneously transmit, in opposite directions, optical data signals having substantially the same carrier wavelength. 6. Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cunningham et. al. (US 2009/0103927 A1) in view of Jopson (US 11,212,005) applied to claims 12 and 13 above, and further in view Moran et al. (US 2005/0196172 A1). Regarding claim 14, Cunningham in view of Jopson teaches the communication system according to claim 13, but fails to teach the plurality of communication devices comprise at least one device according to claim 8. The feature in the communication system in claim 8 is taught by Moran (see rejection of claim 8). Moran et al. teaches a digital signal interface (Fig 1@101); and wherein the digital signal interface is configured to: receive a first digital electrical signal from a processing device (Fig1@111, processing device not shown). Allowable Subject Matter Claims 4, 7, 10-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KENNETH N VANDERPUYE whose telephone number is (571)272-3078. The examiner can normally be reached Monday-Friday, 6:30am-2:30p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KENNETH N VANDERPUYE/Supervisory Patent Examiner, Art Unit 2634
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Prosecution Timeline

Jan 18, 2024
Application Filed
Nov 13, 2025
Non-Final Rejection mailed — §102, §103
Feb 05, 2026
Response Filed
Apr 28, 2026
Response after Non-Final Action

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
15%
Grant Probability
15%
With Interview (+0.0%)
3y 6m (~1y 1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 59 resolved cases by this examiner. Grant probability derived from career allowance rate.

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