Prosecution Insights
Last updated: July 17, 2026
Application No. 18/417,556

Multi-Layer Perceptron Architecture For Times Series Forecasting

Non-Final OA §101§102
Filed
Jan 19, 2024
Priority
Jan 25, 2023 — provisional 63/441,068
Examiner
STARKS, WILBERT L
Art Unit
Tech Center
Assignee
Google LLC
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
80%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
496 granted / 657 resolved
+15.5% vs TC avg
Minimal +4% lift
Without
With
+4.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
37 currently pending
Career history
706
Total Applications
across all art units

Statute-Specific Performance

§101
30.7%
-9.3% vs TC avg
§103
18.4%
-21.6% vs TC avg
§102
45.7%
+5.7% vs TC avg
§112
2.5%
-37.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 657 resolved cases

Office Action

§101 §102
DETAILED ACTION Claims 1 - 20 have been examined. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 U.S.C. § 101 35 U.S.C. § 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. The invention, as taught in Claims 1 - 20, is directed to “mental steps” and “mathematical steps” without significantly more. The claims recite: • input data point corresponding to a respective past time step earlier in time than a current time step • input data point comprising respective values for one or more features at the respective past time step • input data points comprising alternating the performance of time-domain operations • feature-domain operations to generate one or more output data points (i.e., mathematical steps or mental steps) • output data point corresponding to a respective future time step later in time than the current time step • predicted values for one or more of the features at the respective future time step Claim 1 Step 1 inquiry: Does this claim fall within a statutory category? The preamble of the claim recites “1. A system, comprising…” Therefore, it is a “system” (or “apparatus”), which is a statutory category of invention. Therefore, the answer to the inquiry is: “YES.” Step 2A (Prong One) inquiry: Are there limitations in Claim 1 that recite abstract ideas? YES. The following limitations in Claim 1 recite abstract ideas that fall within at least one of the groupings of abstract ideas enumerated in the 2019 PEG. Specifically, they are “mental steps” and “mathematical steps”: • input data point corresponding to a respective past time step earlier in time than a current time step • input data point comprising respective values for one or more features at the respective past time step • input data points comprising alternating the performance of time-domain operations • feature-domain operations to generate one or more output data points (i.e., mathematical steps or mental steps) • output data point corresponding to a respective future time step later in time than the current time step • predicted values for one or more of the features at the respective future time step Step 2A (Prong Two) inquiry: Are there additional elements or a combination of elements in the claim that apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that it is more than a drafting effort designed to monopolize the exception? Applicant’s claims contain the following “additional elements”: (1) A processor (2) A receiving of one or more input data points (3) A plurality of multi-layer perceptrons (MLPs) (1) A “processor” is a broad term which is described at a high level and includes general purpose computers. M.P.E.P. § 2106.05(f) recites: For claim limitations that do not amount to more than a recitation of the words “apply it” (or an equivalent), such as mere instructions to implement an abstract idea on a computer, examiners should explain why they do not meaningfully limit the claim in an eligibility rejection. For example, an examiner could explain that implementing an abstract idea on a generic computer, does not integrate the abstract idea into a practical application in Step 2A Prong Two… Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. This “processor” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). (2) A “receiving of one or more input data points” is a broad term which is described at a high level. M.P.E.P. § 2106.05(g) recites: 2106.05(g) Insignificant Extra-Solution Activity [R-10.2019] Another consideration when determining whether a claim integrates the judicial exception into a practical application in Step 2A Prong Two or recites significantly more in Step 2B is whether the additional elements add more than insignificant extra-solution activity to the judicial exception. The term “extra-solution activity” can be understood as activities incidental to the primary process or product that are merely a nominal or tangential addition to the claim. Extra-solution activity includes both pre-solution and post-solution activity. This “receiving of one or more input data points” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). (3) A “plurality of multi-layer perceptrons (MLPs)” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f)(2) recites in part: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. TLI Communications provides an example of a claim invoking computers and other machinery merely as a tool to perform an existing process. The court stated that the claims describe steps of recording, administration and archiving of digital images, and found them to be directed to the abstract idea of classifying and storing digital images in an organized manner. 823 F.3d at 612, 118 USPQ2d at 1747. The court then turned to the additional elements of performing these functions using a telephone unit and a server and noted that these elements were being used in their ordinary capacity (i.e., the telephone unit is used to make calls and operate as a digital camera including compressing images and transmitting those images, and the server simply receives data, extracts classification information from the received data, and stores the digital images based on the extracted information). 823 F.3d at 612-13, 118 USPQ2d at 1747-48. In other words, the claims invoked the telephone unit and server merely as tools to execute the abstract idea. Thus, the court found that the additional elements did not add significantly more to the abstract idea because they were simply applying the abstract idea on a telephone network without any recitation of details of how to carry out the abstract idea. This “plurality of multi-layer perceptrons (MLPs)” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). The answer to the inquiry is “NO”, no additional elements integrate the claimed abstract idea into a practical application. Step 2B inquiry: Does the claim provide an inventive concept, i.e., does the claim recite additional element(s) or a combination of elements that amount to significantly more than the judicial exception in the claim? Applicant’s claims contain the following “additional elements”: (1) A processor (2) A receiving of one or more input data points (3) A plurality of multi-layer perceptrons (MLPs) (1) A “processor” is a broad term which is described at a high level and includes general purpose computers. M.P.E.P. § 2016.05(f) recites: 2106.05(f) Mere Instructions To Apply An Exception [R-10.2019] Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words “apply it” (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer. As explained by the Supreme Court, in order to make a claim directed to a judicial exception patent-eligible, the additional element or combination of elements must do “‘more than simply stat[e] the [judicial exception] while adding the words ‘apply it’”. Alice Corp. v. CLS Bank, 573 U.S. 208, 221, 110 USPQ2d 1976, 1982-83 (2014) (quoting Mayo Collaborative Servs. V. Prometheus Labs., Inc., 566 U.S. 66, 72, 101 USPQ2d 1961, 1965). Thus, for example, claims that amount to nothing more than an instruction to apply the abstract idea using a generic computer do not render an abstract idea eligible. Alice Corp., 573 U.S. at 223, 110 USPQ2d at 1983. See also 573 U.S. at 224, 110 USPQ2d at 1984 (warning against a § 101 analysis that turns on “the draftsman’s art”). Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. The processor is well-understood, routine, and conventional. Applicant's Specification, paragraph [0072] recites: [0072] The server computing device 715 can include one or more processors 713 and memory 714. The memory 714 can store information accessible by the processor(s) 713, including instructions 721 that can be executed by the processor(s) 713. The memory 714 can also include data 723 that can be retrieved, manipulated, or stored by the processor(s) 713. The memory 714 can be a type of non-transitory computer readable medium capable of storing information accessible by the processor(s) 713, such as volatile and non-volatile memory. The processor(s) 713 can include one or more central processing units (CPUs), graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and/or application-specific integrated circuits (ASICs), such as tensor processing units (TPUs). Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). (2) A “receiving of one or more input data points” is a broad term which is described at a high level. M.P.E.P. § 2106.05(d)(II) recites: The courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); … Further, M.P.E.P. § 2106.05(d)(I)(2) recites in part: 2. A factual determination is required to support a conclusion that an additional element (or combination of additional elements) is well-understood, routine, conventional activity. Berkheimer v. HP, Inc., 881 F.3d 1360, 1368, 125 USPQ2d 1649, 1654 (Fed. Cir. 2018). However, this does not mean that a prior art search is necessary to resolve this inquiry. Instead, examiners should rely on what the courts have recognized, or those in the art would recognize, as elements that are well-understood, routine, conventional activity in the relevant field when making the required determination. For example, in many instances, the specification of the application may indicate that additional elements are well-known or conventional. See, e.g., Intellectual Ventures v. Symantec, 838 F.3d at 1317; 120 USPQ2d at 1359 ("The written description is particularly useful in determining what is well-known or conventional"); Internet Patents Corp. v. Active Network, Inc., 790 F.3d 1343, 1348, 115 USPQ2d 1414, 1418 (Fed. Cir. 2015) (relying on specification’s description of additional elements as "well-known", "common" and "conventional"); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 614, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (Specification described additional elements as "either performing basic computer functions such as sending and receiving data, or performing functions ‘known’ in the art."). Merely using the conventional computer to receive data is well known, understood, and conventional. Thus, it adds nothing significantly more to the judicial exception. Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). (3) A “plurality of multi-layer perceptrons (MLPs)” is a broad term which is described at a high level. Further, since the “multi-layer perceptron” is well understood, routine and conventional, simply using the multi-layer perceptron to produce a result is not eligible. M.P.E.P. § 2106.05(f) recites: For claim limitations that do not amount to more than a recitation of the words “apply it” (or an equivalent), such as mere instructions to implement an abstract idea on a computer, examiners should explain why they do not meaningfully limit the claim in an eligibility rejection. For example, an examiner could explain that implementing an abstract idea on a generic computer, does not integrate the abstract idea into a practical application in Step 2A Prong Two… Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. Therefore, simply using the multi-layer perceptron to produce a result is not eligible. Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). Therefore, the answer to the inquiry is “NO”, no additional elements provide an inventive concept that is significantly more than the claimed abstract ideas the claimed abstract idea into a practical application. Claim 1 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 2 Claim 2 recites: 2. The system of claim 1, wherein the plurality of multi-layer perceptrons comprises: one or more time-domain MLPs trained to perform one or more time-domain operations on one or more data points comprising values for one or more features at each of a plurality of time steps, and one or more feature-domain MLPs trained to perform one or more feature- domain operations on one or more data points comprising values for the one or more features at a time step common to each of the one or more data points. Applicant’s Claim 2 merely teaches the use of two sets of generic MLPs. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 2 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 3 Claim 3 recites: 3. The system of claim 2, wherein to process the one or more input data points, the one or more processors are configured to: process the one or more input data points through one or more mixer layers, each mixer layer comprising a respective time-domain MLP of the one or more time-domain MLPs and a respective feature-domain MLP of the one or more feature-domain MLPs, wherein to process the one or more mixer layers, the one or more processors are configured to: perform one or more time-domain operations using a first time-domain MLP at a first mixer layer of the one or more mixer layers to generate one or more intermediate data points; transpose the one or more intermediate data points from the time domain to the feature domain; and perform the one or more feature-domain operations on the one or more transposed intermediate data points, using a first feature-domain MLP of the first mixer layer. Applicant’s Claim 3 merely teaches using MLPs and a mental transpose operation. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 3 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 4 Claim 4 recites: 4. The system of claim 3, wherein for each time step, the one or more processors are configured to process each feature of the time step through the first time-domain MLP, and wherein for each feature, the one or more processors are configured to process each time step comprising a value for the feature through the first feature-domain MLP. Applicant’s Claim 4 merely teaches the use of two generic MLPs. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 4 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 5 Claim 5 recites: 5. The system of claim 3, wherein in processing the one or more mixer layers, the one or more processors are further configured to: normalize the values of one or more data points input to each mixer layer along both the time domain and the feature domain. Applicant’s Claim 5 merely teaches the mathematical normalization of data. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 5 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 6 Claim 6 recites: 6. The system of claim 1, wherein the one or processors are further configured to: receive one or more future data points, each future data point comprising respective values for one or more of the features at a respective future time step that is later in time than the current time step; perform one or more feature-domain operations using one or more first feature-domain MLPs on the one or more future data points to generate one or more mixed future data points; perform one or more feature-domain operations using one or more second feature-domain MLPs on the one or more input data points to generate one or more mixed input data points; align the one or more mixed input data points with the one or more mixed future data points along both the feature domain and the time domain; and process, using the plurality of multi-layer perceptrons (MLPs), the aligned mixed future and mixed input data points to generate the one or more output data points. Applicant’s Claim 6 merely teaches the receipt of data and the use of generic MLPs and the mental step of aligning data points. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 6 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 7 Claim 7 recites: 7. The system of claim 6, wherein one or more processors are further configured to: receive static data comprising values of features that do not depend on time; perform one or more feature-domain operations using one or more third feature-domain MLPs on the static data to generate mixed static data; align the mixed static data with the one or more mixed input data points and the one or more mixed future data points; and process, using the plurality of multi-layer perceptrons (MLPs), the aligned mixed future, the aligned mixed input data points, and the aligned mixed static data to generate the one or more output data points. Applicant’s Claim 7 merely teaches the receipt of data, the use of generic MLPs, the mental alignment of data. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 7 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 8 Claim 8 recites: 8. The system of claim 7, wherein the plurality of multi-layer perceptrons comprises: one or more time-domain MLPs trained to perform one or more time-domain operations on one or more data points comprising values for one or more features for each of a plurality of time steps, and one or more feature-domain MLPs trained to perform one or more feature-domain operations on one or more data points comprising values for the one or more features at a common time step. Applicant’s Claim 8 merely teaches the use of two sets of generic MLPs. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 8 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 9 Claim 9 recites: 9. The system of claim 7, wherein to process the aligned mixed future data points, the aligned mixed input data points, and the aligned mixed static data to generate the one or more output data points, the one or more processors are configured to process the one or more input data points through one or more mixer layers, each mixer layer comprising a respective time-domain MLP and a respective feature-domain MLP, wherein in processing the one or more input data points through the one or more mixer layers, the one or more processors are configured to: perform one or more time-domain operations using a first time-domain MLP of a first mixer layer to generate one or more intermediate data points; transpose the one or more intermediate data points from the time domain to the feature domain; and perform the one or more feature-domain operations using a first feature-domain MLP of the first mixer layer on the one or more transposed intermediate data points. Applicant’s Claim 9 merely teaches using MLPs and a mental transpose operation. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 9 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 10 Claim 10 recites: 10. The system of claim 9, wherein for each time step, the one or more processors are configured to process each feature of the time step through the first time-domain MLP, and wherein for each feature, the one or more processors are configured to process each time step comprising a value for the feature through the first feature-domain MLP. Applicant’s Claim 10 merely teaches the use of two generic MLPs. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 10 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 11 Claim 11 recites: 11. The system of claim 9, wherein, for each mixer layer, the one or more processors are further configured to: perform one or more feature-domain operations on the static data to generate respective mixed static data; and align the respective mixed static data with one or more data points that are output from one or more feature-domain operations performed at an earlier mixer layer. Applicant’s Claim 11 merely teaches the performance of mathematical feature domain operations and mentally aligning data. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 11 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 12 Step 1 inquiry: Does this claim fall within a statutory category? The preamble of the claim recites “12. A method comprising …” Therefore, it is a “method” (or “process”), which is a statutory category of invention. Therefore, the answer to the inquiry is: “YES.” Step 2A (Prong One) inquiry: Are there limitations in Claim 12 that recite abstract ideas? YES. The following limitations in Claim 12 recite abstract ideas that fall within at least one of the groupings of abstract ideas enumerated in the 2019 PEG. Specifically, they are “mental steps” and “mathematical steps”: • input data points, each input data point corresponding to a respective past time step earlier in time than a current time step • respective values for one or more features at the respective past time step • one or more input data points • alternating the performance of time-domain operations • feature-domain operations • output data point corresponding to a respective future time step later in time than the current time step • output data point comprising respective predicted values for one or more of the features at the respective future time step Step 2A (Prong Two) inquiry: Are there additional elements or a combination of elements in the claim that apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that it is more than a drafting effort designed to monopolize the exception? Applicant’s claims contain the following “additional elements”: (1) A processor (2) A receiving (3) A multi-layer perceptrons (1) A “processor” is a broad term which is described at a high level and includes general purpose computers. M.P.E.P. § 2106.05(f) recites: For claim limitations that do not amount to more than a recitation of the words “apply it” (or an equivalent), such as mere instructions to implement an abstract idea on a computer, examiners should explain why they do not meaningfully limit the claim in an eligibility rejection. For example, an examiner could explain that implementing an abstract idea on a generic computer, does not integrate the abstract idea into a practical application in Step 2A Prong Two… Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. This “processor” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). (2) A “receiving” is a broad term which is described at a high level. M.P.E.P. § 2106.05(g) recites: 2106.05(g) Insignificant Extra-Solution Activity [R-10.2019] Another consideration when determining whether a claim integrates the judicial exception into a practical application in Step 2A Prong Two or recites significantly more in Step 2B is whether the additional elements add more than insignificant extra-solution activity to the judicial exception. The term “extra-solution activity” can be understood as activities incidental to the primary process or product that are merely a nominal or tangential addition to the claim. Extra-solution activity includes both pre-solution and post-solution activity. This “receiving” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). (3) A “multi-layer perceptrons” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f)(2) recites in part: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. TLI Communications provides an example of a claim invoking computers and other machinery merely as a tool to perform an existing process. The court stated that the claims describe steps of recording, administration and archiving of digital images, and found them to be directed to the abstract idea of classifying and storing digital images in an organized manner. 823 F.3d at 612, 118 USPQ2d at 1747. The court then turned to the additional elements of performing these functions using a telephone unit and a server and noted that these elements were being used in their ordinary capacity (i.e., the telephone unit is used to make calls and operate as a digital camera including compressing images and transmitting those images, and the server simply receives data, extracts classification information from the received data, and stores the digital images based on the extracted information). 823 F.3d at 612-13, 118 USPQ2d at 1747-48. In other words, the claims invoked the telephone unit and server merely as tools to execute the abstract idea. Thus, the court found that the additional elements did not add significantly more to the abstract idea because they were simply applying the abstract idea on a telephone network without any recitation of details of how to carry out the abstract idea. This “multi-layer perceptrons” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). The answer to the inquiry is “NO”, no additional elements integrate the claimed abstract idea into a practical application. Step 2B inquiry: Does the claim provide an inventive concept, i.e., does the claim recite additional element(s) or a combination of elements that amount to significantly more than the judicial exception in the claim? Applicant’s claims contain the following “additional elements”: (1) A processor (2) A receiving (3) A multi-layer perceptrons (1) A “processor” is a broad term which is described at a high level and includes general purpose computers. M.P.E.P. § 2016.05(f) recites: 2106.05(f) Mere Instructions To Apply An Exception [R-10.2019] Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words “apply it” (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer. As explained by the Supreme Court, in order to make a claim directed to a judicial exception patent-eligible, the additional element or combination of elements must do “‘more than simply stat[e] the [judicial exception] while adding the words ‘apply it’”. Alice Corp. v. CLS Bank, 573 U.S. 208, 221, 110 USPQ2d 1976, 1982-83 (2014) (quoting Mayo Collaborative Servs. V. Prometheus Labs., Inc., 566 U.S. 66, 72, 101 USPQ2d 1961, 1965). Thus, for example, claims that amount to nothing more than an instruction to apply the abstract idea using a generic computer do not render an abstract idea eligible. Alice Corp., 573 U.S. at 223, 110 USPQ2d at 1983. See also 573 U.S. at 224, 110 USPQ2d at 1984 (warning against a § 101 analysis that turns on “the draftsman’s art”). Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. The processor is well-understood, routine, and conventional. Applicant's Specification, paragraph [0072] recites: [0072] The server computing device 715 can include one or more processors 713 and memory 714. The memory 714 can store information accessible by the processor(s) 713, including instructions 721 that can be executed by the processor(s) 713. The memory 714 can also include data 723 that can be retrieved, manipulated, or stored by the processor(s) 713. The memory 714 can be a type of non-transitory computer readable medium capable of storing information accessible by the processor(s) 713, such as volatile and non-volatile memory. The processor(s) 713 can include one or more central processing units (CPUs), graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and/or application-specific integrated circuits (ASICs), such as tensor processing units (TPUs). Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). (2) A “receiving” is a broad term which is described at a high level. M.P.E.P. § 2106.05(d)(II) recites: The courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); … Further, M.P.E.P. § 2106.05(d)(I)(2) recites in part: 2. A factual determination is required to support a conclusion that an additional element (or combination of additional elements) is well-understood, routine, conventional activity. Berkheimer v. HP, Inc., 881 F.3d 1360, 1368, 125 USPQ2d 1649, 1654 (Fed. Cir. 2018). However, this does not mean that a prior art search is necessary to resolve this inquiry. Instead, examiners should rely on what the courts have recognized, or those in the art would recognize, as elements that are well-understood, routine, conventional activity in the relevant field when making the required determination. For example, in many instances, the specification of the application may indicate that additional elements are well-known or conventional. See, e.g., Intellectual Ventures v. Symantec, 838 F.3d at 1317; 120 USPQ2d at 1359 ("The written description is particularly useful in determining what is well-known or conventional"); Internet Patents Corp. v. Active Network, Inc., 790 F.3d 1343, 1348, 115 USPQ2d 1414, 1418 (Fed. Cir. 2015) (relying on specification’s description of additional elements as "well-known", "common" and "conventional"); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 614, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (Specification described additional elements as "either performing basic computer functions such as sending and receiving data, or performing functions ‘known’ in the art."). Merely using the conventional computer to receive data is well known, understood, and conventional. Thus, it adds nothing significantly more to the judicial exception. Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). (3) A “multi-layer perceptron” is a broad term which is described at a high level. Further, since the “multi-layer perceptron” is well understood, routine and conventional, simply using the multi-layer perceptron to produce a result is not eligible. M.P.E.P. § 2106.05(f) recites: For claim limitations that do not amount to more than a recitation of the words “apply it” (or an equivalent), such as mere instructions to implement an abstract idea on a computer, examiners should explain why they do not meaningfully limit the claim in an eligibility rejection. For example, an examiner could explain that implementing an abstract idea on a generic computer, does not integrate the abstract idea into a practical application in Step 2A Prong Two… Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. Therefore, simply using the multi-layer perceptron to produce a result is not eligible. Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). Therefore, the answer to the inquiry is “NO”, no additional elements provide an inventive concept that is significantly more than the claimed abstract ideas the claimed abstract idea into a practical application. Claim 12 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 13 Claim 13 recites: 13. The method of claim 12, wherein the plurality of multi-layer perceptrons comprises: one or more time-domain MLPs trained to perform one or more time-domain operations on one or more data points comprising values for one or more features at each of a plurality of time steps, and one or more feature-domain MLPs trained to perform one or more feature-domain operations on one or more data points comprising values for the one or more features at a time step common to each of the one or more data points. Applicant’s Claim 13 merely teaches two sets of pretrained MLPs. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 13 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 14 Claim 14 recites: 14. The method of claim 13, wherein to process the one or more input data points, the one or more processors are configured to: process the one or more input data points through one or more mixer layers, each mixer layer comprising a respective time-domain MLP of the one or more time-domain MLPs and a respective feature-domain MLP of the one or more feature-domain MLPs, wherein to process the one or more mixer layers, the one or more processors are configured to: perform one or more time-domain operations using a first time-domain MLP at a first mixer layer of the one or more mixer layers to generate one or more intermediate data points; transpose the one or more intermediate data points from the time domain to the feature domain; and perform the one or more feature-domain operations on the one or more transposed intermediate data points, using a first feature-domain MLP of the first mixer layer. Applicant’s Claim 14 merely teaches using MLPs and a mental transpose operation. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 14 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 15 Claim 15 recites: 15. The method of claim 12, wherein the method further comprises: receiving, by the one or more processors, auxiliary data, the auxiliary data comprising one or more time-varying future data points, static data, or both the one or more time-varying future data points and static data; and wherein processing the one or more data points further comprises processing, using the plurality of multi-layer perceptrons (MLPs), the one or more input data points and the auxiliary data, comprising alternating the performance of time-domain operations and feature-domain operations to generate the one or more output data points. Applicant’s Claim 15 merely teaches the receipt of data and the use of generic MLPs. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 15 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 16 Step 1 inquiry: Does this claim fall within a statutory category? The preamble of the claim recites “16. A system comprising…” Therefore, it is a “system” (or “apparatus”), which is a statutory category of invention. Therefore, the answer to the inquiry is: “YES.” Step 2A (Prong One) inquiry: Are there limitations in Claim 16 that recite abstract ideas? YES. The following limitations in Claim 16 recite abstract ideas that fall within at least one of the groupings of abstract ideas enumerated in the 2019 PEG. Specifically, they are “mental steps” and “mathematical steps”: • historical data point corresponding to a respective past time step earlier in time than a current time step • historical data point comprising respective values for one or more features at the respective past time step • auxiliary data comprising one or more time-varying future data points, static data, or both the one or more time-varying future data points and the static data • alternating the performance of time-domain operations • feature-domain operations • output data point corresponding to a respective future time step later in time than the current time step • output data point comprising respective predicted values for one or more of the features at the respective future time step Step 2A (Prong Two) inquiry: Are there additional elements or a combination of elements in the claim that apply, rely on, or use the judicial exception in a manner that imposes a meaningful limit on the judicial exception, such that it is more than a drafting effort designed to monopolize the exception? Applicant’s claims contain the following “additional elements”: (1) A processor (2) A receiving of one or more historical data points (3) A receiving of auxiliary data (4) A multi-layer perceptron (MLP) (1) A “processor” is a broad term which is described at a high level and includes general purpose computers. M.P.E.P. § 2106.05(f) recites: For claim limitations that do not amount to more than a recitation of the words “apply it” (or an equivalent), such as mere instructions to implement an abstract idea on a computer, examiners should explain why they do not meaningfully limit the claim in an eligibility rejection. For example, an examiner could explain that implementing an abstract idea on a generic computer, does not integrate the abstract idea into a practical application in Step 2A Prong Two… Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. This “processor” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). (2) A “receiving of one or more historical data points” is a broad term which is described at a high level. M.P.E.P. § 2106.05(g) recites: 2106.05(g) Insignificant Extra-Solution Activity [R-10.2019] Another consideration when determining whether a claim integrates the judicial exception into a practical application in Step 2A Prong Two or recites significantly more in Step 2B is whether the additional elements add more than insignificant extra-solution activity to the judicial exception. The term “extra-solution activity” can be understood as activities incidental to the primary process or product that are merely a nominal or tangential addition to the claim. Extra-solution activity includes both pre-solution and post-solution activity. This “receiving of one or more historical data points” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). (3) A “receiving of auxiliary data” is a broad term which is described at a high level. M.P.E.P. § 2106.05(g) recites: 2106.05(g) Insignificant Extra-Solution Activity [R-10.2019] Another consideration when determining whether a claim integrates the judicial exception into a practical application in Step 2A Prong Two or recites significantly more in Step 2B is whether the additional elements add more than insignificant extra-solution activity to the judicial exception. The term “extra-solution activity” can be understood as activities incidental to the primary process or product that are merely a nominal or tangential addition to the claim. Extra-solution activity includes both pre-solution and post-solution activity. This “receiving of auxiliary data” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). (4) A “multi-layer perceptron (MLP)” is a broad term which is described at a high level. M.P.E.P. § 2106.05 (f)(2) recites in part: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. TLI Communications provides an example of a claim invoking computers and other machinery merely as a tool to perform an existing process. The court stated that the claims describe steps of recording, administration and archiving of digital images, and found them to be directed to the abstract idea of classifying and storing digital images in an organized manner. 823 F.3d at 612, 118 USPQ2d at 1747. The court then turned to the additional elements of performing these functions using a telephone unit and a server and noted that these elements were being used in their ordinary capacity (i.e., the telephone unit is used to make calls and operate as a digital camera including compressing images and transmitting those images, and the server simply receives data, extracts classification information from the received data, and stores the digital images based on the extracted information). 823 F.3d at 612-13, 118 USPQ2d at 1747-48. In other words, the claims invoked the telephone unit and server merely as tools to execute the abstract idea. Thus, the court found that the additional elements did not add significantly more to the abstract idea because they were simply applying the abstract idea on a telephone network without any recitation of details of how to carry out the abstract idea. This “multi-layer perceptron (MLP)” limitation does not integrate the additional element into a practical application and represents “insignificant extra-solution activity”. (See, M.P.E.P. § 2106.05(I)(A)). The answer to the inquiry is “NO”, no additional elements integrate the claimed abstract idea into a practical application. Step 2B inquiry: Does the claim provide an inventive concept, i.e., does the claim recite additional element(s) or a combination of elements that amount to significantly more than the judicial exception in the claim? Applicant’s claims contain the following “additional elements”: (1) A processor (2) A receiving of one or more historical data points (3) A receiving of auxiliary data (4) A multi-layer perceptron (MLP) (1) A “processor” is a broad term which is described at a high level and includes general purpose computers. M.P.E.P. § 2016.05(f) recites: 2106.05(f) Mere Instructions To Apply An Exception [R-10.2019] Another consideration when determining whether a claim integrates a judicial exception into a practical application in Step 2A Prong Two or recites significantly more than a judicial exception in Step 2B is whether the additional elements amount to more than a recitation of the words “apply it” (or an equivalent) or are more than mere instructions to implement an abstract idea or other exception on a computer. As explained by the Supreme Court, in order to make a claim directed to a judicial exception patent-eligible, the additional element or combination of elements must do “‘more than simply stat[e] the [judicial exception] while adding the words ‘apply it’”. Alice Corp. v. CLS Bank, 573 U.S. 208, 221, 110 USPQ2d 1976, 1982-83 (2014) (quoting Mayo Collaborative Servs. V. Prometheus Labs., Inc., 566 U.S. 66, 72, 101 USPQ2d 1961, 1965). Thus, for example, claims that amount to nothing more than an instruction to apply the abstract idea using a generic computer do not render an abstract idea eligible. Alice Corp., 573 U.S. at 223, 110 USPQ2d at 1983. See also 573 U.S. at 224, 110 USPQ2d at 1984 (warning against a § 101 analysis that turns on “the draftsman’s art”). Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. The processor is well-understood, routine, and conventional. Applicant's Specification, paragraph [0072] recites: [0072] The server computing device 715 can include one or more processors 713 and memory 714. The memory 714 can store information accessible by the processor(s) 713, including instructions 721 that can be executed by the processor(s) 713. The memory 714 can also include data 723 that can be retrieved, manipulated, or stored by the processor(s) 713. The memory 714 can be a type of non-transitory computer readable medium capable of storing information accessible by the processor(s) 713, such as volatile and non-volatile memory. The processor(s) 713 can include one or more central processing units (CPUs), graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and/or application-specific integrated circuits (ASICs), such as tensor processing units (TPUs). Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). (2) A “A receiving of one or more historical data points” is a broad term which is described at a high level. M.P.E.P. § 2106.05(d)(II) recites: The courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); … Further, M.P.E.P. § 2106.05(d)(I)(2) recites in part: 2. A factual determination is required to support a conclusion that an additional element (or combination of additional elements) is well-understood, routine, conventional activity. Berkheimer v. HP, Inc., 881 F.3d 1360, 1368, 125 USPQ2d 1649, 1654 (Fed. Cir. 2018). However, this does not mean that a prior art search is necessary to resolve this inquiry. Instead, examiners should rely on what the courts have recognized, or those in the art would recognize, as elements that are well-understood, routine, conventional activity in the relevant field when making the required determination. For example, in many instances, the specification of the application may indicate that additional elements are well-known or conventional. See, e.g., Intellectual Ventures v. Symantec, 838 F.3d at 1317; 120 USPQ2d at 1359 ("The written description is particularly useful in determining what is well-known or conventional"); Internet Patents Corp. v. Active Network, Inc., 790 F.3d 1343, 1348, 115 USPQ2d 1414, 1418 (Fed. Cir. 2015) (relying on specification’s description of additional elements as "well-known", "common" and "conventional"); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 614, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (Specification described additional elements as "either performing basic computer functions such as sending and receiving data, or performing functions ‘known’ in the art."). Merely using the conventional computer to receive data is well known, understood, and conventional. Thus, it adds nothing significantly more to the judicial exception. Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). (3) A “receiving of auxiliary data” is a broad term which is described at a high level. M.P.E.P. § 2106.05(d)(II) recites: The courts have recognized the following computer functions as well‐understood, routine, and conventional functions when they are claimed in a merely generic manner (e.g., at a high level of generality) or as insignificant extra-solution activity. i. Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 610, 118 USPQ2d 1744, 1745 (Fed. Cir. 2016) (using a telephone for image transmission); OIP Techs., Inc., v. Amazon.com, Inc., 788 F.3d 1359, 1363, 115 USPQ2d 1090, 1093 (Fed. Cir. 2015) (sending messages over a network); buySAFE, Inc. v. Google, Inc., 765 F.3d 1350, 1355, 112 USPQ2d 1093, 1096 (Fed. Cir. 2014) (computer receives and sends information over a network); … Further, M.P.E.P. § 2106.05(d)(I)(2) recites in part: 2. A factual determination is required to support a conclusion that an additional element (or combination of additional elements) is well-understood, routine, conventional activity. Berkheimer v. HP, Inc., 881 F.3d 1360, 1368, 125 USPQ2d 1649, 1654 (Fed. Cir. 2018). However, this does not mean that a prior art search is necessary to resolve this inquiry. Instead, examiners should rely on what the courts have recognized, or those in the art would recognize, as elements that are well-understood, routine, conventional activity in the relevant field when making the required determination. For example, in many instances, the specification of the application may indicate that additional elements are well-known or conventional. See, e.g., Intellectual Ventures v. Symantec, 838 F.3d at 1317; 120 USPQ2d at 1359 ("The written description is particularly useful in determining what is well-known or conventional"); Internet Patents Corp. v. Active Network, Inc., 790 F.3d 1343, 1348, 115 USPQ2d 1414, 1418 (Fed. Cir. 2015) (relying on specification’s description of additional elements as "well-known", "common" and "conventional"); TLI Communications LLC v. AV Auto. LLC, 823 F.3d 607, 614, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (Specification described additional elements as "either performing basic computer functions such as sending and receiving data, or performing functions ‘known’ in the art."). Merely using the conventional computer to receive data is well known, understood, and conventional. Thus, it adds nothing significantly more to the judicial exception. Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). (4) A “multi-layer perceptron (MLP)” is a broad term which is described at a high level. Further, since the “multi-layer perceptron” is well understood, routine and conventional, simply using the multi-layer perceptron to produce a result is not eligible. M.P.E.P. § 2106.05(f) recites: For claim limitations that do not amount to more than a recitation of the words “apply it” (or an equivalent), such as mere instructions to implement an abstract idea on a computer, examiners should explain why they do not meaningfully limit the claim in an eligibility rejection. For example, an examiner could explain that implementing an abstract idea on a generic computer, does not integrate the abstract idea into a practical application in Step 2A Prong Two… Further, M.P.E.P. § 2106.05(f)(2) recites: (2) Whether the claim invokes computers or other machinery merely as a tool to perform an existing process. Use of a computer or other machinery in its ordinary capacity for economic or other tasks (e.g., to receive, store, or transmit data) or simply adding a general purpose computer or computer components after the fact to an abstract idea (e.g., a fundamental economic practice or mathematical equation) does not integrate a judicial exception into a practical application or provide significantly more. See Affinity Labs v. DirecTV, 838 F.3d 1253, 1262, 120 USPQ2d 1201, 1207 (Fed. Cir. 2016) (cellular telephone); TLI Communications LLC v. AV Auto, LLC, 823 F.3d 607, 613, 118 USPQ2d 1744, 1748 (Fed. Cir. 2016) (computer server and telephone unit). Similarly, “claiming the improved speed or efficiency inherent with applying the abstract idea on a computer” does not integrate a judicial exception into a practical application or provide an inventive concept. Intellectual Ventures I LLC v. Capital One Bank (USA), 792 F.3d 1363, 1367, 115 USPQ2d 1636, 1639 (Fed. Cir. 2015). In contrast, a claim that purports to improve computer capabilities or to improve an existing technology may integrate a judicial exception into a practical application or provide significantly more. McRO, Inc. v. Bandai Namco Games Am. Inc., 837 F.3d 1299, 1314-15, 120 USPQ2d 1091, 1101-02 (Fed. Cir. 2016); Enfish, LLC v. Microsoft Corp., 822 F.3d 1327, 1335-36, 118 USPQ2d 1684, 1688-89 (Fed. Cir. 2016). See MPEP §§ 2106.04(d)(1) and 2106.05(a) for a discussion of improvements to the functioning of a computer or to another technology or technical field. Therefore, simply using the multi-layer perceptron to produce a result is not eligible. Therefore, the claim as a whole does not amount to significantly more than the exception itself (i.e., there is no inventive concept in the claim). (See, M.P.E.P. § 2106.05(II)). Therefore, the answer to the inquiry is “NO”, no additional elements provide an inventive concept that is significantly more than the claimed abstract ideas the claimed abstract idea into a practical application. Claim 16 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 17 Claim 17 recites: 17. The system of claim 16, wherein in processing the one or more historical data points and the auxiliary data, the one or more processors are further configured to: perform one or more feature-domain operations using one or more first feature-domain MLPs on the one or more future data points to generate one or more mixed future data points; perform one or more feature-domain operations using one or more second feature-domain MLPs on the one or more historical data points to generate one or more mixed historical data points; align the one or more mixed historical data points with the one or more mixed future data points along both the feature domain and the time domain; and process, using the plurality of multi-layer perceptrons (MLPs), the aligned mixed future and mixed historical data points to generate the one or more output data points. Applicant’s Claim 17 merely teaches the use of generic MLPs and the mental step of aligning data points. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 17 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 18 Claim 18 recites: 18. The system of claim 17, wherein in aligning the one or more mixed historical data points with the one or more mixed future data points, the one or more processors are further configured to align the one or more mixed historical data points and the one or more mixed future data points with static data that has been repeated one or more times to match at least one dimension of the one or more mixed historical data points and the one or more mixed future data points. Applicant’s Claim 18 merely teaches the mental step of aligning data points. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 18 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 19 Claim 19 recites: 19. The system of claim 18, wherein in processing the one or more historical data points and the auxiliary data, the one or more processors are configured to: process the one or more historical data points and the auxiliary data through layers of a machine learning model, wherein, for each layer, the one or processors are configured to: perform one or more feature-mixing operations on the static data, concatenate the feature-mixed static data with layer input comprising the one or more historical data points and the one or more time-varying future data points, alternate performance of one or more time-domain operations and feature-domain operations on the concatenated data to generate mixed intermediate data, and provide the mixed intermediate data as output to another layer of the machine learning model. Applicant’s Claim 19 merely teaches a generic machine learning model, mathematical “feature-mixing operations on the static data”, mental steps of concatenation of “the feature-mixed static data with layer input”, mathematical “alternate performance of one or more time-domain operations and feature-domain operations”, and the “output” of data. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 19 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim 20 Claim 20 recites: 20. The system of claim 16, wherein the plurality of multi-layer perceptrons comprises: one or more time-domain MLPs trained to perform one or more time-domain operations on one or more data points comprising values for one or more features at each of a plurality of time steps, and one or more feature-domain MLPs trained to perform one or more feature-domain operations on one or more data points comprising values for the one or more features at a time step common to each of the one or more data points. Applicant’s Claim 20 merely teaches two sets of generic MLPs that are pretrained in the time domain and feature domains. It does not integrate the abstract idea to a practical application, nor is it anything significantly more than the abstract idea. (See, 2106.05(a)(II).) Claim 20 is, therefore, NOT ELIGIBLE subject matter under 35 U.S.C. § 101. Claim Rejections - 35 U.S.C. § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. §§ 102 and 103 (or as subject to pre-AIA 35 U.S.C. §§ 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. § 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 2, 12, 13, and 16 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by Cai, et al., On-the-Fly Data Loader and Utterance-Level Aggregation for Speaker and Language Recognition, IEEE/ACM Transactions on Audio, Speech, and Language Processing, vol. 28, 16 MAR 2020, pp. 1038-1051, in its entirety. Specifically: Claim 1 Claim 1’s “one or more processors configured to” is anticipated by Cai, et al., page 1039, left column, second full paragraph, where it recites: The data loader acts as a “producer,” and the network plays the role of a “consumer.” They are mutually complementary and form a new learning scheme for DNN-based speaker and language recognition. Its implementation details are presented on a modern multiprocessing computation platform, and its performance is validated on several benchmark datasets. Claim 1’s “receive one or more input data points, each input data point corresponding to a respective past time step earlier in time than a current time step, and each input data point comprising respective values for one or more features at the respective past time step” is anticipated by Cai, et al., page 1041, left column, “Algorithm 1”, where it recites: Input: Indexed list of full-length utterances: X = [x1, x2, x3, . . . , xN−1, xN]. Each utterance is given as a one-dimensional waveform. (See, Fig. 3(a) of Cai, et al., to see the sample width “N”.) Claim 1’s “process, using a plurality of multi-layer perceptrons (MLPs), the one or more input data points comprising alternating the performance of time-domain operations and feature-domain operations to generate one or more output data points, each output data point corresponding to a respective future time step later in time than the current time step, and each output data point comprising respective predicted values for one or more of the features at the respective future time step” is anticipated by Cai, et al., page 1042, right column, first full paragraph, where it recites: The SAP layer is implemented in a manner similar to [18], [28]–[30]; that is, first the variable-length sequence {o1, o2, . . . , oT } is fed into an multi-layer perceptron (MLP) to obtain {h1, h2, . . . , hT } as a hidden representation. Further, the alternating operations occurring each iteration is anticipated by Cai, et al., page 1041, left column, “Algorithm 1”, lines 16-19, where it recites: 16: G ←Time Domain AUGMENTATION(G) 17: G ∈ RF×L ← TRANSFROM(G) 18: Z(k) ←Frequency or Feature Domain 19: AUGMENTATION(G) Further, it is anticipated by Cai, et al., page 1039, left column, fourth full paragraph, where it recites: The rest of this paper is organized as follows. An overview of the utterance-level DNN framework is presented in Section II. The general data-preparation paradigm, along with the proposed data loader, is then explained in Section III. In Section IV, several context-independent pooling layers (including the LDE layer) for dealing with the variable-length sequence are elaborated. Experimental results and discussions are presented in Section V, and conclusions are provided in Section VI. Claim 2 Claim 2’s “one or more time-domain MLPs trained to perform one or more time-domain operations on one or more data points comprising values for one or more features at each of a plurality of time steps, and” is anticipated by Cai, et al., page 1042, right column, first full paragraph, where it recites: The SAP layer is implemented in a manner similar to [18], [28]–[30]; that is, first the variable-length sequence {o1, o2, . . . , oT } is fed into an multi-layer perceptron (MLP) to obtain {h1, h2, . . . , hT } as a hidden representation. Claim 2’s “one or more feature-domain MLPs trained to perform one or more feature- domain operations on one or more data points comprising values for the one or more features at a time step common to each of the one or more data points” is anticipated by Cai, et al., page 1042, right column, first full paragraph, where it recites: The SAP layer is implemented in a manner similar to [18], [28]–[30]; that is, first the variable-length sequence {o1, o2, . . . , oT } is fed into an multi-layer perceptron (MLP) to obtain {h1, h2, . . . , hT } as a hidden representation. Claim 12 Claim 12’s “receiving, by one or more processors, one or more input data points, each input data point corresponding to a respective past time step earlier in time than a current time step, and each input data point comprising respective values for one or more features at the respective past time step” is anticipated by Cai, et al., page 1041, left column, “Algorithm 1”, where it recites: Input: Indexed list of full-length utterances: X = [x1, x2, x3, . . . , xN−1, xN]. Each utterance is given as a one-dimensional waveform. (See, Fig. 3(a) of Cai, et al., to see the sample width “N”.) Claim 12’s “processing, by the one or more processors and using a plurality of multi-layer perceptrons (MLPs), the one or more input data points, the processing comprising alternating the performance of time-domain operations and feature-domain operations to generate one or more output data points, each output data point corresponding to a respective future time step later in time than the current time step, and each output data point comprising respective predicted values for one or more of the features at the respective future time step” is anticipated by Cai, et al., page 1042, right column, first full paragraph, where it recites: The SAP layer is implemented in a manner similar to [18], [28]–[30]; that is, first the variable-length sequence {o1, o2, . . . , oT } is fed into an multi-layer perceptron (MLP) to obtain {h1, h2, . . . , hT } as a hidden representation. Further, the alternating operations occurring each iteration is anticipated by Cai, et al., page 1041, left column, “Algorithm 1”, lines 16-19, where it recites: 16: G ←Time Domain AUGMENTATION(G) 17: G ∈ RF×L ← TRANSFROM(G) 18: Z(k) ←Frequency or Feature Domain 19: AUGMENTATION(G) Further, it is anticipated by Cai, et al., page 1039, left column, fourth full paragraph, where it recites: The rest of this paper is organized as follows. An overview of the utterance-level DNN framework is presented in Section II. The general data-preparation paradigm, along with the proposed data loader, is then explained in Section III. In Section IV, several context-independent pooling layers (including the LDE layer) for dealing with the variable-length sequence are elaborated. Experimental results and discussions are presented in Section V, and conclusions are provided in Section VI. Claim 13 Claim 13’s “one or more time-domain MLPs trained to perform one or more time-domain operations on one or more data points comprising values for one or more features at each of a plurality of time steps, and” is anticipated by Cai, et al., page 1042, right column, first full paragraph, where it recites: The SAP layer is implemented in a manner similar to [18], [28]–[30]; that is, first the variable-length sequence {o1, o2, . . . , oT } is fed into an multi-layer perceptron (MLP) to obtain {h1, h2, . . . , hT } as a hidden representation. Claim 13’s “one or more feature-domain MLPs trained to perform one or more feature-domain operations on one or more data points comprising values for the one or more features at a time step common to each of the one or more data points” is anticipated by Cai, et al., page 1042, right column, first full paragraph, where it recites: The SAP layer is implemented in a manner similar to [18], [28]–[30]; that is, first the variable-length sequence {o1, o2, . . . , oT } is fed into an multi-layer perceptron (MLP) to obtain {h1, h2, . . . , hT } as a hidden representation. Claim 16 Claim 16’s “one or more processors configured to” is anticipated by Cai, et al., page 1039, left column, second full paragraph, where it recites: The data loader acts as a “producer,” and the network plays the role of a “consumer.” They are mutually complementary and form a new learning scheme for DNN-based speaker and language recognition. Its implementation details are presented on a modern multiprocessing computation platform, and its performance is validated on several benchmark datasets. Claim 16’s “receive one or more historical data points, each historical data point corresponding to a respective past time step earlier in time than a current time step, and each historical data point comprising respective values for one or more features at the respective past time step” is anticipated by Cai, et al., page 1041, left column, “Algorithm 1”, where it recites: Input: Indexed list of full-length utterances: X = [x1, x2, x3, . . . , xN−1, xN]. Each utterance is given as a one-dimensional waveform. (See, Fig. 3(a) of Cai, et al., to see the sample width “N”.) Claim 16’s “receive auxiliary data, the auxiliary data comprising one or more time-varying future data points, static data, or both the one or more time-varying future data points and the static data” is anticipated by Cai, et al., page 1046, left column, last full paragraph, where it recites: The choice of the training length range depends on the specific training data, and one could set proper lower and upper bounds, considering the training-data fitting degree. Claim 16’s “process, using a plurality of multi-layer perceptrons (MLPs), the one or more historical data points and the auxiliary data, comprising alternating the performance of time-domain operations and feature-domain operations, to generate one or more output data points, each output data point corresponding to a respective future time step later in time than the current time step, and each output data point comprising respective predicted values for one or more of the features at the respective future time step” is anticipated by Cai, et al., page 1042, right column, first full paragraph, where it recites: The SAP layer is implemented in a manner similar to [18], [28]–[30]; that is, first the variable-length sequence {o1, o2, . . . , oT } is fed into an multi-layer perceptron (MLP) to obtain {h1, h2, . . . , hT } as a hidden representation. Further, the alternating operations occurring each iteration is anticipated by Cai, et al., page 1041, left column, “Algorithm 1”, lines 16-19, where it recites: 16: G ←Time Domain AUGMENTATION(G) 17: G ∈ RF×L ← TRANSFROM(G) 18: Z(k) ←Frequency or Feature Domain 19: AUGMENTATION(G) Further, it is anticipated by Cai, et al., page 1039, left column, fourth full paragraph, where it recites: The rest of this paper is organized as follows. An overview of the utterance-level DNN framework is presented in Section II. The general data-preparation paradigm, along with the proposed data loader, is then explained in Section III. In Section IV, several context-independent pooling layers (including the LDE layer) for dealing with the variable-length sequence are elaborated. Experimental results and discussions are presented in Section V, and conclusions are provided in Section VI. Conclusion Any inquiries concerning this communication or earlier communications from the examiner should be directed to Wilbert L. Starks, Jr., who may be reached Monday through Friday, between 8:00 a.m. and 5:00 p.m. EST. or via telephone at (571) 272-3691 or email: Wilbert.Starks@uspto.gov. If you need to send an Official facsimile transmission, please send it to (571) 273-8300. If attempts to reach the examiner are unsuccessful the Examiner’s Supervisor (SPE), Kakali Chaki, may be reached at (571) 272-3719. Hand-delivered responses should be delivered to the Receptionist @ (Customer Service Window Randolph Building 401 Dulany Street, Alexandria, VA 22313), located on the first floor of the south side of the Randolph Building. Finally, information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Moreover, status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have any questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) toll-free @ 1-866-217-9197. /WILBERT L STARKS/ Primary Examiner, Art Unit 2122 WLS 25 JUN 2026
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Prosecution Timeline

Jan 19, 2024
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §101, §102 (current)

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