DETAILED ACTION
This communication is in response to Application No. 18/420,409 filed on 1/23/2024. Claims 1-20 have been examined.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 4/9/2025 is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 5-12, and 16-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kong et al. (hereinafter Kong)(US 2021/0068193) in view of Zhu et al. (hereinafter Zhu)(US 2023/0269600).
Regarding claims 1, 12, and 20, Kong teaches as follows:
An apparatus for wireless communications at a user equipment (UE)(UE 350 in figure 3), comprising:
a memory (360 in figure 3) comprising instructions; and
one or more processors (interpreted as the controller/processor 359 in figure 3) configured, individually or in any combination, to execute the instructions and cause the apparatus to:
receive a single synchronization signal block (SSB) during a synchronization signal burst set (SSBS) occurrence (Synchronization signals, including synchronization signal blocks (SSBs) and synchronization signal burst sets (SSBSs), are reference signals that may be periodically transmitted by the network and received by the UE…The UE may additionally or alternatively perform, during an SSBS, loop tracking tasks to synchronize the loops of the UE (e.g., the AGC loops, the TTLs, the FTLs, the PDP loops, and/or the channel estimation loops), see, ¶ [0006]); and
perform a loop tracking task using the single SSB, based on a downlink serving beam and an uplink serving beam of the UE (when the UE 504 is performing the loop tracking task, the UE beams (equivalent to applicant’s uplink serving beam) may be selected with respect to a serving beam (equivalent to applicant’s downlink serving beam). For example, the loop tracking task facilitates synchronizing the AGC loops, the TTL loops, the FTL loops, the PDP loops, and/or the channel estimation loops. Thus, to facilitate the performing of the loop tracking task, the UE 504 may measure characteristics associated with the serving beam, see, ¶ [0076] and figure 5).
Kong does not explicitly teach the single SSB comprising at least a physical broadcast channel (PBCH) and a secondary synchronization signal (SSS).
Zhu teaches as follows:
Wherein the single SSB comprises at least a physical broadcast channel (PBCH) and a secondary synchronization signal (SSS) (these signals may be referred to as a synchronization signal block (SSB) and may include one or more of a primary synchronization signal (PSS), a secondary synchronization signal (SSS), or a primary broadcast channel (PBCH) signal (equivalent to applicant’s physical broadcast channel), see, ¶ [0018]).
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kong with Zhu to include the synchronization signal block (SSB) including a secondary synchronization signal (SSS) and a primary broadcast channel (PBCH) signal as taught by Zhu for efficient loop processing.
Regarding claims 5 and 16, Kong teaches as follows:
Wherein the receive comprises receive the single SSB during an OFF duration of a connected-mode discontinuous reception (CDRX) cycle (the UE 104 may include a CDRX component 198 configured to select a first SSBS occurrence during which to perform a loop tracking task and a RLM task during an OFF duration of a CDRX cycle., see, ¶ [0044] and figure 1).
Regarding claims 6 and 17, Kong teaches as follows:
Wherein the perform comprises periodically perform the loop tracking task after a number of connected-mode discontinuous reception (CDRX) cycles (the UE may be configured to perform the search task every eight CDRX cycles, to perform the measurement task every eight CDRX cycles, to perform the loop tracking task every 160 ms (equivalent to one CDRX cycle), and to perform the RLM task every 320 ms, see, ¶ [0095] and the CDRX cycle has a duration of 160 ms, see, ¶ [0089]).
Regarding claims 7 and 18, Kong teaches as follows:
Wherein the loop tracking task corresponds to synchronization of one or more automatic gain control (AGC) loops of the UE (the loop tracking task facilitates synchronizing the AGC loops, the TTL loops, the FTL loops, the PDP loops, and/or the channel estimation loops, see, ¶ [0076]).
Regarding claims 8 and 19, Kong teaches as follows:
Wherein the loop tracking task corresponds to synchronization of one or more time tracking loops (TTLs) of the UE (the loop tracking task facilitates synchronizing the AGC loops, the TTL loops, the FTL loops, the PDP loops, and/or the channel estimation loops, see, ¶ [0076]).
Regarding claim 9, Kong teaches as follows:
Wherein the loop tracking task corresponds to synchronization of one or more frequency tracking loops (FTLs) of the UE (the loop tracking task facilitates synchronizing the AGC loops, the TTL loops, the FTL loops, the PDP loops, and/or the channel estimation loops, see, ¶ [0076]).
Regarding claim 10, Kong teaches as follows:
Wherein the loop tracking task corresponds to synchronization of one or more power delay profile (PDP) loops of the UE (the loop tracking task facilitates synchronizing the AGC loops, the TTL loops, the FTL loops, the PDP loops, and/or the channel estimation loops, see, ¶ [0076]).
Regarding claim 11, Kong teaches as follows:
Wherein the loop tracking task corresponds to synchronization of one or more channel estimation loops of the UE (the loop tracking task facilitates synchronizing the AGC loops, the TTL loops, the FTL loops, the PDP loops, and/or the channel estimation loops, see, ¶ [0076]).
Claims 2-4 and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over Kong et al. (hereinafter Kong)(US 2021/0068193) in view of Zhu et al. (hereinafter Zhu)(US 2023/0269600), and further in view of Zhang et al. (hereinafter Zhang)(US 2012/0314591).
Regarding claims 2-4 and 13-15, Kong in view of Zhu teaches all limitations as presented above except for measuring a time tracking loop (TTL) offset.
Zhang teaches as follows:
The UE maintains the TTL by determining a DL timing for receiving the unicast signals, determining a timing offset with respect to the DL timing for the received unicast signal, and adjusting the DL timing based on the timing offset (1202)(see, ¶ [0079] and figure 13)
Therefore, it would have been obvious for one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kong in view of Zhu with Zhang to include the UE determining a timing offset with respect to the DL timing as taught by Zhang in order to efficiently adjust the DL timing based on the determined timing offset.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Jeong S Park whose telephone number is (571)270-1597. The examiner can normally be reached Monday through Friday 8:00-4:30 ET.
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/JEONG S PARK/Primary Examiner, Art Unit 2454
January 16, 2026
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