DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set
forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this
application is eligible for continued examination under 37 CFR 1.114, and the fee set
forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action
has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on
10/27/2025 has been entered.
Response to Amendment
The office action is responding to the arguments filed on 04/01/2026. Claims 1-
5 and 7-10 are pending.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1 and 7 are rejected under 35 U.S.C. 103 as being
unpatentable over KANG et al. (US 20220137836 A1) in view of JANG et al. (US 20220334760 A1) and further in view of KE et al. (US 20170139600 A1) hereinafter KANG and JANG and KE.
Regarding claim 1, KANG teaches A storage device comprising: a memory including a plurality of memory blocks, each of the plurality of memory blocks including a plurality of pages; and (“The memory device 100 may include a memory cell array including a plurality of memory cells that store the data”) (paragraph [0029] line 1-2)
(“The memory cell array may include a plurality of memory blocks. Each memory block may include a plurality of memory cells. One memory block may include a plurality of pages”) (paragraph [0031] line 1-2) (i.e. Fig 1 illustrates memory device 100 may include a memory cell array which may include a plurality of memory blocks and each memory block may include a plurality of pages)
a controller configured to: set a plurality of zones, each of which includes one or more memory blocks among the plurality of memory blocks, (“the memory controller 200 may control at least two memory devices 100”) (paragraph [0039] line 1-2) (i.e. Fig 1 illustrates memory controller 200 may control multiple memory devices 100 which may contain multiple memory blocks)
according to a request of a host, when a sudden power-off is detected during a writing operation for a target zone among the plurality of zones, write dummy data to the target zone during a recovery operation for the sudden power-off, and (“The power manager 210 may sense the sudden power off in which the power supplied to the storage device 50 is abnormally cut off.”) (paragraph [0048] line 1-2)
(“The memory controller 200 may control the memory device 100 to perform a recovery operation for a sudden power off on a target block on which a program operation is stopped due to a sudden power off among the plurality of memory blocks. The recovery operation of the sudden power off may include a dummy program operation of storing dummy data in a page next to a page on which the program operation is stopped among the plurality of pages included in the target block”) (paragraph [0039] line 1-2) (i.e. Fig 1 illustrates The power manager 210 which is part of memory controller 200 may sense the sudden power off and memory controller 200 may control the memory device 100 to perform a recovery operation for a sudden power off during program or write operation on a target block where recovery operation may include a dummy program operation of storing dummy data in the target block)
in response to a first write request from the host for the target zone after the dummy data is written to the target zone, write data of a size matching that of the dummy data onto a target memory block. (“A first sudden power off SPO1 may occur between t1 and t2, and a first recovery operation RCV 1 may be performed after the first sudden power off SPO1. The first recovery operation RCV 1 may include an operation of programming dummy data in the second page 2 which is a first erase page on the program sequence in the memory block BLK 1”) (paragraph [0091] line 1-3)
(“The memory controller 200 may control the memory device 100 to perform a backup operation of copying data stored in the target block to a memory block different from the target block when the accumulated number of sudden power off is greater than the reference number”) (paragraph [0046] line 1-3) (i.e. Fig 4 illustrates a power off SPO1 may occur between t1 and t2 and a recovery operation RCV 1 may be performed in response which may include an operation of programming dummy data in second page in target block BLK1 which is same size. Also, The memory controller 200 may control the memory device 100 to perform a backup operation of copying data stored in the target block to a memory block different from the target block. In other words, during recovery operation after power off, controller may program or write dummy data in second page at target block or different block)
(see Fig 4, paragraph [0092] - [0094], illustrates page by page programming of data 1 and dummy data implying page program with same size)
KANG teaches memory device recovery operation from sudden power off. However, KANG does not explicitly teach wherein the target memory block, is distinct from memory blocks included in the target zone and is selected from among memory blocks that are not part of the target zone among the plurality of memory blocks
On the other hand, JANG which also relates to memory device recovery operation from sudden power off teaches teach wherein the target memory block, is distinct from memory blocks included in the target zone and is selected from among memory blocks that are not part of the target zone among the plurality of memory blocks (see Fig 1, paragraph [0050], illustrates memory controller 200 may control memory device 100 to control writing data from source block to a first target zone which is originally allocated and then allocates 2nd zone different from 1st zone when write operation is stopped)
Both KANG and JANG relate to memory device recovery operation from sudden
power off. KANG teaches memory device recovery operation from sudden power off
while writing data in page. On the other hand, JANG also teaches memory device recovery operation from sudden power off and memory controller controlling memory device to control writing data from source block to a first target zone which is originally allocated and then allocates 2nd zone different from 1st zone when write operation is stopped. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG with JANG to specify memory device recovery operation from sudden power off and memory controller controlling memory device to control writing data from source block to a first target zone which is originally allocated and then allocates 2nd zone different from 1st zone when write operation is stopped providing improved storage area management performance as mentioned in paragraph [0010].
KANG in view of JANG teaches memory device recovery operation from sudden power off above. However, KANG - JANG combination does not explicitly teach to align a write pointer of the target zone by matching a logical write order of the host with a physical storage state of the target zone; and in response to a second write request from the host for the target zone after the write pointer of the target zone is aligned by writing the first data, write second data to a memory block included in the target zone, such that an original write sequence of the first data and the second data is maintained
On the other hand, KE which also relates to memory device recovery operation from sudden power off teaches to align a write pointer of the target zone by matching a logical write order of the host with a physical storage state of the target zone; (see Fig 1, 3-4, paragraph [0025], illustrates when data storage device 140 is resumed from a power-off state controller 160 rebuilds or aligns the physical-logical mapping table in the random access memory 166 first and second block table CB0_ADT and CB1_ADT using the bit table BT similar to write pointer for logical order)
and in response to a second write request from the host for the target zone after the write pointer of the target zone is aligned by writing the first data, write second data to a memory block included in the target zone, such that an original write sequence of the first data and the second data is maintained (see Fig 1, 3-4, paragraph [0034], illustrates controller 160 can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT to organize the first current block table CB0_ADT and the second current block table CB1_ADT to rebuild the physical-logical mapping table to maintain original write sequence)
It would have been obvious to one of ordinary skill in the art at the time of
Applicant’s filing to combine KANG with JANG for the reasons set forth above. In addition, KANG, JANG and KE are considered analogous arts, because
they all relate to memory device recovery operation from sudden power off. KANG – JANG combination teaches memory device recovery operation from sudden power off
while writing data in page. On the other hand, KE also teaches memory device recovery operation from sudden power off and memory controller may determine after SPO occurred and when data storage device 140 is resumed from a power-off state controller 160 rebuilds or aligns the physical-logical mapping table in the random access memory 166 first and second block table CB0_ADT and CB1_ADT using the bit table BT similar to write pointer for logical order and also controller 160 can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT to organize the first current block table CB0_ADT and the second current block table CB1_ADT to rebuild the physical-logical mapping table to maintain original write sequence. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG – JANG combination with KE to specify memory device recovery operation from sudden power off and memory controller may determine after SPO occurred and when data storage device 140 is resumed from a power-off state controller 160 rebuilds or aligns the physical-logical mapping table in the random access memory 166 first and second block table CB0_ADT and CB1_ADT using the bit table BT similar to write pointer for logical order and also controller 160 can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT to organize the first current block table CB0_ADT and the second current block table CB1_ADT to rebuild the physical-logical mapping table to maintain original write sequence providing data maintenance method includes: reading a first current block and a second current block from the flash memory in sequence to build a first current block table and a second current block table and building a bit table according to the logical addresses of the pages of the second current block when the data storage device is resumed from a power-off state as mentioned in paragraph [0009].
Regarding claim 7, KANG teaches A method for operating a storage device, the method comprising: setting a plurality of zones according to a request of a host, each of the plurality of zones including one or more memory blocks among a plurality of memory blocks included in the storage device; (“a storage device having improved sudden power off recovery performance, and a method of operating the same are improved”) (paragraph [0011] line 1-2)
(“the memory controller 200 may control at least two memory devices 100”) (paragraph [0039] line 1-2) (i.e. Fig 1 illustrates a storage device having improved sudden power off recovery performance a method of operating the same where memory controller 200 may control multiple memory devices 100 which may contain multiple memory blocks)
detecting a sudden power-off during a writing operation for a target zone among the plurality of zones; writing dummy data to the target zone during a recovery operation for the sudden power-off; (“The power manager 210 may sense the sudden power off in which the power supplied to the storage device 50 is abnormally cut off.”) (paragraph [0048] line 1-2)
(“The memory controller 200 may control the memory device 100 to perform a recovery operation for a sudden power off on a target block on which a program operation is stopped due to a sudden power off among the plurality of memory blocks. The recovery operation of the sudden power off may include a dummy program operation of storing dummy data in a page next to a page on which the program operation is stopped among the plurality of pages included in the target block”) (paragraph [0039] line 1-2) (i.e. Fig 1 illustrates The power manager 210 which is part of memory controller 200 may sense the sudden power off and memory controller 200 may control the memory device 100 to perform a recovery operation for a sudden power off during program or write operation on a target block where recovery operation may include a dummy program operation of storing dummy data in the target block)
receiving, from the host, a first write request for the target zone after the dummy data is written to the target zone; and writing, in response to the first write request, first data of a size matching that of the dummy data onto a target memory block. (“A first sudden power off SPO1 may occur between t1 and t2, and a first recovery operation RCV 1 may be performed after the first sudden power off SPO1. The first recovery operation RCV 1 may include an operation of programming dummy data in the second page Page 2 which is a first erase page on the program sequence in the memory block BLK 1”) (paragraph [0091] line 1-3)
(“The memory controller 200 may control the memory device 100 to perform a backup operation of copying data stored in the target block to a memory block different from the target block when the accumulated number of sudden power off is greater than the reference number”) (paragraph [0046] line 1-3) (i.e. Fig 4 illustrates a power off SPO1 may occur between t1 and t2 and a recovery operation RCV 1 may be performed in response which may include an operation of programming dummy data in second page in target block BLK1 which is same size. Also, The memory controller 200 may control the memory device 100 to perform a backup operation of copying data stored in the target block to a memory block different from the target block. In other words, during recovery operation after power off, controller may program or write dummy data in second page at target block or different block)
(see Fig 4, paragraph [0092] - [0094], illustrates page by page programming of data 1 and dummy data implying page program with same size)
KANG teaches memory device recovery operation from sudden power off. However, KANG does not explicitly teach wherein the target memory block, is distinct from memory blocks included in the target zone and is selected from among memory blocks that are not part of the target zone among the plurality of memory blocks
On the other hand, JANG which also relates to memory device recovery operation from sudden power off teaches wherein the target memory block, is distinct from memory blocks included in the target zone and is selected from among memory blocks that are not part of the target zone among the plurality of memory blocks (see Fig 1, paragraph [0050], illustrates memory controller 200 may control memory device 100 to control writing data from source block to a first target zone which is originally allocated and then allocates 2nd zone different from 1st zone when write operation is stopped)
Both KANG and JANG relate to memory device recovery operation from sudden
power off. KANG teaches memory device recovery operation from sudden power off
while writing data in page. On the other hand, JANG also teaches memory device recovery operation from sudden power off and memory controller controlling memory device to control writing data from source block to a first target zone which is originally allocated and then allocates 2nd zone different from 1st zone when write operation is stopped. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG with JANG to specify memory device recovery operation from sudden power off and memory controller controlling memory device to control writing data from source block to a first target zone which is originally allocated and then allocates 2nd zone different from 1st zone when write operation is stopped providing improved storage area management performance as mentioned in paragraph [0010].
KANG in view of JANG teaches memory device recovery operation from sudden power off above. However, KANG - JANG combination does not explicitly teach to align a write pointer of the target zone by matching a logical write order of the host with a physical storage state of the target zone; and in response to a second write request from the host for the target zone after the write pointer of the target zone is aligned by writing the first data, write second data to a memory block included in the target zone, such that an original write sequence of the first data and the second data is maintained
On the other hand, KE which also relates to memory device recovery operation from sudden power off teaches to align a write pointer of the target zone by matching a logical write order of the host with a physical storage state of the target zone; (see Fig 1, 3-4, paragraph [0025], illustrates when data storage device 140 is resumed from a power-off state controller 160 rebuilds or aligns the physical-logical mapping table in the random access memory 166 first and second block table CB0_ADT and CB1_ADT using the bit table BT similar to write pointer for logical order)
and in response to a second write request from the host for the target zone after the write pointer of the target zone is aligned by writing the first data, write second data to a memory block included in the target zone, such that an original write sequence of the first data and the second data is maintained (see Fig 1, 3-4, paragraph [0034], illustrates controller 160 can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT to organize the first current block table CB0_ADT and the second current block table CB1_ADT to rebuild the physical-logical mapping table to maintain original write sequence)
It would have been obvious to one of ordinary skill in the art at the time of
Applicant’s filing to combine KANG with JANG for the reasons set forth above. In addition, KANG, JANG and KE are considered analogous arts, because
they all relate to memory device recovery operation from sudden power off. KANG – JANG combination teaches memory device recovery operation from sudden power off
while writing data in page. On the other hand, KE also teaches memory device recovery operation from sudden power off and memory controller may determine after SPO occurred and when data storage device 140 is resumed from a power-off state controller 160 rebuilds or aligns the physical-logical mapping table in the random access memory 166 first and second block table CB0_ADT and CB1_ADT using the bit table BT similar to write pointer for logical order and also controller 160 can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT to organize the first current block table CB0_ADT and the second current block table CB1_ADT to rebuild the physical-logical mapping table to maintain original write sequence. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG – JANG combination with KE to specify memory device recovery operation from sudden power off and memory controller may determine after SPO occurred and when data storage device 140 is resumed from a power-off state controller 160 rebuilds or aligns the physical-logical mapping table in the random access memory 166 first and second block table CB0_ADT and CB1_ADT using the bit table BT similar to write pointer for logical order and also controller 160 can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT to organize the first current block table CB0_ADT and the second current block table CB1_ADT to rebuild the physical-logical mapping table to maintain original write sequence providing data maintenance method includes: reading a first current block and a second current block from the flash memory in sequence to build a first current block table and a second current block table and building a bit table according to the logical addresses of the pages of the second current block when the data storage device is resumed from a power-off state as mentioned in paragraph [0009].
Claim(s) 2-3,5,8 and 10 are rejected under 35 U.S.C. 103 as being
unpatentable over KANG in view of JANG and further in view of KE and further in view of LIANG et al. (US 20220066527 A1) hereinafter LIANG.
Regarding claim 2, KANG in view of JANG and further in view of KE teaches memory device recovery operation from sudden power off of claim 1. However, KANG - JANG - KE combination does not explicitly teach The storage device according to claim 1, wherein the size of the first data is a multiple of a size of a page.
On the other hand, LIANG which also relates to memory device recovery operation from sudden power off teaches The storage device according to claim 1, wherein the size of the first data is a multiple of a size of a page. (“When the controller 130 performs a data writing (programming) operation on the non-volatile memory 120, the data writing operation are performed in units of physical pages”) (paragraph [0024] line 1-2) (i.e. data writing (programming) operation on the non-volatile memory 120 are performed in units of physical pages)
It would have been obvious to one of ordinary skill in the art at the time of
Applicant’s filing to combine KANG – JANG combination with KE for the reasons set forth in claim 1 above. In addition, KANG, JANG, KE and LIANG are considered analogous arts, because they all relate to memory device recovery operation from sudden power off. KANG – JANG - KE combination teaches memory device recovery operation from sudden power off while writing data in page. On the other hand, LIANG also teaches memory device recovery operation from sudden power off and writing data in units of physical pages. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG - JANG - KE combination with LIANG to specify memory device recovery operation from sudden power off and writing data in units of physical pages providing storage device restoration to the previous working state when it is powered on again as mentioned in paragraph [0003].
Regarding claim 3, KANG in view of JANG and further in view of KE teaches memory device recovery operation from sudden power off of claim 1. However, KANG - JANG - KE combination does not explicitly teach The storage device according to claim 1, wherein when writing the first data to the target memory block, the controller generates mapping information indicating a mapping relationship between an index corresponding to the data within the target zone and a location where the data is stored within the target memory block to maintain the logical write order.
On the other hand, LIANG which also relates to memory device recovery operation from sudden power off teaches The storage device according to claim 1, wherein when writing the first data to the target memory block, the controller generates mapping information indicating a mapping relationship between an index corresponding to the data within the target zone and a location where the data is stored within the target memory block to maintain the logical write order. (“the controller 130 obtains the physical address corresponding to the data to be read by the external host through the logical-to-physical mapping table and/or the cached mapping table”) (paragraph [0025] line 9-10)(“the system information includes the cached mapping table (CMT) in the volatile memory 110, the data information of each block in the non-volatile memory 120, and the location of the block currently programmed in the non-volatile memory 120”) (paragraph [0031] line 1-3) (i.e. Fig 1 illustrates controller 130 obtains the physical address corresponding to the data to be read by the external host through the logical-to-physical mapping table or the cached mapping table (CMT) and system information includes CMT, target block of current programming, location of block. In other words, controller obtaining mapping information of corresponding data location and target block)
It would have been obvious to one of ordinary skill in the art at the time of
Applicant’s filing to combine KANG – JANG combination with KE for the reasons set forth in claim 1 above. In addition, KANG, JANG, KE and LIANG are considered analogous arts, because they all relate to memory device recovery operation from sudden power off. KANG – JANG - KE combination teaches memory device recovery operation from sudden power off while writing data in page. On the other hand, LIANG also teaches memory device recovery operation from sudden power off and controller obtaining mapping information of corresponding data location and target block. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG - JANG - KE combination with LIANG to specify memory device recovery operation from sudden power off and controller obtaining mapping information of corresponding data location and target block providing storage device restoration to the previous working state when it is powered on again as mentioned in paragraph [0003].
Regarding claim 5, KANG in view of JANG and further in view of KE teaches memory device recovery operation from sudden power off of claim 3. However, KANG - JANG - KE combination does not explicitly teach The storage device according to claim 3, wherein the index corresponding to the first data within the target zone and the location where the first data is stored in the target memory block are mapped by units of the size of the data.
On the other hand, LIANG which also relates to memory device recovery operation from sudden power off teaches The storage device according to claim 3, wherein the index corresponding to the first data within the target zone and the location where the first data is stored in the target memory block are mapped by units of the size of the data. (“When the controller 130 performs a data writing (programming) operation on the non-volatile memory 120, the data writing operation are performed in units of physical pages”) (paragraph [0024] line 1-2)
(“the controller 130 may select a block from a plurality of blocks of the non-volatile memory 120 as a current block to write the data, and maintain the cached mapping table (CMT) in the volatile memory 110 for recording the correspondence between the physical address and the logical address of each physical page of the current block”) (paragraph [0025] line 1-4) (i.e. Fig 1 illustrates the controller 130 performs a data writing (programming) operation on the non-volatile memory 120 in units of physical pages and maintain the cached mapping table (CMT) in the volatile memory 110 for correspondence between the physical address and the logical address of each physical page of the target block)
The same motivation that was utilized for combining KANG - JANG - KE combination with LIANG as set forth in claim 3 is equally applicable to claim 5.
Regarding claim 8, KANG in view of JANG and further in view of KE teaches memory device recovery operation from sudden power off of claim 7. However, KANG - JANG - KE combination does not explicitly teach The method according to claim 7, wherein the writing of the first data onto the target memory block comprises: generating mapping information indicating a mapping relationship between an index corresponding to the first data within the target zone and a location where the first data is stored within the target memory block.
On the other hand, LIANG which also relates to memory device recovery operation from sudden power off teaches The method according to claim 7, wherein the writing of the first data onto the target memory block comprises: generating mapping information indicating a mapping relationship between an index corresponding to the first data within the target zone and a location where the first data is stored within the target memory block. (“the controller 130 obtains the physical address corresponding to the data to be read by the external host through the logical-to-physical mapping table and/or the cached mapping table”) (paragraph [0025] line 9-10)(“the system information includes the cached mapping table (CMT) in the volatile memory 110, the data information of each block in the non-volatile memory 120, and the location of the block currently programmed in the non-volatile memory 120”) (paragraph [0031] line 1-3) (i.e. Fig 1 illustrates controller 130 obtains the physical address corresponding to the data to be read by the external host through the logical-to-physical mapping table or the cached mapping table (CMT) and system information includes CMT, target block of current programming, location of block. In other words, controller obtaining mapping information of corresponding data location and target block)
It would have been obvious to one of ordinary skill in the art at the time of
Applicant’s filing to combine KANG – JANG combination with KE for the reasons set forth in claim 1 above. In addition, KANG, JANG, KE and LIANG are considered analogous arts, because they all relate to memory device recovery operation from sudden power off. KANG – JANG - KE combination teaches memory device recovery operation from sudden power off while writing data in page. On the other hand, LIANG also teaches memory device recovery operation from sudden power off and controller obtaining mapping information of corresponding data location and target block. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG – JANG - KE combination with LIANG to specify memory device recovery operation from sudden power off and controller obtaining mapping information of corresponding data location and target block providing storage device restoration to the previous working state when it is powered on again as mentioned in paragraph [0003].
Regarding claim 10, KANG in view of JANG and further in view of KE teaches memory device recovery operation from sudden power off of claim 8. However, KANG - JANG - KE combination does not explicitly teach The method according to claim 8, wherein the index corresponding to the first data within the target zone and the location where the first data is stored within the target memory block are mapped by units of the size of the first data.
On the other hand, LIANG which also relates to memory device recovery operation from sudden power off teaches The method according to claim 8, wherein the index corresponding to the first data within the target zone and the location where the first data is stored within the target memory block are mapped by units of the size of the first data. (“When the controller 130 performs a data writing (programming) operation on the non-volatile memory 120, the data writing operation are performed in units of physical pages”) (paragraph [0024] line 1-2)
(“the controller 130 may select a block from a plurality of blocks of the non-volatile memory 120 as a current block to write the data, and maintain the cached mapping table (CMT) in the volatile memory 110 for recording the correspondence between the physical address and the logical address of each physical page of the current block”) (paragraph [0025] line 1-4) (i.e. Fig 1 illustrates the controller 130 performs a data writing (programming) operation on the non-volatile memory 120 in units of physical pages and maintain the cached mapping table (CMT) in the volatile memory 110 for correspondence between the physical address and the logical address of each physical page of the target block)
The same motivation that was utilized for combining KANG - JANG - KE combination with LIANG as set forth in claim 8 is equally applicable to claim 10.
Claim(s) 4 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over KANG in view of JANG and further in view of KE and further in view of LIANG and further in view of LEE et al. (US 20210182148 A1) hereinafter LEE.
Regarding claim 4, KANG in view of JANG and further in view of KE and further in view of LIANG teaches memory device recovery operation from sudden power off of claim 3. However, KANG - JANG - KE - LIANG combination does not explicitly teach The storage device according to claim 3, wherein the mapping information includes flag information indicating that the first data is stored in the target memory block.
On the other hand, LEE which also relates to memory device recovery operation from sudden power off teaches The storage device according to claim 3, wherein the mapping information includes flag information indicating that the first data is stored in the target memory block. (“a page storing normal data NM_DATA, for which a recovery operation has succeeded are stored, remains in a valid state, but a page storing normal data NM_DATA for which a recovery operation has failed reverts to an invalid state”) (paragraph [0103] line 7-9) (i.e. Fig 5 illustrates in step 1305 a page storing normal data NM_DATA where a recovery operation has succeeded are stored remains in a valid state and if failed to store then reverts to invalid state. In other words, examiner considers this valid/invalid state as flag which points to indication of storing data)
It would have been obvious to one of ordinary skill in the art at the time of
Applicant’s filing to combine KANG - JANG - KE combination with LIANG for the reasons set forth in claim 3 above. In addition, KANG, JANG, KE, LIANG and LEE are considered analogous arts, because they all relate to memory device recovery operation from sudden power off. KANG - JANG - KE - LIANG combination teaches memory device recovery operation from sudden power off while writing data in page. On the other hand, LEE also teaches memory device recovery operation from sudden power off while writing data and valid/invalid state as flag pointing to indication of storing data. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG - JANG - KE – LIANG combination with LEE to specify teaches memory device recovery operation from sudden power off while writing data and valid/invalid state as flag pointing to indication of storing data providing selective recovery operation for normal data searched in the first searching and not performing the recovery operation for boot data searched in the first searching as mentioned in paragraph [0018].
Regarding claim 9, KANG in view of JANG and further in view of KE and further in view of LIANG teaches memory device recovery operation from sudden power off of claim 8. However, KANG - JANG - KE - LIANG combination does not explicitly teach The method according to claim 8, wherein the mapping information includes flag information indicating that the first data is stored within the target memory block.
On the other hand, LEE which also relates to memory device recovery operation from sudden power off teaches The method according to claim 8, wherein the mapping information includes flag information indicating that the first data is stored within the target memory block. (“a page storing normal data NM_DATA, for which a recovery operation has succeeded are stored, remains in a valid state, but a page storing normal data NM_DATA for which a recovery operation has failed reverts to an invalid state”) (paragraph [0103] line 7-9) (i.e. Fig 5 illustrates in step 1305 a page storing normal data NM_DATA where a recovery operation has succeeded are stored remains in a valid state and if failed to store then reverts to invalid state. In other words, examiner considers this valid/invalid state as flag which points to indication of storing data)
It would have been obvious to one of ordinary skill in the art at the time of
Applicant’s filing to combine KANG - JANG - KE combination with LIANG for the reasons set forth in claim 3 above. In addition, KANG, JANG, KE, LIANG and LEE are considered analogous arts, because they all relate to memory device recovery operation from sudden power off. KANG - JANG - KE - LIANG combination teaches memory device recovery operation from sudden power off while writing data in page. On the other hand, LEE also teaches memory device recovery operation from sudden power off while writing data and valid/invalid state as flag pointing to indication of storing data. Therefore, it would have been obvious to one of ordinary skill at the time the invention was effectively filed to combine KANG - JANG - KE – LIANG combination with LEE to specify teaches memory device recovery operation from sudden power off while writing data and valid/invalid state as flag pointing to indication of storing data providing selective recovery operation for normal data searched in the first searching and not performing the recovery operation for boot data searched in the first searching as mentioned in paragraph [0018].
Response to Arguments
Applicant’s arguments filed on 04/01/2026 have been fully considered but they
are not persuasive.
Applicant’s first argument is claims 1 and 7 amendments mapping by primary
reference KANG and secondary references JANG and LEE in page 12 of the response: While Lee's method is a general resource management technique, the claimed invention is a specific Zoned Storage recovery protocol that maintains the sequential write constraints of a zone even after an abnormal termination.
As Independent Claim 1 now clearly recites a specific sequence of operations aimed at
write pointer alignment that is not found in the combined teachings of Kang, Jang, Lee, and other cited references.
None of the cited references, taken alone or in combination, disclose or suggest each and every element of claim 1.
In summary, applicant argued that primary and secondary references KANG, JANG and LEE do not teach amended limitation SPO recovery protocol maintains original write sequence. The amendment necessitates adding secondary reference KE in this regard. For further clarification examiner cites portion from KE. Also, for applicant’s understanding examiner would like to explain the teachings of KE and examiner’s interpretation in more detail here. see Fig 1, 3-4, paragraph [0025], KE teaches when data storage device 140 is resumed from a power-off state controller 160 rebuilds or aligns the physical-logical mapping table in the random-access memory 166 first and second block table CB0_ADT and CB1_ADT using the bit table BT similar to write pointer for logical order. Also see Fig 1, 3-4, paragraph [0034], KE teaches controller 160 can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT to organize the first current block table CB0_ADT and the second current block table CB1_ADT to rebuild the physical-logical mapping table to maintain original write sequence. The cited portion along with Fig 1 and 3-4 clearly teaches when data storage device is resumed from a power-off state controller rebuilds or aligns the physical-logical mapping table in the random-access memory and controller can identify the write sequence of the data with the original logical address in the current blocks according to the write sequence numbers and the bit table BT. Thus, the rejection of amended claims 1 and 7 is maintained.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/S.K.C./Examiner, Art Unit 2132
/HOSAIN T ALAM/Supervisory Patent Examiner, Art Unit 2132
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