DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 5, 8, 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen).
Regarding claim 1:
Cohen teaches:
“A quantum control system, comprising:” (Cohen Col. 7, lines 26-35 “FIG. 3B shows an example implementation of the quantum controller of FIG. 2. The example quantum controller shown comprises pulsers 302.sub.1-302.sub.L-1, receive analog frontend 350, input manager 352, digital manager 354, pulse operations manager 356, pulse operations 358, output manager 360, transmit analog frontend 362, data exchange 364, synchronization manager 366, and input/output manager 368. Circuitry depicted in FIG. 3B other than pulser circuits 302.sub.0-302.sub.L-1 corresponds to an example implementation of the shared circuitry 310 of FIG. 3A.”)
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“a backplane;” (Cohen Col. 5, lines 48-51 “The shared circuitry 310 may be: integrated with the quantum controller (e.g., on the same field programmable gate array or application specific integrated circuitry or printed circuit board);”)
“a routing module;” (Cohen Col. 5, lines 27-56 “In the example implementation shown, the shared circuitry 310 comprises circuitry for exchanging information with the pulser circuits 302.sub.0-302.sub.L-1 over signal paths 304.sub.0-304.sub.L-1, 306.sub.0-306.sub.L-A, and 308.sub.0-308.sub.L-1, where each signal path 308.sub.I carries outbound pulses generated by the pulser circuit 302.sub.I, each signal path 306.sub.I carries inbound pulses to be processed by pulser circuit 302.sub.I, and each signal path 304.sub.I carries control information such as flag/status signals, data read from memory, data to be stored in memory, data streamed to/from the quantum programming subsystem 202, and data to be exchanged between two or more pulsers 302.sub.0-302.sub.L. Similarly, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum processor 218 over signal paths 315.sub.0-315.sub.M-1 and 313.sub.1-313.sub.K-1, where each signal path 315.sub.m (m an integer between 0 and M−1) carries inbound pulses from the quantum processor 218, and each signal path 313.sub.k (k an integer between 0 and K−1) carries outbound pulses to the quantum processor 218. Additionally, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum programming subsystem over signal path 311. The shared circuitry 310 may be: integrated with the quantum controller (e.g., on the same field programmable gate array or application specific integrated circuitry or printed circuit board); external to the quantum controller (e.g., on a separate FPGA, ASIC, or PCB connected to the quantum controller via one or more cables, backplanes, in other devices connected to the quantum processor 218, etc.); or partially integrated with the quantum controller and partially external to the quantum controller.” Examiner notes the routing module performs the task of data interaction as the shared circuitry does in Cohen.)
“at least one quantum state control module;” (Cohen Col. 4, lines 59-66 “In the example implementation shown, each pulser circuit 302.sub.I (I an integer between 0 and L−1) comprises circuitry for exchanging information over signal paths 3041, 3061, and 308.sub.I, where the signal path 308.sub.I carries outbound pulses (e.g., 213 of FIG. 2) generated by the pulser circuit 302.sub.I (which may be control pulses sent to the quantum processor 128 to manipulate a state of one or more qubits and/or readout pulses to readout a state of one or more qubits)”)
“at least one frequency control module;” (Cohen Col. 5, lines 5-10 “Each pulser circuit 302.sub.I comprises circuitry operable to generate outbound pulses on signal path 3081 according to quantum control operations to be performed on the quantum processor 218. This involves very precisely controlling characteristics such as phase, frequency, amplitude, and timing of the outbound pulses.”)
“and at least one measurement module,” (Cohen Col. 4, lines 59-66 “In the example implementation shown, each pulser circuit 302.sub.I (I an integer between 0 and L−1) comprises circuitry for exchanging information over signal paths 3041, 3061, and 308.sub.I, where the signal path 308.sub.I carries outbound pulses (e.g., 213 of FIG. 2) generated by the pulser circuit 302.sub.I (which may be control pulses sent to the quantum processor 128 to manipulate a state of one or more qubits and/or readout pulses to readout a state of one or more qubits)” Examiner notes the readout pulse constitutes a measurement.)
“wherein the at least one quantum state control module, the at least one frequency control module, the at least one measurement module, and the routing module are arranged in respective sockets of the backplane to form a measurement and control integrated backplane for a quantum chip,” (Cohen Col. 5, lines 48-51 “The shared circuitry 310 may be: integrated with the quantum controller (e.g., on the same field programmable gate array or application specific integrated circuitry or printed circuit board);” Examiner notes Figs. 3A and 3B (see figures above) teach the respective sockets of the described backplane. Examiner also notes that the number of pulsers can be greater than the number displayed in the figure as disclosed in Cohen Col. 4, lines 54-58 “FIG. 3A shows an example quantum controller architecture in accordance with various example implementations of this disclosure. The quantum controller 210 comprises L (an integer≥1) pulser circuits 302.sub.0-302.sub.L-1 and shared circuitry 310.”)
“and wherein the at least one quantum state control module, the at least one frequency control module, and the at least one measurement module are all in communication connection with the routing module, and perform data interaction by means of the routing module, so that the at least one quantum state control module outputs an initial quantum state control signal, the at least one frequency control module outputs an initial frequency control signal, and the at least one measurement module outputs an initial measurement signal.” (Cohen Col. 5, lines 27-56 “In the example implementation shown, the shared circuitry 310 comprises circuitry for exchanging information with the pulser circuits 302.sub.0-302.sub.L-1 over signal paths 304.sub.0-304.sub.L-1, 306.sub.0-306.sub.L-A, and 308.sub.0-308.sub.L-1, where each signal path 308.sub.I carries outbound pulses generated by the pulser circuit 302.sub.I, each signal path 306.sub.I carries inbound pulses to be processed by pulser circuit 302.sub.I, and each signal path 304.sub.I carries control information such as flag/status signals, data read from memory, data to be stored in memory, data streamed to/from the quantum programming subsystem 202, and data to be exchanged between two or more pulsers 302.sub.0-302.sub.L. Similarly, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum processor 218 over signal paths 315.sub.0-315.sub.M-1 and 313.sub.1-313.sub.K-1, where each signal path 315.sub.m (m an integer between 0 and M−1) carries inbound pulses from the quantum processor 218, and each signal path 313.sub.k (k an integer between 0 and K−1) carries outbound pulses to the quantum processor 218. Additionally, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum programming subsystem over signal path 311. The shared circuitry 310 may be: integrated with the quantum controller (e.g., on the same field programmable gate array or application specific integrated circuitry or printed circuit board); external to the quantum controller (e.g., on a separate FPGA, ASIC, or PCB connected to the quantum controller via one or more cables, backplanes, in other devices connected to the quantum processor 218, etc.); or partially integrated with the quantum controller and partially external to the quantum controller.” Examiner notes the routing module performs the task of data interaction as the shared circuitry does in Cohen.)
Regarding claim 5:
Cohen teaches all the limitations of claim 1.
Cohen further teaches:
“wherein the at least one quantum state control module, the at least one frequency control module, and the at least one measurement module are arranged in the sockets of the backplane and distributed with the routing module being a center.” (Cohen Col. 5, lines 27-56 “In the example implementation shown, the shared circuitry 310 comprises circuitry for exchanging information with the pulser circuits 302.sub.0-302.sub.L-1 over signal paths 304.sub.0-304.sub.L-1, 306.sub.0-306.sub.L-A, and 308.sub.0-308.sub.L-1, where each signal path 308.sub.I carries outbound pulses generated by the pulser circuit 302.sub.I, each signal path 306.sub.I carries inbound pulses to be processed by pulser circuit 302.sub.I, and each signal path 304.sub.I carries control information such as flag/status signals, data read from memory, data to be stored in memory, data streamed to/from the quantum programming subsystem 202, and data to be exchanged between two or more pulsers 302.sub.0-302.sub.L. Similarly, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum processor 218 over signal paths 315.sub.0-315.sub.M-1 and 313.sub.1-313.sub.K-1, where each signal path 315.sub.m (m an integer between 0 and M−1) carries inbound pulses from the quantum processor 218, and each signal path 313.sub.k (k an integer between 0 and K−1) carries outbound pulses to the quantum processor 218. Additionally, in the example shown the shared circuitry 310 comprises circuitry for exchanging information with the quantum programming subsystem over signal path 311. The shared circuitry 310 may be: integrated with the quantum controller (e.g., on the same field programmable gate array or application specific integrated circuitry or printed circuit board); external to the quantum controller (e.g., on a separate FPGA, ASIC, or PCB connected to the quantum controller via one or more cables, backplanes, in other devices connected to the quantum processor 218, etc.); or partially integrated with the quantum controller and partially external to the quantum controller.” Examiner notes the routing module performs the task of data interaction as the shared circuitry does in Cohen. Examiner also notes the shared circuitry acts as the center for communication between modules.)
Regarding claim 8:
Cohen teaches all the limitations of claim 1.
Cohen further teaches:
“further comprising a control module arranged in a socket of the backplane,” (Cohen Col. 7 lines 26-35 “FIG. 3B shows an example implementation of the quantum controller of FIG. 2. The example quantum controller shown comprises pulsers 302.sub.1-302.sub.L-1, receive analog frontend 350, input manager 352, digital manager 354, pulse operations manager 356, pulse operations 358, output manager 360, transmit analog frontend 362, data exchange 364, synchronization manager 366, and input/output manager 368. Circuitry depicted in FIG. 3B other than pulser circuits 302.sub.0-302.sub.L-1 corresponds to an example implementation of the the shared circuitry 310 of FIG. 3A.” Examiner notes the shared circuitry has been determined to be arranged in a socket of the backplane (see analysis of claim 1).)
“wherein the control module is configured to acquire signal delay data and output the signal delay data externally, wherein the signal delay data is acquired from the at least one quantum state control module, the at least one frequency control module and the at least one measurement module.”(Cohen Col. 10 line 47 – Col. 11 line 2 “The digital manager 354 comprises circuitry operable to process and/or route digital control signals (DigCtrl.sub.0-DigCtrl.sub.J-1) to various circuits of the quantum controller 210 and/or external circuits coupled to the quantum controller 210. In the example implementation shown, the digital manager receives, from each pulser 302.sub.I, (e.g., via one or more of signal paths 304.sub.0-304.sub.N-1) a digital signal D.sub.I that is to be processed and routed by the digital manager 354, and a control signal D_port.sub.I that indicates to which output port(s) of the digital manager 354 the signal D.sub.I should be routed. The digital control signals may be routed to, for example, any one or more of circuits shown in FIG. 3B, switches/gates which connect and disconnect the outputs AO.sub.0-AO.sub.K-1 from the quantum processor 218, external circuits coupled to the quantum controller 210 such as microwave mixers and amplifiers, and/or any other circuitry which can benefit from on real-time information from the pulser circuits 302.sub.0-302.sub.L-1. Each such destination of the digital signals may require different operations to be performed on the digital signal (such as delay, broadening, or digital convolution with a given digital pattern). These operations may be performed by the digital manager 354 and may be specified by control signals from the pulsers 302.sub.0-302.sub.L-1.” Examiner notes Cohen teaches the signal delay as one of the operations to be performed as well as the ability of the digital manager to output the signal delay data externally.)
Regarding claim 17, claim 17 recites substantially similar limitations to claim 1, and is therefore rejected under the same analysis.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen) as applied to claim 1 in view of Johnson et al. (US 2021/0013391 A1) (hereafter referred to as Johnson).
Regarding claim 2:
Cohen teaches all the limitations of claim 1.
Cohen does not distinctly disclose:
“wherein a number of qubits controlled by the quantum state control module and the frequency control module is greater than or equal to a number of qubits read and measured by the measurement module.”
However, Johnson teaches:
“wherein a number of qubits controlled by the quantum state control module and the frequency control module is greater than or equal to a number of qubits read and measured by the measurement module.” (Johnson ¶108, “The quantum computer 104 includes a qubit control system 122, operatively coupled to control each of the qubits, for example via various interfaces, i.e., inductive interfaces that selectively couple a flux to the qubit. The quantum computer 104 includes a coupler control system 124, operatively coupled to control each of the couplers, for example via various interfaces, i.e., inductive interfaces that selectively couple a flux to the coupler to set a strength of coupling or “coupling strength” of the coupler. The quantum computer 104 includes a read out control system 126, operatively coupled to control various interfaces operable to read out a state of each of the qubits.” Examiner notes the control system of Johnson controls each of the qubits as well as reads out each of the qubits making the number of qubits controlled equal to the number of qubits measured.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the controlling and reading of all qubits of Johnson in order to allow the selective altering of qubits in a quantum computing system (Johnson ¶108).
Regarding claim 3:
Cohen as modified teaches all the limitations of claim 2.
Cohen as modified further teaches:
“wherein each of the quantum state control module, the frequency control module, and the measurement module comprises a plurality of output channels.” (Cohen Col. 5, lines 5-22 “Each pulser circuit 302.sub.I comprises circuitry operable to generate outbound pulses on signal path 3081 according to quantum control operations to be performed on the quantum processor 218. This involves very precisely controlling characteristics such as phase, frequency, amplitude, and timing of the outbound pulses. The characteristics of an outbound pulse generated at any particular time may be determined, at least in part, on inbound pulses received from the quantum processor 218 (via shared circuitry 310 and signal path 3061) at a prior time. In an example implementation, the time required to close the feedback loop (i.e., time from receiving a first pulse on one or more of paths 315.sub.1-315.sub.L (e.g., at an analog to digital converter of the path) to sending a second pulse on one or more of paths 313.sub.1-313.sub.L-1 (e.g., at an output of a digital-to-analog converter of the path), where the second pulse is based on the first pulse) is significantly less than the coherence time of the qubits of the quantum processor 218.” Examiner notes that the modules are taught by the pulsers which each are taught here to have one or more paths disclosing a plurality of output channels.)
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen) as applied to claim 1 in view of Johnson et al. (US 2021/0013391 A1) (hereafter referred to as Johnson) as applied to claim 3 further in view of Javadiabhari et al. (US 11,537,925 B2) (hereafter referred to as Javadiabhari).
Regarding claim 4:
Cohen as modified teaches all the limitations of claim 3.
Cohen does not distinctly disclose:
“wherein the quantum state control module comprises a first digital-to-analog converter (DAC) or a first arbitrary waveform generator (AWG), the frequency control module comprises a second DAC or a second AWG, the measurement module comprises an analog-to-digital/digital-to-analog converter (ADC/DAC), or comprises a third ADC, or comprises a third AGW and a data acquisition (DAQ) unit, and the routing module comprises a field programmable gate array (FPGA).”
However, Javadiabhari teaches:
“wherein the quantum state control module comprises a first digital-to-analog converter (DAC) or a first arbitrary waveform generator (AWG), the frequency control module comprises a second DAC or a second AWG, the measurement module comprises an analog-to-digital/digital-to-analog converter (ADC/DAC), or comprises a third ADC, or comprises a third AGW and a data acquisition (DAQ) unit, and the routing module comprises a field programmable gate array (FPGA).” (Javadiabhari Fig. 3
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Examiner notes Javadiabhari discloses four modules comprising an ADC, two DACs, and an FPGA with the data routed through the FPGA.
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the data conversion of Javadiabhari in order to convert a digital input from the controller into an analog input at a microwave frequency to control a quantum state of the corresponding qubit (Javadiabhari Col. 1, lines 62-65).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen) as applied to claim 1 in view of He (CN 112558734 A) (hereafter referred to as He).
Cohen teaches all the limitations of claim 1.
Cohen does not distinctly disclose:
“further comprising a heat dissipation component connected to a control module,”
“wherein the control module sends a temperature control instruction to the heat dissipation component according to temperature information in the quantum control apparatus, to control the heat dissipation component to operate in different states.”
However, He teaches:
“further comprising a heat dissipation component connected to a control module, wherein the control module sends a temperature control instruction to the heat dissipation component according to temperature information in the quantum control apparatus, to control the heat dissipation component to operate in different states.” (He Page 3, §Disclosure of Invention ¶4-6 “the data processing module receives and processes the internal temperature information, the real-time external temperature information and the cooling duration information to generate first heat dissipation information, second heat dissipation information, comprehensive heat dissipation information and heat dissipation efficiency evaluation information; the first heat dissipation information, the second heat dissipation information, the comprehensive heat dissipation information and the heat dissipation efficiency evaluation information are all converted into a first heat dissipation instruction, a second heat dissipation instruction, a comprehensive heat dissipation instruction and a heat dissipation efficiency evaluation instruction by the master control module; the first heat dissipation instruction is sent to a first heat dissipation fan set by an instruction sending module, the second heat dissipation instruction is sent to a second heat dissipation fan set, the comprehensive heat dissipation instruction is simultaneously sent to the first heat dissipation fan set and the second heat dissipation fan set, and the heat dissipation efficiency evaluation instruction is sent to a display device of a computer;”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the heat dissipation of He in order to provide a cooling system for the quantum system (He Page 3, §Background, ¶2).
Claim(s) 6-7, and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen) as applied to claim 1 in view of Zhang et al. (CN 113132077 A) (hereafter referred to as Zhang).
Regarding claim 6:
Cohen teaches all the limitations of claim 5.
Cohen does not distinctly disclose:
“wherein the routing module are connected to the at least one quantum state control module, the at least one frequency control module and the at least one measurement module via trigger signal transmission lines respectively, and the trigger signal transmission lines are equal in length.”
However, Zhang teaches
“wherein the routing module are connected to the at least one quantum state control module, the at least one frequency control module and the at least one measurement module via trigger signal transmission lines respectively, and the trigger signal transmission lines are equal in length.” (Zhang Page 3 §Background ¶2 “which is generated separately by one module and connected to different ADC modules or DAC modules via equal length coaxial cables for synchronizing the different modules.” Examiner notes the modules connected via lines which carry the signal for triggers that are of equal length.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the length of the cables of Zhang in order to synchronize the modules in the quantum control system (Zhang Page 3, §Background, ¶2).
Regarding claim 7:
Cohen as modified teaches all the limitations of claim 6.
Cohen further teaches:
“wherein the routing module is arranged at a center of the backplane, and each of the at least one measurement module is arranged next to the routing module.” (Cohen Fig. 3A
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Examiner notes Cohen’s module for routing (shared circuitry) is the center for routing and that all other modules are next to it.)
Regarding claim 10:
Cohen teaches all the limitations of claim 1.
Cohen does not distinctly disclose:
“wherein each of the quantum state control module, the frequency control module, the measurement module, the routing module and the backplane comprises a clock synchronization circuit, and all the clock synchronization circuits use a same clock synchronization reference for clock synchronization control over the quantum state control module, the frequency control module, the measurement module and the routing module.”
However, Zhang teaches:
“wherein each of the quantum state control module, the frequency control module, the measurement module, the routing module and the backplane comprises a clock synchronization circuit, and all the clock synchronization circuits use a same clock synchronization reference for clock synchronization control over the quantum state control module, the frequency control module, the measurement module and the routing module.” (Zhang Page 3 §Background ¶2 “The core of the superconducting quantum computer is a quantum chip and a quantum measurement and control system, wherein the quantum measurement and control system mainly comprises an Analog-to-Digital Converter (ADC) module and a Digital-to-Analog Converter (DAC) module. Synchronization between the modules needs to be achieved by a trigger (trigger) signal, which is generated separately by one module and connected to different ADC modules or DAC modules via equal length coaxial cables for synchronizing the different modules.” Examiner notes Zhang teaches this synchronization throughout a plurality of modules.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the clock of Zhang in order to synchronize the modules in the quantum control system (Zhang Page 3, §Background, ¶2).
Claim(s) 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen) as applied to claim 1 in view of Jiang et al. (CN 110581760 A) (hereafter referred to as Jiang).
Regarding claim 11:
Cohen teaches all the limitations of claim 1.
Cohen does not distinctly disclose:
“further comprising a chassis, where the backplane, the quantum state control module, the frequency control module, the measurement module and the routing module are all arranged in the chassis.”
However, Jiang teaches:
“further comprising a chassis, where the backplane, the quantum state control module, the frequency control module, the measurement module and the routing module are all arranged in the chassis.”(Jiang Page 4 last paragraph – Page 5 first paragraph, “Specifically, the electronics backplane 20 the space formed by the chassis shell 90 is divided into two independent spaces, wherein a portion of the space for placing electronic card 10, and the other portion of the space for placing the optical component 30. power supply 40 placed on the vacant of any portion of space, power supply 40 connected with the electronics board 20, the network interface 50, a data transmission interface 60, quantum optical fibre interface 80 are arranged on the chassis shell 90, the network interface 50, and quantum optical fibre interface 80 for generating the quantum key. quantum optical fibre interface 80 connected with the optical part 30, the network interface 50 connected with the electronics card 10, transmission data interface 60, connected with the power dispatching longitudinal encryption card 12, for obtaining the schedule data, and the scheduling data of the encrypted output to the terminal device to perform the decryption operations, namely the output of scheduling data after encrypting to the terminal device for the decryption operation.” Examiner notes the chassis backplane within the chassis which is where Cohen teaches the modules to be located.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the chassis of Jiang in order to organize the components of the system into their own independent spaces (Jiang Page 4 last paragraph).
Regarding claim 12:
Cohen as modified teaches all the limitations of claim 11.
Cohen as modified further teaches:
“further comprising a power supply arranged in the chassis.” (Jiang Page 4 last paragraph – Page 5 first paragraph, “Specifically, the electronics backplane 20 the space formed by the chassis shell 90 is divided into two independent spaces, wherein a portion of the space for placing electronic card 10, and the other portion of the space for placing the optical component 30. power supply 40 placed on the vacant of any portion of space, power supply 40 connected with the electronics board 20, the network interface 50, a data transmission interface 60, quantum optical fibre interface 80 are arranged on the chassis shell 90, the network interface 50, and quantum optical fibre interface 80 for generating the quantum key. quantum optical fibre interface 80 connected with the optical part 30, the network interface 50 connected with the electronics card 10, transmission data interface 60, connected with the power dispatching longitudinal encryption card 12, for obtaining the schedule data, and the scheduling data of the encrypted output to the terminal device to perform the decryption operations, namely the output of scheduling data after encrypting to the terminal device for the decryption operation.” Examiner notes the chassis backplane within the chassis which is where Cohen teaches the modules to be located.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the power supply in the chassis of Jiang in order to organize the components of the system into their own independent spaces (Jiang Page 4 last paragraph).
Claim(s) 13 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen) as applied to claim 1 in view of Jiang et al. (CN 109327190 A) (hereafter referred to as Jiang).
Regarding claim 13:
Cohen teaches all the limitations of claim 1.
Cohen does not distinctly disclose:
“further comprising an auxiliary peripheral equipment, wherein the auxiliary peripheral equipment comprises a plurality of microwave local oscillator sources,”
“a radio frequency (RF) transmitting component,”
“an RF transceiver component”
“and a voltage source,”
“the plurality of microwave local oscillator sources and the RF transmitting component cooperate with the quantum state control module to generate a quantum state control signal for adjusting quantum state information of qubits,”
the voltage source cooperates with the frequency control module to generate a frequency control signal for adjusting frequencies of the qubits,”
“and the plurality of microwave local oscillator sources and the RF transceiver component cooperate with the measurement module to generate a measurement signal for reading states of the qubits and receive a read feedback signal from the quantum chip.”
However, Jiang teaches:
“further comprising an auxiliary peripheral equipment, wherein the auxiliary peripheral equipment comprises a plurality of microwave local oscillator sources,” (Jiang ¶11“A multi-qubit control and readout device, characterized in that it comprises: a secondary frequency conversion control unit for controlling qubits and a Josephson parametric amplifier readout unit for reading qubits, wherein the secondary frequency conversion control unit includes an IQ pulse signal source (4), a first local oscillator signal source (6), a second local oscillator signal source (8),”)
“a radio frequency (RF) transmitting component,” (Jiang ¶12, “The signal output by the multi-frequency signal modulation and demodulation unit is transmitted to the signal transmission unit (15) through a microwave cable.” Examiner notes the microwave cable transmits the radio frequency signal.)
“an RF transceiver component” (Jiang ¶12, “The signal output by the multi-frequency signal modulation and demodulation unit is transmitted to the signal transmission unit (15) through a microwave cable.” Examiner notes transmission unit is capable of transmitting the signal as well as receiving the signal through the microwave cable making it an RF transceiver component.)
“and a voltage source,” (Jiang ¶33 “To improve the signal-to-noise ratio of the demodulated voltage signal, a Josephson junction parametric amplifier (29) is added to the above basic circuit”)
“the plurality of microwave local oscillator sources and the RF transmitting component cooperate with the quantum state control module to generate a quantum state control signal for adjusting quantum state information of qubits,” (Jiang ¶11 “A multi-qubit control and readout device, characterized in that it comprises: a secondary frequency conversion control unit for controlling qubits and a Josephson parametric amplifier readout unit for reading qubits, wherein the secondary frequency conversion control unit includes an IQ pulse signal source (4), a first local oscillator signal source (6), a second local oscillator signal source (8), a first mixer (5), and a second mixer (7), the IQ pulse signal source (4) generating two low-frequency square wave signals or low-frequency Gaussian wave signals with a 90-degree phase difference, the low frequency square wave signals or the low-frequency Gaussian wave signals being transmitted through... The first mixer (5) and the first local oscillator (6) perform pulse modulation to obtain two low-frequency signal pulses with a 90-degree phase difference. Then, the second mixer (7) and the second local oscillator signal source (8) perform secondary spectrum shifting to obtain a high-frequency pulse signal Asin(wt)+Bcos(wt), where A and B represent the amplitudes of the rotation control in the X and Y directions of the quantum bit, respectively, and w is the quantum bit transition frequency. The high frequency pulse signal obtained by the secondary frequency conversion control unit enters the chip layer through the transmission layer to perform quantum state conversion on the quantum bit.” Examiner notes the plurality of microwave local oscillators sent through the transmission layer which changes the quantum state.)
the voltage source cooperates with the frequency control module to generate a frequency control signal for adjusting frequencies of the qubits,” (Jiang ¶26 “This invention provides a multi-qubit control and readout device, including a secondary frequency conversion control unit and a Josephson parametric amplifier readout unit. It is a multi-qubit control and readout scheme based on secondary frequency conversion and Josephson parametric amplifier. It includes using two local oscillators of different frequency bands, an IQ mixer and a general mixer to complete dual-channel IQ signal modulation, thereby realizing XY control of the qubit.”)
“and the plurality of microwave local oscillator sources and the RF transceiver component cooperate with the measurement module to generate a measurement signal for reading states of the qubits and receive a read feedback signal from the quantum chip.” (Jiang ¶26 “This invention provides a multi-qubit control and readout device, including a secondary frequency conversion control unit and a Josephson parametric amplifier readout unit. It is a multi-qubit control and readout scheme based on secondary frequency conversion and Josephson parametric amplifier. It includes using two local oscillators of different frequency bands, an IQ mixer and a general mixer to complete dual-channel IQ signal modulation, thereby realizing XY control of the qubit. The synchronous measurement of multiple qubits adopts frequency multiplexing readout technology and replaces the high electron mobility transistor amplifier originally placed at 4K with a Josephson parametric amplifier to achieve higher precision and faster measurement.”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the readout and control of Jiang in order to shorten measurement times (Jiang ¶18).
Regarding claim 14:
Cohen as modified teaches all the limitations of claim 13.
Cohen as modified further teaches:
“further comprising a plurality of microwave sources, wherein the plurality of microwave sources cooperate with the voltage source to generate a pump signal for driving a Josephson parametric amplifier.” (Jiang ¶11 “multi-qubit control and readout device, characterized in that it comprises: a secondary frequencyconversion control unit for controlling qubits and a Josephson parametric amplifier readout unit forreading qubits, wherein the secondary frequency conversion control unit includes an IQ pulse signalsource (4), a first local oscillator signal source (6), a second local oscillator signal source (8),”)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the readout and control of Jiang in order to shorten measurement times (Jiang ¶18).
Claim(s) 15 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cohen et al. (US 10,637,449 B1) (hereafter referred to as Cohen) in view of Jiang et al. (CN 109327190 A) (hereafter referred to as Jiang) further in view of Johnson et al. (US 2021/0013391 A1) (hereafter referred to as Johnson).
Regarding claim 15:
Cohen as modified teaches all the limitations of claim 14.
Cohen does not distinctly disclose:
“further comprising at least one central control apparatus, wherein the at least one central control apparatus is in communication connection with the routing module.”
However, Johnson teaches:
“further comprising at least one central control apparatus, wherein the at least one central control apparatus is in communication connection with the routing module.” (Johnson ¶107 “The processor-executable instructions and data may, for example, include an operating system set of instructions or “module” 118b which configures the digital computer 102 for operation, for instance providing various file management services and user interface services. The processor-executable instructions and data may, for example, include a server set of instructions or “module” 118c which configures the digital computer 102 for operation as a server to provide access by other computers to information and services. The processor-executable instructions and data may, for example, include a calculations set of instructions or “module” 118d which configures the digital computer 102 to preform various calculations associated with converting problems into a problem graph and/or post-processing of potential solutions generated by the quantum computer 104. The processor-executable instructions and data may, for example, include a quantum processor set of instructions or “module” 118d which configures the digital computer 102 to map problems from a problem graph to a hardware graph for embedding in a quantum processor 120 of the quantum computer 104 for execution. The processor-executable instructions and data may, for example, include a read out set of instructions or “module” 118f which configures the digital computer 102 to perform various read out functions associated with reading out potential solutions to problems from the quantum computer 104.” Examiner notes the digital computer 102 teaches the central control apparatus.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the digital computer of Johnson in order to perform read out functions of the quantum computer and map problems to the quantum system (Johnson ¶107).
Regarding claim 16:
Cohen as modified teaches all the limitations of claim 15.
Cohen as modified further teaches:
“further comprising a server, wherein the central control apparatus, the auxiliary peripheral equipment and the routing module of the quantum control apparatus are all in communication connection with the server.” (Johnson ¶107 “The processor-executable instructions and data may, for example, include an operating system set of instructions or “module” 118b which configures the digital computer 102 for operation, for instance providing various file management services and user interface services. The processor-executable instructions and data may, for example, include a server set of instructions or “module” 118c which configures the digital computer 102 for operation as a server to provide access by other computers to information and services. The processor-executable instructions and data may, for example, include a calculations set of instructions or “module” 118d which configures the digital computer 102 to preform various calculations associated with converting problems into a problem graph and/or post-processing of potential solutions generated by the quantum computer 104. The processor-executable instructions and data may, for example, include a quantum processor set of instructions or “module” 118d which configures the digital computer 102 to map problems from a problem graph to a hardware graph for embedding in a quantum processor 120 of the quantum computer 104 for execution. The processor-executable instructions and data may, for example, include a read out set of instructions or “module” 118f which configures the digital computer 102 to perform various read out functions associated with reading out potential solutions to problems from the quantum computer 104.” Examiner notes the digital computer 102 is in communication with the quantum computer 104 and is itself a server as stated above.)
Before the effective filing date of the invention, it would have been obvious to one of ordinary skill in the art to combine the control system of Cohen with the digital computer of Johnson in order to perform read out functions of the quantum computer and map problems to the quantum system (Johnson ¶107).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Li et al. (CN 212302532 U) teaches control signals for controlling a quantum bit.
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/PETER THOMAS ANNIS/Examiner, Art Unit 2123
/ALEXEY SHMATOV/Supervisory Patent Examiner, Art Unit 2123
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