Prosecution Insights
Last updated: October 26, 2026
Application No. 18/421,001

INTEGRATED CIRCUIT DEVICES

Non-Final OA §112
Filed
Jan 24, 2024
Priority
Mar 24, 2023 — RE 10-2023-0038952 +1 more
Examiner
LIU, MIKKA H
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Non-Final)
92%
Grant Probability
Favorable
2-3
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
574 granted / 622 resolved
+24.3% vs TC avg
Minimal +4% lift
Without
With
+3.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
36 currently pending
Career history
660
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
38.5%
-1.5% vs TC avg
§102
28.3%
-11.7% vs TC avg
§112
31.3%
-8.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 622 resolved cases

Office Action

§112
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In response to an Office action mailed on 05/07/2026 (“05/07/2026 OA”), the Applicant amended independent claims 1, 7 and 17 in a reply filed on 08/07/2026. Currently, claims 1-20 are examined as below. Response to Arguments Applicant’s amendments to independent claims 1, 7 and 17 have overcome the prior-art rejections set forth in the 05/07/2026 OA. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: (Marked-Up Version) Integrated Circuit Devices Including a Nanosheet Field-Effect Transistor with Improved Performance and Reliability (Clean Version) Integrated Circuit Devices Including a Nanosheet Field-Effect Transistor with Improved Performance and Reliability Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Independent claim 1 is indefinite, because the abbreviation “at%” in line 15 has not been clearly defined in the claim. It is unclear what is necessarily required by the abbreviation “at%.” Independent claim 7 is indefinite, because the abbreviation “at%” in line 16 has not been clearly defined in the claim. It is unclear what is necessarily required by the abbreviation “at%.” Claim 12 is indefinite, because the term "about" is a relative term which renders the claim indefinite. The term "about" is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention, because the upper and lower limits associated with the term “about” within a claim limitation cannot be clearly determined. Independent claim 17 is indefinite, because the abbreviation “at%” in line 19 has not been clearly defined in the claim. It is unclear what is necessarily required by the abbreviation “at%.” Claim 20 is indefinite, because the term "about" is a relative term which renders the claim indefinite. The term "about" is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention, because the upper and lower limits associated with the term “about” within a claim limitation cannot be clearly determined. Note the dependent claims 2-6, 8-16 and 18-20 necessarily inherit the indefiniteness of the claims on which they depend. Allowable Subject Matter The following is a statement of reasons for the indication of allowable subject matter: Claims 1-20 are rejected. Claims 1-20 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Independent claim 1 would be allowable, because the prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other claimed elements in claim 1, the Ge content ratio in the first semiconductor layer decreases towards a boundary with the second semiconductor layer. Claims 2-6 would be allowable, because they depend from the allowable claim 1. Independent claim 7 would be allowable, because the prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other claimed elements in claim 7, wherein the Ge content ratio in the first semiconductor layer decreases towards a boundary with the second semiconductor layer. Claims 8-16 would be allowable, because they depend from the allowable claim 7. Independent claim 17 would be allowable, because the prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other claimed elements in claim 17, wherein the Ge content ratio in the first semiconductor layer decreases towards a boundary with the second semiconductor layer. Claims 18-20 would be allowable, because they depend from the allowable claim 17. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2021/0118880 A1 to Kim et al. relates to a semiconductor device including a substrate; a first active pattern on the substrate and extending in a first direction, an upper portion of the first active pattern including a first channel pattern; first source/drain patterns in recesses in an upper portion of the first channel pattern; and a gate electrode on the first active pattern and extending in a second direction crossing the first direction, the gate electrode being on a top surface and on a side surface of the at least one first channel pattern, wherein each of the first source/drain patterns includes a first, second, and third semiconductor layer, which are sequentially provided in the recesses, each of the first channel pattern and the third semiconductor layers includes silicon-germanium (SiGe), and the first semiconductor layer has a germanium concentration higher than that of the second semiconductor layer. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MIKKA LIU whose telephone number is (571)272-2568. The examiner can normally be reached on 9AM-5AM EST M-F. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached on 571-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /M.L./Examiner, Art Unit 2817 /ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

Jan 24, 2024
Application Filed
May 07, 2026
Non-Final Rejection mailed — §112
Jun 08, 2026
Examiner Interview Summary
Jun 08, 2026
Applicant Interview (Telephonic)
Aug 07, 2026
Response Filed
Oct 02, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
92%
Grant Probability
96%
With Interview (+3.8%)
2y 2m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 622 resolved cases by this examiner. Grant probability derived from career allowance rate.

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