DETAILED ACTION
DETAILED ACTION
1. This Office Action is taken in response to Applicants’ Amendments and Remarks filed on 2/5/2026 regarding application 18/421,149 filed on 1/24/2024.
Claims 1-16, and 18-23 are pending for consideration.
2. Response to Amendments and Remarks
Applicants’ amendments and remarks have been fully and carefully considered, with the Examiner’s response set forth below.
(1) Applicant contends that, regarding claim 1, Shim in view of Kang fails to teach “divide the memory devices into a plurality of groups based on operational importance of tasks assigned to the memory devices,” because “Shim, the determination of which operation memory is used is based on a comparison of a read-to-rite operation ratio of a workload, not on any indication of task priority, criticality, or operational importance” (see pages 7-8 of Applicant’s Remarks). The Examiner disagrees.
First, the limitation merely recites “divide the memory devices into a plurality of groups based on operational importance of tasks assigned to the memory devices,” and is otherwise completely silent regarding the scope and criteria of “operational importance of tasks.” As such, the term “operational importance of tasks” must be given the broadest, reasonable interpretation, as set forth by the MPEP. Accordingly, any specific characteristics of a task/workload may qualify as the basis of “operational importance,” including the “read-write ratio” of a task/workload. For example, a task/workload with a high ratio of read operations may treat the read operations as “operational important,” because the throughput of the task/workload would be greatly increased when processing of the read operations is optimized.
Second, with respect to the cited limitation, Shim teaches dividing the memory devices into 3 groups based on their respective operational importance, such as read-type operation memory, write-type operation memory, and normal-type operation memory, based on the read-write ratio of the workloads/tasks [as shown in figure 18, where the memory devices are divided into 3 groups based on the operational importance of their workload, read-type operation memory (S1809), write-type operation memory (S1811), and normal-type operation memory (S1813); A memory system and a data processing system including the memory system may manage a plurality of memory devices. For example, the data processing system may categorize and analyze error information from the memory devices, acquire characteristic data from the memory devices and set operation modes of the memory devices based on the characteristic data, allocate the memory devices to a host workload, detect a defective memory device among the memory devices and efficiently recover the defective memory device (abstract); To handle the workloads based on the value of the first information #1 stored in the DB 735, the allocation unit 770 may assign an operation memory usage amount to any one of a plurality of operation memories. For example, when the workloads are optimized for the read operation, the allocation unit 770 may allocate the operation memory usage amount to a specific operation memory optimized for the read operation. When the workloads are optimized for the write operation, the allocation unit 770 may allocate the operation memory usage amount to another operation memory optimized for the write operation. The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0246-0247); The allocation unit 770 may allocate a workload to an operation memory capable of efficiently processing the workload based on a value of the fourth information #4 stored in the DB 735. The allocation unit 770 may determine which operation the target workload is optimized for, based on the fourth information #4 according to the predetermined criterion … Each of the memory blades 400A to 400N may have a plurality of operation memories. By way of example but not limitation, a first memory blade 400A for processing the workload A may be split into a read-type operation memory 430A optimized for the read operation, a write-type operation memory 450A optimized for the write operation, and a normal-type operation memory 470A … (¶ 0268-0269); When the ratio of the read request for processing the workload is higher than the ratio of the write request (“read-type” in step S1807), the allocation unit 770 may allocate the workload to the read-type operation memory optimized for the read operation in step S1809. When the ratio of the write request for processing the workload is higher than the ratio of the read request (“write-type” in step S1807), the allocation unit 770 may allocate the workload to the write-type operation memory optimized for the write operation in step S1811. When the ratio of the read request is the same as the ratio of the write request (“normal-type” in step S1807), the allocation unit 770 may allocate the workload to the normal-type operation memory to process the workload in step S1813 (¶ 0275-0277)].
Therefore, Shim clearly teaches the limitation “divide the memory devices into a plurality of groups based on operational importance of tasks assigned to the memory devices.”
(2) Applicant also contends that, regarding claim 1, Shim in view of Kang fails to teach “receive a priority between the plurality of groups from a host device where the priority is determined based on the operational importance,” because “there is no discussion in Shim regarding whether the read operation is more important than the write operation (and vice versa),” and “There is also no discussion in Kang regarding whether the read operation is more important than the write operation (and vice versa) (see pages 9-14 of Applicant’s Remarks). The Examiner disagrees.
First, Kang indeed teaches determining the priority of a task/map based on the count/number of read operations/requests [as shown in figure 8B, step S800, “determining priority based on RD_CNT (count of read operations; The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller (¶ 0016); In operation S800, the memory controller 130 may re-determine the priority of the target map information T_MAP with the same priority based on the read count RD_CNT … (¶ 0126-0128)].
Second, Shim specifically teaches dividing memory devices into 3 groups of read-type memory, write-type memory, and normal-type memory according to the read-write ratio of the workloads/tasks [as shown in figure 18, where the memory devices are divided into 3 groups based on the operational importance of their workload, read-type operation memory (S1809), write-type operation memory (S1811), and normal-type operation memory (S1813); The allocation unit 770 may allocate a workload to an operation memory capable of efficiently processing the workload based on a value of the fourth information #4 stored in the DB 735. The allocation unit 770 may determine which operation the target workload is optimized for, based on the fourth information #4 according to the predetermined criterion … Each of the memory blades 400A to 400N may have a plurality of operation memories. By way of example but not limitation, a first memory blade 400A for processing the workload A may be split into a read-type operation memory 430A optimized for the read operation, a write-type operation memory 450A optimized for the write operation, and a normal-type operation memory 470A … (¶ 0268-0269); When the ratio of the read request for processing the workload is higher than the ratio of the write request (“read-type” in step S1807), the allocation unit 770 may allocate the workload to the read-type operation memory optimized for the read operation in step S1809. When the ratio of the write request for processing the workload is higher than the ratio of the read request (“write-type” in step S1807), the allocation unit 770 may allocate the workload to the write-type operation memory optimized for the write operation in step S1811. When the ratio of the read request is the same as the ratio of the write request (“normal-type” in step S1807), the allocation unit 770 may allocate the workload to the normal-type operation memory to process the workload in step S1813 (¶ 0275-0277)].
Significantly, Shim teaches that the number/count of read operations of the read-type memory is the highest among the three groups, followed by the normal-type memory, and the write-type memory has the lowest number/count of read operations among the three groups.
On the other hand, Kang specifically teaches determining priority based on the count/number of read operations/request.
Thus, Shim in view of Kang teaches that the read-type memory group has the highest priority, with the normal-type memory group next, and the write-type memory group has the lowest priority because its lowest read-write ratio.
(3) In response to the amendments and remarks, an updated claim analysis has been made. Refer to the corresponding sections of the following Office Action for details.
3. Examiner’s Note
(1) In the case of amending the Claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. This will assist in expediting compact prosecution. MPEP 714.02 recites: “Applicant should also specifically point out the support for any amendments made to the disclosure. See MPEP § 2163.06. An amendment which does not comply with the provisions of 37 CFR 1.121(b), (c), (d), and (h) may be held not fully responsive. See MPEP § 714.” Amendments not pointing to specific support in the disclosure may be deemed as not complying with provisions of 37 C.F.R. 1.131(b), (c), (d), and (h) and therefore held not fully responsive. Generic statements such as “Applicants believe no new matter has been introduced” may be deemed insufficient.
(2) Examiner has cited particular columns/paragraph and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claims 1-7, 10, 15-16, and 18-23 are rejected under 35 U.S.C. 103 as being unpatentable over Shim et al. (US Patent Application Publication 2020/0241984, hereinafter Shim), and in view of Kang (US Patent Application Publication 2024/0211394).
As to claim 1, Shim teaches A memory box [for example, as shown in figures 2, 5, and 19; Kang also teaches this limitation – memory as shown in figure 1, 144] comprising:
memory devices comprising memory cells configured to store data [as shown in figures 2, 5, and 19; Kang also teaches this limitation – memory as shown in figure 1, 144; The memory 144 may store system information used in the memory controller 130. For example, the memory 144 may serve as a working memory, a cache memory, or a buffer memory for the memory controller 130. The memory 144 may include at least one of volatile memory cells and non-volatile memory cells (¶ 0044)];
a sensor configured to measure state information of the memory devices [the state information includes defectiveness and temperature of a memory device -- A memory system and a data processing system including the memory system may manage a plurality of memory devices. For example, the data processing system may categorize and analyze error information from the memory devices, acquire characteristic data from the memory devices and set operation modes of the memory devices based on the characteristic data, allocate the memory devices to a host workload, detect a defective memory device among the memory devices and efficiently recover the defective memory device (abstract); FIG. 23B is a flowchart illustrating an operation of a memory blade for detecting a defective memory device based on a second parameter in accordance with an embodiment of the present disclosure … (¶ 0037-0039); The sensor device 680 may include at least one sensing device capable of sensing the state of the memory board 620. In an embodiment, the sensor device 680 may sense the temperature of the memory board 620 and operate a cooling system (not illustrated) according to the temperature … (¶ 0095-0100); Hereinafter, with reference to FIGS. 19 to 26, a data processing system capable of detecting a defective memory device among the memory devices and efficiently recovering the defective memory device and an operating method thereof will be described in more detail (¶ 0280)]; and
a mode manager configured to divide the memory devices into a plurality of groups based on operational importance of tasks assigned to the memory devices [the types of operations include: read operation, write operation, and normal operation for a non-defective/normal memory device, and backup operation mode for a defective memory device -- as shown in figure 18, where the memory devices are divided into 3 groups based on the operational importance of their workload, read-type operation memory (S1809), write-type operation memory (S1811), and normal-type operation memory (S1813); A memory system and a data processing system including the memory system may manage a plurality of memory devices. For example, the data processing system may categorize and analyze error information from the memory devices, acquire characteristic data from the memory devices and set operation modes of the memory devices based on the characteristic data, allocate the memory devices to a host workload, detect a defective memory device among the memory devices and efficiently recover the defective memory device (abstract); To handle the workloads based on the value of the first information #1 stored in the DB 735, the allocation unit 770 may assign an operation memory usage amount to any one of a plurality of operation memories. For example, when the workloads are optimized for the read operation, the allocation unit 770 may allocate the operation memory usage amount to a specific operation memory optimized for the read operation. When the workloads are optimized for the write operation, the allocation unit 770 may allocate the operation memory usage amount to another operation memory optimized for the write operation. The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0246-0247); The allocation unit 770 may allocate a workload to an operation memory capable of efficiently processing the workload based on a value of the fourth information #4 stored in the DB 735. The allocation unit 770 may determine which operation the target workload is optimized for, based on the fourth information #4 according to the predetermined criterion … Each of the memory blades 400A to 400N may have a plurality of operation memories. By way of example but not limitation, a first memory blade 400A for processing the workload A may be split into a read-type operation memory 430A optimized for the read operation, a write-type operation memory 450A optimized for the write operation, and a normal-type operation memory 470A … (¶ 0268-0269); When the ratio of the read request for processing the workload is higher than the ratio of the write request (“read-type” in step S1807), the allocation unit 770 may allocate the workload to the read-type operation memory optimized for the read operation in step S1809. When the ratio of the write request for processing the workload is higher than the ratio of the read request (“write-type” in step S1807), the allocation unit 770 may allocate the workload to the write-type operation memory optimized for the write operation in step S1811. When the ratio of the read request is the same as the ratio of the write request (“normal-type” in step S1807), the allocation unit 770 may allocate the workload to the normal-type operation memory to process the workload in step S1813 (¶ 0275-0277); … Also, when a plurality of memory devices are determined as defective memory devices, the monitor 810 may set a processing order of backup operations to be performed on the plurality of defective memory devices. The backup operation will be described in detail later … (¶ 0287-0288); During a backup operation of copying data from a defective memory device into the spare memory devices 895 … (¶ 0295);
Kang also teaches this limitation – as shown in figure 4B; The memory region MR may be divided into a plurality of memory regions MR_1, MR_2, and MR_3 to store the access data ACC_DAT of the plurality of map information MAP in different regions for each cycle. Each of the plurality of cycles may correspond to the different memory regions MR_1, MR_2, or MR_3 … (¶ 0078); In operation S1000, the memory controller 130 may perform an access data management operation by classifying and storing the access data ACC_DAT for each of the map information MAP according to a cycle. In operation S2000, the memory controller 130 may perform a weight assignment operation by assigning different weights to the plurality of access data according to the cycles. In operation S3000, the memory controller 130 may perform a priority determination operation by determining priorities for the map information MAP based on the first to third access data ACC_DAT_1 to ACC_DAT_3 to which weights are assigned. In operation S4000, the memory controller 130 may transmit a portion of the map information MAP to the host 102 based on the determined priority (¶ 0085-0088)], receive a priority between the plurality of groups from a host device where the priority is determined based on the operational importance [Shim teaches assigning workload to different groups based on the ratio of read operations and write operations – as shown in figure 18, where the memory devices are divided into 3 groups based on the operational importance of their workload, read-type operation memory (S1809), write-type operation memory (S1811), and normal-type operation memory (S1813); The allocation unit 770 may allocate a workload to an operation memory capable of efficiently processing the workload based on a value of the fourth information #4 stored in the DB 735 … when the number of read requests to process the target workload is approximately 20% greater than the number of write requests, it may be efficient from a system point of view that the target workload is allocated to a read-type operation memory optimized for the read operation. By way of example but not limitation, when the ratio of the read operation performed to process the workload A to the ratio of the write operation, is higher than a predetermined threshold value, the allocation unit 770 may allocate the workload A to the read-type operation memory optimized for performing the read operation … when the ratio of the read operation is higher than the ratio of the write operation among the operations requested to process the workload A, the allocation unit 770 may allocate the workload A to the read-type operation memory 430A among the plurality of operation memories of the first memory blade 400A (¶ 0268-0269); When the ratio of the read request for processing the workload is higher than the ratio of the write request (“read-type” in step S1807), the allocation unit 770 may allocate the workload to the read-type operation memory optimized for the read operation in step S1809. When the ratio of the write request for processing the workload is higher than the ratio of the read request (“write-type” in step S1807), the allocation unit 770 may allocate the workload to the write-type operation memory optimized for the write operation in step S1811. When the ratio of the read request is the same as the ratio of the write request (“normal-type” in step S1807), the allocation unit 770 may allocate the workload to the normal-type operation memory to process the workload in step S1813 (¶ 0275-0277);
Kang teaches assigning priority based on the number/count of read operations/requests – as shown in figure 8B, step S800, “determining priority based on RD_CNT (count of read operations; The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller (¶ 0016); In operation S800, the memory controller 130 may re-determine the priority of the target map information T_MAP with the same priority based on the read count RD_CNT … (¶ 0126-0128);
Significantly, Shim teaches that the number/count of read operations of the read-type memory is the highest among the three groups, followed by the normal-type memory, and the write-type memory has the lowest number/count of read operations among the three groups.
On the other hand, Kang specifically teaches determining priority based on the count/number of read operations/request.
Thus, Shim in view of Kang teaches that the read-type memory group has the highest priority, with the normal-type memory group next, and the write-type memory group has the lowest priority because its lowest read-write ratio], receive the state information from the sensor [the state information includes defectiveness and temperature of a memory device -- A memory system and a data processing system including the memory system may manage a plurality of memory devices. For example, the data processing system may categorize and analyze error information from the memory devices, acquire characteristic data from the memory devices and set operation modes of the memory devices based on the characteristic data, allocate the memory devices to a host workload, detect a defective memory device among the memory devices and efficiently recover the defective memory device (abstract); FIG. 23B is a flowchart illustrating an operation of a memory blade for detecting a defective memory device based on a second parameter in accordance with an embodiment of the present disclosure … (¶ 0037-0039); The sensor device 680 may include at least one sensing device capable of sensing the state of the memory board 620. In an embodiment, the sensor device 680 may sense the temperature of the memory board 620 and operate a cooling system (not illustrated) according to the temperature … (¶ 0095-0100); Hereinafter, with reference to FIGS. 19 to 26, a data processing system capable of detecting a defective memory device among the memory devices and efficiently recovering the defective memory device and an operating method thereof will be described in more detail (¶ 0280)], and dynamically control an operation mode of the plurality of groups based on the priority and the state information [the types of operations include: read operation, write operation, and normal operation for a non-defective/normal memory device, and backup operation mode for a defective memory device -- The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0247); The allocation unit 770 may allocate a workload to an operation memory capable of efficiently processing the workload based on a value of the fourth information #4 stored in the DB 735. The allocation unit 770 may determine which operation the target workload is optimized for, based on the fourth information #4 according to the predetermined criterion … Each of the memory blades 400A to 400N may have a plurality of operation memories. By way of example but not limitation, a first memory blade 400A for processing the workload A may be split into a read-type operation memory 430A optimized for the read operation, a write-type operation memory 450A optimized for the write operation, and a normal-type operation memory 470A … (¶ 0268-0269); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288);
Kang teaches assigning priority based on the number/count of read operations/requests – as shown in figure 8B, step S800, “determining priority based on RD_CNT (count of read operations; The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller (¶ 0016); In operation S800, the memory controller 130 may re-determine the priority of the target map information T_MAP with the same priority based on the read count RD_CNT … (¶ 0126-0128)], wherein a first group performs a first operation mode while a second group that has a lesser priority than the first group performs a second operation mode different than the first operation mode [the types of operations include: read operation, write operation, and normal operation for a non-defective/normal memory device, and backup operation mode for a defective memory device, wherein the backup operations have higher priority than other operations -- The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0247); The allocation unit 770 may allocate a workload to an operation memory capable of efficiently processing the workload based on a value of the fourth information #4 stored in the DB 735. The allocation unit 770 may determine which operation the target workload is optimized for, based on the fourth information #4 according to the predetermined criterion … Each of the memory blades 400A to 400N may have a plurality of operation memories. By way of example but not limitation, a first memory blade 400A for processing the workload A may be split into a read-type operation memory 430A optimized for the read operation, a write-type operation memory 450A optimized for the write operation, and a normal-type operation memory 470A … (¶ 0268-0269); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)].
Regarding claim 1, Shim teaches assigning different areas of memory space based on operational importance such as read, write, and normal operations [The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0247); When the ratio of the read request for processing the workload is higher than the ratio of the write request (“read-type” in step S1807), the allocation unit 770 may allocate the workload to the read-type operation memory optimized for the read operation in step S1809. When the ratio of the write request for processing the workload is higher than the ratio of the read request (“write-type” in step S1807), the allocation unit 770 may allocate the workload to the write-type operation memory optimized for the write operation in step S1811. When the ratio of the read request is the same as the ratio of the write request (“normal-type” in step S1807), the allocation unit 770 may allocate the workload to the normal-type operation memory to process the workload in step S1813 (¶ 0275-0277); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)], but does not expressively teach receiving a priority between the plurality of groups where the priority is determined based on the operational importance.
However, Kang specifically teaches receiving a priority between the plurality of groups where the priority is determined based on the count/number of read operations/requests [as shown in figure 8B, step S800, “determining priority based on RD_CNT (count of read operations; The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller The flash translation layer is configured to re-determine the priority of the target map information having a same priority based on a read count for the plural pieces of map information, the read count is a cumulative number of access requests received from the host since power was supplied to the memory controller (¶ 0016); In operation S800, the memory controller 130 may re-determine the priority of the target map information T_MAP with the same priority based on the read count RD_CNT … (¶ 0126-0128)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to receive a priority between the plurality of groups where the priority is determined based on the operational importance, such as read operations, as specifically demonstrated by Kang, and to incorporate it into the existing scheme disclosed by Shim, because Kang teaches doing so improves the access speed to the memory [As the amount of data communication between a memory device and a host such as a computer, a smartphone, a smart pad, and the like increases, the access operation speed of the memory controller becomes increasingly important. As a result, there is a growing need for the memory controller with improved access operation speed (¶ 0004)].
As to claim 2, Shim in view of Kang teaches The memory box of claim 1, wherein, for the dynamically controlling of the operation mode, the mode manager is further configured to determine a current operation mode of the plurality of groups according to the priority [Shim: the types of operations include: read operation, write operation, and normal operation for a non-defective/normal memory device, and backup operation mode for a defective memory device, wherein the backup operations have higher priority than other operations -- The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0247); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)], compare the state information with marginal resource information corresponding to the state information [Shim: the state information includes defectiveness and temperature of a memory device -- A memory system and a data processing system including the memory system may manage a plurality of memory devices. For example, the data processing system may categorize and analyze error information from the memory devices, acquire characteristic data from the memory devices and set operation modes of the memory devices based on the characteristic data, allocate the memory devices to a host workload, detect a defective memory device among the memory devices and efficiently recover the defective memory device (abstract); FIG. 23B is a flowchart illustrating an operation of a memory blade for detecting a defective memory device based on a second parameter in accordance with an embodiment of the present disclosure … (¶ 0037-0039); The sensor device 680 may include at least one sensing device capable of sensing the state of the memory board 620. In an embodiment, the sensor device 680 may sense the temperature of the memory board 620 and operate a cooling system (not illustrated) according to the temperature … (¶ 0095-0100); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)], and change the current operation mode of the plurality of groups to another operation mode that is different than the current operation mode based on a result of the comparing [Shim: when a non-defective/normal memory device is detected to be defective, the operation mode is changed from read-type/write-type/normal-type operations to backup operations -- The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0247); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)].
As to claim 3, Shim in view of Kang teaches The memory box of claim 1, wherein, for the dividing of the memory devices, the mode manager is further configured to divide the memory devices into the plurality of groups according to characteristics of the memory devices [Shim -- Various embodiments are directed to a system and a method for managing memory devices. More particularly, various embodiments are directed to a system and a method for categorizing and analyzing error information from the memory devices, acquiring characteristic data from the memory devices, setting operation modes of the memory devices based on the characteristic data, allocating the memory devices to a host workload, detecting a defective memory device among the memory devices and efficiently recovering the defective memory device (¶ 0005); In an embodiment, a data processing system may include: a memory system including a plurality of memory devices each having type depending on latency for read and write operation; and a compute system coupled to the memory system, wherein the compute system includes a database memory suitable for storing a write-to-read-ratio information indicating a ratio of write operation to read operation of respective types of workloads, and allocates a memory device, for processing a current workload, based on the type of the memory device and the write-to-read-ratio information of the current workload (¶ 0009); Referring to FIG. 5, the memory board 400 may include a controller 410 and a plurality of memories 420. The plurality of memories 420 may store (or write) data therein and output (or read) the stored data under the control of the controller 410. The plurality of memories 420 may include a first group of memories 420A, a second group of memories 420B, and a third group of memories 420C. The first group of memories 420A, the second group of memories 420B, and the third group of memories 420C may have characteristics substantially equal to one another or may have characteristics different from one another. In various embodiments, the first group of memories 420A, the second group of memories 420B, and the third group of memories 420C may be memories having characteristics different from one another in terms of storage capacity or latency (¶ 0072)], wherein at a first time, operational importance of the first group is higher than operational importance of the second group, and at a second time, the operational importance of the first group is lower than the operational importance of the second group [Shim: when a non-defective/normal memory device is detected to be defective, the operation mode is changed from read-type/write-type/normal-type operations to backup operations -- The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0247); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)].
As to claim 4, Shim in view of Kang teaches The memory box of claim 1, wherein the memory devices have same characteristics [Shim -- Referring to FIG. 5, the memory board 400 may include a controller 410 and a plurality of memories 420. The plurality of memories 420 may store (or write) data therein and output (or read) the stored data under the control of the controller 410. The plurality of memories 420 may include a first group of memories 420A, a second group of memories 420B, and a third group of memories 420C. The first group of memories 420A, the second group of memories 420B, and the third group of memories 420C may have characteristics substantially equal to one another or may have characteristics different from one another. In various embodiments, the first group of memories 420A, the second group of memories 420B, and the third group of memories 420C may be memories having characteristics different from one another in terms of storage capacity or latency (¶ 0072)].
As to claim 5, Shim in view of Kang teaches The memory box of claim 1, wherein the mode manager comprises a controller configured to control the plurality of groups to operate in a corresponding operation mode [Shim -- The memory controllers 520 may be disposed between the data controller 510 and the plurality of memories 420, and may support interfacing therebetween. The memory controllers 520 may include a first memory controller (iMC0) 520A, a second memory controller (iMC1) 520B, and a third memory controller (iMC2) 520C respectively corresponding to the first group of memories 420A, the second group of memories 420B, and the third group of memories 420C included in the plurality of memories 420. The memory controller (iMC0) 520A may be disposed between the data controller 510 and the first group of memories 420A, and may support data transmission/reception therebetween. The memory controller (iMC1) 520B may be disposed between the data controller 510 and the second group of memories 420B, and may support data transmission/reception therebetween. The memory controller (iMC2) 520C may be disposed between the data controller 510 and the third group of memories 420C, and may support data transmission/reception therebetween. For example, when the third group of memories 420C are flash memories, the memory controller (iMC2) 520C may be a flash controller. The first to third group of memories 420A to 420C are for illustrative purposes only and the embodiment is not limited thereto (¶ 0075)].
As to claim 6, Shim in view of Kang teaches The memory box of claim 1, wherein, for the dynamically controlling of the operation mode, the mode manager is further configured to set a group of the plurality of groups of which the priority is higher to be in a first operation mode to operate with a predetermined performance, and set a group of the plurality of groups of which the priority is lower to be in a second operation mode to operate within a range not exceeding marginal resource information corresponding to the state information [Shim -- Hereinafter, with reference to FIGS. 14 to 18, a data processing system capable of allocating memory devices to a current workload based on the average usage amount and write-to-read ratio of workloads having same type from the current workload and an operating method thereof will be described in more detail … The DB memory 730 may store a data base (DB) 735. The DB 735 may include information on workloads requested to be processed. Specifically, the DB 735 may include first information #1 which is an average operation memory usage amount used for processing the workloads. Although not illustrated, the DB 735 may include second information #2 which is a final operation memory usage amount used for processing the workloads, third information #3 which is the number of times to process the workloads, and fourth information #4 on a ratio of an operation for processing the workloads, i.e., a ratio of the write operation with respect to the read operation … The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0239-0247); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)].
As to claim 7, Shim in view of Kang teaches The memory box of claim 6, wherein the mode manager comprises: a first controller configured to control the group of which the priority is higher to operate in the first operation mode; and a second controller configured to control the group of which the priority is lower to operate in the second operation mode [Shim -- The memory controllers 520 may be disposed between the data controller 510 and the plurality of memories 420, and may support interfacing therebetween. The memory controllers 520 may include a first memory controller (iMC0) 520A, a second memory controller (iMC1) 520B, and a third memory controller (iMC2) 520C respectively corresponding to the first group of memories 420A, the second group of memories 420B, and the third group of memories 420C included in the plurality of memories 420. The memory controller (iMC0) 520A may be disposed between the data controller 510 and the first group of memories 420A, and may support data transmission/reception therebetween. The memory controller (iMC1) 520B may be disposed between the data controller 510 and the second group of memories 420B, and may support data transmission/reception therebetween. The memory controller (iMC2) 520C may be disposed between the data controller 510 and the third group of memories 420C, and may support data transmission/reception therebetween. For example, when the third group of memories 420C are flash memories, the memory controller (iMC2) 520C may be a flash controller. The first to third group of memories 420A to 420C are for illustrative purposes only and the embodiment is not limited thereto (¶ 0075)].
As to claim 10, Shim in view of Kang teaches A computing system comprising: the memory box of claim 1; and the host device [Shim -- as shown in figure 3, where there the computer boards are the corresponding hosts].
As to claim 15, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details.
As to claim 16, it recites substantially the same limitations as in claim 3, and is rejected for the same reasons set forth in the analysis of claim 3. Refer to “As to claim 3” presented earlier in this Office Action for details.
As to claim 18, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details.
As to claim 19, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details.
As to claim 20, it recites substantially the same limitations as in claim 2, and is rejected for the same reasons set forth in the analysis of claim 2. Refer to “As to claim 2” presented earlier in this Office Action for details.
As to claim 21, it recites substantially the same limitations as in claim 3, and is rejected for the same reasons set forth in the analysis of claim 3. Refer to “As to claim 3” presented earlier in this Office Action for details.
As to claim 22, it recites substantially the same limitations as in claim 4, and is rejected for the same reasons set forth in the analysis of claim 4. Refer to “As to claim 4” presented earlier in this Office Action for details.
As to claim 23, Shim in view of Kang teaches The memory box of claim 1, wherein the operational importance is based on thermal management [Shim -- The sensor device 680 may include at least one sensing device capable of sensing the state of the memory board 620. In an embodiment, the sensor device 680 may sense the temperature of the memory board 620 and operate a cooling system (not illustrated) according to the temperature (¶ 0095); The monitor 810 may periodically determine whether defects occur in the plurality of memory devices 891 to 89N. In an embodiment, the monitor 810 may check an error occurrence frequency of each of the plurality of memory devices 891 to 89N, and may determine a memory device having the error occurrence frequency that is greater than a first threshold value, as a defective memory device, among the plurality of memory devices 891 to 89N. In another embodiment, the monitor 810 may detect a temperature of each of the plurality of memory devices 891 to 89N, and may determine a memory device having a temperature that is greater than a second threshold value, as a defective memory device, among the plurality of memory devices 891 to 89N (¶ 0286)].
5. Claims 9, 11-12, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Shim in view of Kang, and further in view of Ping et al. (US Patent Application Publication 2015/0185813, hereinafter Ping).
As to claim 9, Shim in view of Kang teaches the memory devices are connected to the host device, wherein, for the receiving of the priority, the mode manager is configured to receive the priority between the plurality of groups from the host device [Shim -- Hereinafter, with reference to FIGS. 14 to 18, a data processing system capable of allocating memory devices to a current workload based on the average usage amount and write-to-read ratio of workloads having same type from the current workload and an operating method thereof will be described in more detail … The DB memory 730 may store a data base (DB) 735. The DB 735 may include information on workloads requested to be processed. Specifically, the DB 735 may include first information #1 which is an average operation memory usage amount used for processing the workloads. Although not illustrated, the DB 735 may include second information #2 which is a final operation memory usage amount used for processing the workloads, third information #3 which is the number of times to process the workloads, and fourth information #4 on a ratio of an operation for processing the workloads, i.e., a ratio of the write operation with respect to the read operation … The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0239-0247); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)], but does not teach doing this through a switch.
However, a switch that connects components together is well known and commonly used in the art.
For example, Ping specifically teaches a switch configured to connect the memory devices to the host device, wherein, for the receiving of the priority, the mode manager is configured to receive the priority between the plurality of groups from the host device through the switch [as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210); Embodiments of the inventive concept may also include a system for dynamically allocating a thermal budget for a memory array. The system may include a plurality of memory groups in the memory array, a switch coupled to each of the plurality of memory groups, dynamic thermal budget logic coupled to the switch … (¶ 0015)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to have used a switch configured to connect the memory devices to the host device, as specifically demonstrated by Ping, and to incorporate it into the existing scheme disclosed by Shim in view of Kang, because Ping teaches doing so provides the capability and flexibility of throttling the groups of memory devices [In some embodiments, increasing the throttling of the particular memory group further comprises increasing, by a switch, the throttling of the particular memory group. In some embodiments, decreasing the throttling of the particular memory group further comprises decreasing, by a switch, the throttling of the particular memory group (¶ 0011)].
As to claim 11, Shim in view of Kang & Ping teaches The computing system of claim 10, further comprising a switch configured to connect the host device to the memory box [Shim -- as shown in figure 3, where there the computer boards are the corresponding hosts; Ping -- as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210)].
As to claim 12, Shim in view of Kang & Ping teaches A switch [Ping -- as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210)] comprising: a processor configured to divide memory devices into a plurality of groups [Shim -- Referring to FIG. 5, the memory board 400 may include a controller 410 and a plurality of memories 420. The plurality of memories 420 may store (or write) data therein and output (or read) the stored data under the control of the controller 410. The plurality of memories 420 may include a first group of memories 420A, a second group of memories 420B, and a third group of memories 420C. The first group of memories 420A, the second group of memories 420B, and the third group of memories 420C may have characteristics substantially equal to one another or may have characteristics different from one another. In various embodiments, the first group of memories 420A, the second group of memories 420B, and the third group of memories 420C may be memories having characteristics different from one another in terms of storage capacity or latency (¶ 0072); Ping – as shown in figure 2A], receive a priority between the plurality of groups from a host device, receive state information of the memory devices from a sensor, and dynamically control an operation mode of the plurality of groups based on the priority and the state information [Shim -- The sensor device 680 may include at least one sensing device capable of sensing the state of the memory board 620. In an embodiment, the sensor device 680 may sense the temperature of the memory board 620 and operate a cooling system (not illustrated) according to the temperature … (¶ 0095-0100); Hereinafter, with reference to FIGS. 14 to 18, a data processing system capable of allocating memory devices to a current workload based on the average usage amount and write-to-read ratio of workloads having same type from the current workload and an operating method thereof will be described in more detail … The DB memory 730 may store a data base (DB) 735. The DB 735 may include information on workloads requested to be processed. Specifically, the DB 735 may include first information #1 which is an average operation memory usage amount used for processing the workloads. Although not illustrated, the DB 735 may include second information #2 which is a final operation memory usage amount used for processing the workloads, third information #3 which is the number of times to process the workloads, and fourth information #4 on a ratio of an operation for processing the workloads, i.e., a ratio of the write operation with respect to the read operation … The memory blades 400 may include the plurality of operation memories. The operation memories may be divided into a read-type operation memory optimized for the read operation, a write-type operation memory optimized for the write operation and a normal-type operation memory, depending on a predetermined criterion … (¶ 0239-0247); For example, the monitor 810 may assign the highest priority to a backup operation for a first defective memory device, which has an error occurrence frequency that is greater than the first threshold value, among a plurality of defective memory devices. Also, the monitor 810 may assign a lower priority to a backup operation for a second defective memory device, which has a current that is greater than a third threshold value or has a temperature that is greater than the second threshold value, compared to the first defective memory device, among the plurality of defective memory devices. The plurality of defective memory devices may be queued according to the priorities of the backup operations in order. The monitor 810 may store the priority order of the plurality of defective memory devices for performing the backup operations. The backup operations for the defective memory devices having lower priorities may not be performed until the backup operations for the defective memory devices having higher priorities are complete (¶ 0288)].
As to claim 13, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details.
As to claim 14, Shim in view of Kang & Ping teaches A memory box [Shim -- as shown in figures 2, 5, and 19] comprising: the switch of claim 12 [Ping -- as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210)], wherein the switch is configured to connect the memory device to the host device [Ping -- as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210)]; the memory devices comprising memory cells configured to store data [Shim -- as shown in figures 2, 5, and 19]; and the sensor configured to measure the state information [Shim -- The sensor device 680 may include at least one sensing device capable of sensing the state of the memory board 620. In an embodiment, the sensor device 680 may sense the temperature of the memory board 620 and operate a cooling system (not illustrated) according to the temperature … (¶ 0095-0100)]
6. Claims 8 is rejected under 35 U.S.C. 103 as being unpatentable over Shim in view of Kang, and further in view of Banerjee et al. (US Patent 11,632,337, hereinafter Banerjee).
Regarding claim 8, Shim in view of Kang does not teach the memory devices comprise Compute Express Link (CXL) memory devices.
However, Compute Express Link (CXL) memory devices are well known and commonly used in the art.
For example, Banerjee specifically teaches Compute Express Link (CXL) memory devices [… In some examples, the CXL-E domain agent 118 may include functionality to communicate with a CXL-E domain manager 124 to set up CXL-E communications between devices. In some examples, the CXL-E NIC 120 may translate CXL frames to Ethernet frames, and vice-versa, for performing the techniques described herein for enabling a CXL-E fabric. The CXL-E NIC 120 may connect to the CXL-E switch 110 to provide the servers 106 with connectivity to the low latency ethernet network 126, connectivity to MLD appliances 108, and the like … (c16 L25-45)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to have Compute Express Link (CXL) memory devices, as specifically demonstrated by Banerjee, and to incorporate it into the existing scheme disclosed by Shim in view of Kang, because Banerjee teaches doing so enables disaggregated composable servers in data centers to share resources between hosts and servers/targets offering resources [As discussed above, disaggregated composable servers in data centers are becoming a reality due to the introduction of Compute Express Link (CXL) technologies in the processor complex. Among other things, CXL-based fabrics enable disaggregated composable servers in data centers to share resources between hosts and servers/targets offering resources. Although CXL-based fabrics offer many advantages, several challenges still remain to be solved to enable disaggregated composable servers in data centers (c2 L55-63)].
7. Claims 13 is rejected under 35 U.S.C. 103 as being unpatentable over Shim in view of Kang, and further in view of Walsh (US Patent Application Publication 2019/0324658).
Regarding claim 13, Shim in view of Kang does not teach a bandwidth limiter configured to control a bandwidth for data transfer between the host device and the plurality of groups; and a controller configured to control the bandwidth limiter such that the plurality of groups operate in a corresponding operation mode.
However, Walsh specifically a bandwidth for data transfer between the host device and the plurality of groups; and a controller configured to control the bandwidth limiter such that the plurality of groups operate in a corresponding operation mode [In one embodiment, a storage device comprises a command processor configured to monitor a latency QoS status and provide the latency QoS status feedback to a host, one or more memory devices coupled to the command processor, and a bandwidth limiter coupled to the command processor. The bandwidth limiter is configured to determine a bandwidth and determine whether the bandwidth is above or below a threshold value. The storage device further comprises a command fetch coupled to the bandwidth limiter. The command fetch is configured to send commands to the bandwidth limiter, and to temporarily pause fetching additional commands from the host and sending commands to the bandwidth limiter if the bandwidth limiter determines the bandwidth is over the threshold value (¶ 0007)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to have a bandwidth for data transfer between the host device and the plurality of groups; and a controller configured to control the bandwidth limiter such that the plurality of groups operate in a corresponding operation mode, as specifically demonstrated by Walsh, and to incorporate it into the existing scheme disclosed by Shim in view of Kang, because Walsh teaches doing so provides better quality of services (QoS) [In one embodiment, a storage device comprises a command processor configured to monitor a latency QoS status and provide the latency QoS status feedback to a host, one or more memory devices coupled to the command processor, and a bandwidth limiter coupled to the command processor. The bandwidth limiter is configured to determine a bandwidth and determine whether the bandwidth is above or below a threshold value. The storage device further comprises a command fetch coupled to the bandwidth limiter. The command fetch is configured to send commands to the bandwidth limiter, and to temporarily pause fetching additional commands from the host and sending commands to the bandwidth limiter if the bandwidth limiter determines the bandwidth is over the threshold value (¶ 0007)].
Conclusion
8. Claims 1-16, and 18-23 are rejected as explained above.
9. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE
MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG JEN TSAI whose telephone number is 571-272-4244. The examiner can normally be reached on Monday-Friday, 9-6.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached on 571-272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/SHENG JEN TSAI/Primary Examiner, Art Unit 2139