DETAILED ACTION
DETAILED ACTION
1. This Office Action is taken in response to Applicants’ Amendments and Remarks filed on 6/9/2026 regarding application 18/421,149 filed on 1/24/2024.
Claims 1-5, 7-16, and 18-24 are pending for consideration.
2. Response to Amendments and Remarks
Applicants’ amendments and remarks have been fully and carefully considered, with the Examiner’s response set forth below.
(1) In response to the amendments and remarks, an updated claim analysis has been made, with newly identified references. Refer to the corresponding sections of the following Office Action for details.
3. Examiner’s Note
(1) In the case of amending the Claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. This will assist in expediting compact prosecution. MPEP 714.02 recites: “Applicant should also specifically point out the support for any amendments made to the disclosure. See MPEP § 2163.06. An amendment which does not comply with the provisions of 37 CFR 1.121(b), (c), (d), and (h) may be held not fully responsive. See MPEP § 714.” Amendments not pointing to specific support in the disclosure may be deemed as not complying with provisions of 37 C.F.R. 1.131(b), (c), (d), and (h) and therefore held not fully responsive. Generic statements such as “Applicants believe no new matter has been introduced” may be deemed insufficient.
(2) Examiner has cited particular columns/paragraph and line numbers in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
4. Claims 1-5, 10, 15-16, and 18-24 are rejected under 35 U.S.C. 103 as being unpatentable over Taha et al. (US Patent 9,891,694, hereinafter Taha), and in view of Leech et al. (US Patent Application Publication 2008/0184044, hereinafter Leech).
As to claim 1, Taha teaches A memory box device [A method includes initiating a transition from an operating mode to a sleep mode at an electronic device that includes a volatile memory and a non-volatile memory ,,, (abstract); Leech also teaches this limitation – blade enclosure as shown in figure 2, 200; As used herein, a "blade" is a standardized electronic computing module that is plugged in or connected to a computer or storage system. A blade enclosure provides various services, such as power, cooling, networking, various interconnects and management service, etc for blades within the enclosure ... (¶ 0070); ... The power components 360 comprises, for instance, processors, memories, disk drives, or other device in the compute nodes 120 whose power state is detected and varied. In addition, the power components 360 have a plurality of power states. For instance, the power components 360 have a minimum power state, such as, when the power components 360 are idle and a maximum power state, such as, when the power components 360 are fully operational. In addition, for instance, the power components 360 have one or more power states between the minimum power state and the maximum power state, at which the power components 360 are operated (¶ 0036)] having a total power limit [As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... (c2 L20-40); During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM). Alternately, or in addition, the LPM may be entered in response to a user command or user input requesting a transition to the LPM. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance (c9 L55-62); Leech also teaches this limitation – The power management agent 310 determines whether the sum of the current power consumption levels of the compute nodes 120 in the compute node pool and the requested power increase in the compute node 120 falls below an allowable power budget for the compute node pool, as indicated at step 412. The allowable power budget and an associated allowable power budget limit for the compute node pool are determined at design time or they comprise run-time configurable system parameters ... (¶ 0040-0041)] comprising:
memory devices divided into a first group [for example, the volatile memory -- A method includes initiating a transition from an operating mode to a sleep mode at an electronic device that includes a volatile memory and a non-volatile memory ,,, (abstract)] and a second group [for example, the non-volatile memory -- A method includes initiating a transition from an operating mode to a sleep mode at an electronic device that includes a volatile memory and a non-volatile memory ,,, (abstract)], the second group having a lesser priority than the first group [read data from the volatile memory first if it is available in the normal operating mode, and only read data from the non-volatile memory when the volatile memory is disabled -- A method includes initiating a transition from an operating mode to a sleep mode at an electronic device that includes a volatile memory and a non-volatile memory. In response to the initiating, data is copied from the volatile memory to the non-volatile memory and a portion of the volatile memory is disabled ... (abstract); As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... During the LPM, self-refreshes of volatile memory portions that store the read-only data may be disabled, because the read-only data is being accessed from the non-volatile memory instead. Alternately, the volatile memory portions thereof may be turned off altogether during the LPM (c2 L20-40)], the first group of the memory devices being operable in a first operating mode [the corresponding “first operating mode” is the “normal operating mode,” and the volatile memory being operated in a normal mode prior to entering a low performance/sleep mode – as shown in figure 5, steps 502-508; Systems and methods of dynamic memory management to reduce power consumption are disclosed. The described techniques, or portions thereof, may be used during a sleep mode of an electronic device, during a normal operating mode of the electronic device, or any combination thereof. For example, a first technique may involve utilizing non-volatile memory at an electronic device to reduce sleep floor current ... As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... (c1 L58 to c2 L40); Leech also teaches different operating states/modes -- ... The power components 360 comprises, for instance, processors, memories, disk drives, or other device in the compute nodes 120 whose power state is detected and varied. In addition, the power components 360 have a plurality of power states. For instance, the power components 360 have a minimum power state, such as, when the power components 360 are idle and a maximum power state, such as, when the power components 360 are fully operational. In addition, for instance, the power components 360 have one or more power states between the minimum power state and the maximum power state, at which the power components 360 are operated (¶ 0036)] and a second operating mode different from the first operating mode [the corresponding “second operating mode is the “low performance mode (LPM)” -- as shown in figure 5, steps 502-508; Systems and methods of dynamic memory management to reduce power consumption are disclosed. The described techniques, or portions thereof, may be used during a sleep mode of an electronic device, during a normal operating mode of the electronic device, or any combination thereof. For example, a first technique may involve utilizing non-volatile memory at an electronic device to reduce sleep floor current ... As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... (c1 L58 to c2 L40); Leech also teaches different operating states/modes -- ... The power components 360 comprises, for instance, processors, memories, disk drives, or other device in the compute nodes 120 whose power state is detected and varied. In addition, the power components 360 have a plurality of power states. For instance, the power components 360 have a minimum power state, such as, when the power components 360 are idle and a maximum power state, such as, when the power components 360 are fully operational. In addition, for instance, the power components 360 have one or more power states between the minimum power state and the maximum power state, at which the power components 360 are operated (¶ 0036)], and the second group of the memory devices being configured to perform the second operating mode [For example, a first technique may involve utilizing non-volatile memory at an electronic device to reduce sleep floor current ... ; As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... During the LPM, read-only data may be accessed from non-volatile memory instead of from the volatile memory ... During the LPM, self-refreshes of volatile memory portions that store the read-only data may be disabled, because the read-only data is being accessed from the non-volatile memory instead. Alternately, the volatile memory portions thereof may be turned off altogether during the LPM (c1 L63 to c2 L40); Leech also teaches different operating states/modes -- ... The power components 360 comprises, for instance, processors, memories, disk drives, or other device in the compute nodes 120 whose power state is detected and varied. In addition, the power components 360 have a plurality of power states. For instance, the power components 360 have a minimum power state, such as, when the power components 360 are idle and a maximum power state, such as, when the power components 360 are fully operational. In addition, for instance, the power components 360 have one or more power states between the minimum power state and the maximum power state, at which the power components 360 are operated (¶ 0036)];
a sensor configured to measure state information of the memory devices [the corresponding “sensor” is a ”battery life monitor” -- As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... During the LPM, read-only data may be accessed from non-volatile memory instead of from the volatile memory ... During the LPM, self-refreshes of volatile memory portions that store the read-only data may be disabled, because the read-only data is being accessed from the non-volatile memory instead. Alternately, the volatile memory portions thereof may be turned off altogether during the LPM (c1 L63 to c2 L40); During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM). Alternately, or in addition, the LPM may be entered in response to a user command or user input requesting a transition to the LPM. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance (c9 L55-62); Leech also teaches this limitation – ... The amount of power being consumed by each of the compute nodes 120 is detected through use of power monitors 320 associated with each of the compute nodes 120. The power monitors 320 comprise, for instance, relatively simple current sense resistors connected to an analog-to-digital converter. In addition, or alternatively, the power monitors 320 comprise software configured to calculate the amounts of power consumed by the compute nodes 120 ... The temperatures of the compute nodes 120 are detected by one or more temperature sensors 330, which include, for instance, thermometers, thermistors, thermocouples, or the like (¶ 0032-0033)]; and
a mode manager configured to: receive the state information from the sensor [During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM). Alternately, or in addition, the LPM may be entered in response to a user command or user input requesting a transition to the LPM. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance (c9 L55-62); Leech also teaches this limitation – As shown in FIG. 3, the power management system 300 includes a power management agent 310. The power management agent 310 is depicted as including a communication module 312, a power consumption module 314, a power comparison module 315, a power budget module 316, and a power state module 318, which the power management agent 310 implements in performing various functions as described below ... (¶ 0029); The power management agent 310 implements the power consumption module 314 to monitor the current power consumption levels of the compute nodes 120. The power management agent 310 also implements the power consumption module 314 to compare the current power consumption levels with a power budget. In addition to the current power consumption levels, the power management agent 310 also implements the power comparison module 315 to compare pending increases in the power utilization levels of the compute nodes with the power budget (¶ 0035)]; and
dynamically control an operation mode of the first group of the memory devices based on the priority and the state information such that, in response to a sum of power consumption of the first group and the second group exceeding the total power limit of the memory box, change the operation mode of the first group from the first operation mode to the second operation mode [as shown in figure 5, steps 502-508; Systems and methods of dynamic memory management to reduce power consumption are disclosed. The described techniques, or portions thereof, may be used during a sleep mode of an electronic device, during a normal operating mode of the electronic device, or any combination thereof. For example, a first technique may involve utilizing non-volatile memory at an electronic device to reduce sleep floor current ... As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... During the LPM, self-refreshes of volatile memory portions that store the read-only data may be disabled, because the read-only data is being accessed from the non-volatile memory instead. Alternately, the volatile memory portions thereof may be turned off altogether during the LPM (c1 L58 to c2 L40); During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM). Alternately, or in addition, the LPM may be entered in response to a user command or user input requesting a transition to the LPM. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance (c9 L55-62);
Leech more expressively teaches this limitation, including a sum of power consumption of the first group and the second group exceeding the total power limit, and change the operation mode of the first group from the first operation mode to the second operation mode -- The power management agent 310 determines whether the sum of the current power consumption levels of the compute nodes 120 in the compute node pool and the requested power increase in the compute node 120 falls below an allowable power budget for the compute node pool, as indicated at step 412. The allowable power budget and an associated allowable power budget limit for the compute node pool are determined at design time or they comprise run-time configurable system parameters ... (¶ 0040-0041); According to block 430, the blade transmits its power requirements to the enclosure. This data includes such numbers as maximum power consumption, Pmax, calculated using databook maximum values at design time, typical power consumption, Ptyp, and/or a hybrid value between the two Pmt which would represent the maximum possible power consumption under the normal specified operating conditions (measured at design time or self measured) ... Similarly, an enclosure can have equivalent power thresholds EncPmax, EncPmt, and EncPtyp that represent the sum of all power consuming subsystems within the enclosure (¶ 0045-0046); According to block 460, the question is asked whether the potential enclosure power consumption, EncPmax, would exceed the allowable budget limit. If the answer to this question is "yes" then flow proceeds to block 470. If the answer to this question is "no" then flow proceeds to block 480. Block 460 represents the decision point at which the enclosure compares the newly calculated enclosure power consumption with the allowable budget limit ... The comparison of Enclosure Power Consumption to EncPlimit proceeds to either one of two states (i.e., blocks 470 or 480) ... The power management agent checks or determines if the enclosure can run in a potentially degraded state ... According to block 670, the enclosure sends the new Pmax value to the blade. The blade adjusts its consumption. Then, according to block 680, upon reception of the new value, Pmax, the blade commences operation within a reduced power envelope. If the blade cannot operate within the adjusted power envelope, then the enclosure can deny power by forcing the blade to power off (¶ 0049-0061)]; and
in response to the sum of the power consumption being less than the total power limit of the memory box, change the operation mode of the first group from the second operating mode back to the first operation mode [During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM) ... In response to an LPM condition (e.g., battery life being less than or equal to 10%) being satisfied, a memory mapping of read-only data may be updated from the SDRAM 402 to the NOR flash memory 404 ... A portion of the SDRAM 402 that stores the read-only data may be disabled, and access requests (e.g., read requests) for the read-only data during the LPM may be directed to the NOR flash memory 404 instead of to the SDRAM 402 ... In a particular embodiment, disabling bank 2 of the SDRAM 402 during the LPM may include turning off bank 2 during the LPM ,,, It will be appreciated that disabling a portion of the SDRAM 402 (or the entire SDRAM 402) during the LPM may reduce power consumption ... In response to a determination that the LPM condition is no longer satisfied (e.g., battery life exceeds 10%), bank 2 of the SDRAM 402 may be enabled and the memory mappings 440 for the read-only data stored in bank 2 of the SDRAM 402 may be updated to point to bank 2 of the SDRAM 402 instead of to the NOR flash memory 404 ... (c9 L55 to c10 L33); Leech also teaches this limitation – According to block 480, this state indicates that the power management agent determined that the newly calculated power consumption is within the allowable limits for the enclosure (¶ 0052)].
Regarding claim 1, Taha teaches entering a low performance mode (LPM) in which SDRAM is disabled/turned off to reduce power consumption when the battery capacity is below a threshold [During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM) ... In response to an LPM condition (e.g., battery life being less than or equal to 10%) being satisfied, a memory mapping of read-only data may be updated from the SDRAM 402 to the NOR flash memory 404 ... A portion of the SDRAM 402 that stores the read-only data may be disabled, and access requests (e.g., read requests) for the read-only data during the LPM may be directed to the NOR flash memory 404 instead of to the SDRAM 402 ... In a particular embodiment, disabling bank 2 of the SDRAM 402 during the LPM may include turning off bank 2 during the LPM ,,, It will be appreciated that disabling a portion of the SDRAM 402 (or the entire SDRAM 402) during the LPM may reduce power consumption ... In response to a determination that the LPM condition is no longer satisfied (e.g., battery life exceeds 10%), bank 2 of the SDRAM 402 may be enabled and the memory mappings 440 for the read-only data stored in bank 2 of the SDRAM 402 may be updated to point to bank 2 of the SDRAM 402 instead of to the NOR flash memory 404 ... (c9 L55 to c10 L33)], but does not expressively teach that a sum of power consumption of the first group and the second group exceeding the total power limit.
However, Leech specifically teaches entering a power-reduction state when a sum of power consumption of the first group and the second group exceeding the total power limit [The power management agent 310 determines whether the sum of the current power consumption levels of the compute nodes 120 in the compute node pool and the requested power increase in the compute node 120 falls below an allowable power budget for the compute node pool, as indicated at step 412. The allowable power budget and an associated allowable power budget limit for the compute node pool are determined at design time or they comprise run-time configurable system parameters ... (¶ 0040-0041); According to block 430, the blade transmits its power requirements to the enclosure. This data includes such numbers as maximum power consumption, Pmax, calculated using databook maximum values at design time, typical power consumption, Ptyp, and/or a hybrid value between the two Pmt which would represent the maximum possible power consumption under the normal specified operating conditions (measured at design time or self measured) ... Similarly, an enclosure can have equivalent power thresholds EncPmax, EncPmt, and EncPtyp that represent the sum of all power consuming subsystems within the enclosure (¶ 0045-0046); According to block 460, the question is asked whether the potential enclosure power consumption, EncPmax, would exceed the allowable budget limit. If the answer to this question is "yes" then flow proceeds to block 470. If the answer to this question is "no" then flow proceeds to block 480. Block 460 represents the decision point at which the enclosure compares the newly calculated enclosure power consumption with the allowable budget limit ... The comparison of Enclosure Power Consumption to EncPlimit proceeds to either one of two states (i.e., blocks 470 or 480) ... The power management agent checks or determines if the enclosure can run in a potentially degraded state ... According to block 670, the enclosure sends the new Pmax value to the blade. The blade adjusts its consumption. Then, according to block 680, upon reception of the new value, Pmax, the blade commences operation within a reduced power envelope. If the blade cannot operate within the adjusted power envelope, then the enclosure can deny power by forcing the blade to power off (¶ 0049-0061)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to enter a power-reduction state when a sum of power consumption of the first group and the second group exceeding the total power limit, as specifically demonstrated by Leech, and to incorporate it into the existing scheme disclosed by Taha, so that the total power consumption of all memory components would not exceed the allowable limit.
As to claim 2, Taha in view of Leech teaches The memory box of claim 1, wherein, for the dynamically controlling of the operation mode, the mode manager is further configured to determine a current operation mode of the first group according to the state information compare the state information with marginal resource information corresponding to the state information and change the current operation mode of the first group to another operation mode that is different than the current operation mode based on a result of the comparing [Taha -- as shown in figure 5, steps 502-508; Systems and methods of dynamic memory management to reduce power consumption are disclosed. The described techniques, or portions thereof, may be used during a sleep mode of an electronic device, during a normal operating mode of the electronic device, or any combination thereof. For example, a first technique may involve utilizing non-volatile memory at an electronic device to reduce sleep floor current ... As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... During the LPM, self-refreshes of volatile memory portions that store the read-only data may be disabled, because the read-only data is being accessed from the non-volatile memory instead. Alternately, the volatile memory portions thereof may be turned off altogether during the LPM (c1 L58 to c2 L40); During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM). Alternately, or in addition, the LPM may be entered in response to a user command or user input requesting a transition to the LPM. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance (c9 L55-62);
Leech -- The power management agent 310 determines whether the sum of the current power consumption levels of the compute nodes 120 in the compute node pool and the requested power increase in the compute node 120 falls below an allowable power budget for the compute node pool, as indicated at step 412. The allowable power budget and an associated allowable power budget limit for the compute node pool are determined at design time or they comprise run-time configurable system parameters ... (¶ 0040-0041); According to block 430, the blade transmits its power requirements to the enclosure. This data includes such numbers as maximum power consumption, Pmax, calculated using databook maximum values at design time, typical power consumption, Ptyp, and/or a hybrid value between the two Pmt which would represent the maximum possible power consumption under the normal specified operating conditions (measured at design time or self measured) ... Similarly, an enclosure can have equivalent power thresholds EncPmax, EncPmt, and EncPtyp that represent the sum of all power consuming subsystems within the enclosure (¶ 0045-0046); According to block 460, the question is asked whether the potential enclosure power consumption, EncPmax, would exceed the allowable budget limit. If the answer to this question is "yes" then flow proceeds to block 470. If the answer to this question is "no" then flow proceeds to block 480. Block 460 represents the decision point at which the enclosure compares the newly calculated enclosure power consumption with the allowable budget limit ... The comparison of Enclosure Power Consumption to EncPlimit proceeds to either one of two states (i.e., blocks 470 or 480) ... The power management agent checks or determines if the enclosure can run in a potentially degraded state ... According to block 670, the enclosure sends the new Pmax value to the blade. The blade adjusts its consumption. Then, according to block 680, upon reception of the new value, Pmax, the blade commences operation within a reduced power envelope. If the blade cannot operate within the adjusted power envelope, then the enclosure can deny power by forcing the blade to power off (¶ 0049-0061)].
As to claim 3, Taha in view of Leech teaches The memory box of claim 1, wherein, for the dividing of the memory devices into the first group [Taha -- for example, the volatile memory] and the second group [Taha -- for example, the volatile memory], the mode manager is further configured to divide the memory devices into the first group and the second group according to characteristics of the memory devices [Taha -- A method includes initiating a transition from an operating mode to a sleep mode at an electronic device that includes a volatile memory and a non-volatile memory ,,, (abstract)], wherein at a first time, operational importance of the first group is higher than operational importance of the second group [Taha: during normal operations, read data from the volatile memory -- As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM). The LPM may also be entered in response to a user command. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance. During the LPM, read-only data may be accessed from non-volatile memory instead of from the volatile memory ... (c2 L20-40)], and at a second time, the operational importance of the first group is lower than the operational importance of the second group [Taha: During LPM, read data from the non-volatile memory -- During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM) ... In response to an LPM condition (e.g., battery life being less than or equal to 10%) being satisfied, a memory mapping of read-only data may be updated from the SDRAM 402 to the NOR flash memory 404 ... A portion of the SDRAM 402 that stores the read-only data may be disabled, and access requests (e.g., read requests) for the read-only data during the LPM may be directed to the NOR flash memory 404 instead of to the SDRAM 402 ... In a particular embodiment, disabling bank 2 of the SDRAM 402 during the LPM may include turning off bank 2 during the LPM ,,, It will be appreciated that disabling a portion of the SDRAM 402 (or the entire SDRAM 402) during the LPM may reduce power consumption ... In response to a determination that the LPM condition is no longer satisfied (e.g., battery life exceeds 10%), bank 2 of the SDRAM 402 may be enabled and the memory mappings 440 for the read-only data stored in bank 2 of the SDRAM 402 may be updated to point to bank 2 of the SDRAM 402 instead of to the NOR flash memory 404 ... (c9 L55 to c10 L33)].
As to claim 4, Taha in view of Leech teaches The memory box of claim 1, wherein the memory devices have same characteristics [Leech – as shown in figure 2, 120, where the computer nodes have the same characteristics; ... The power components 360 comprises, for instance, processors, memories, disk drives, or other device in the compute nodes 120 whose power state is detected and varied. In addition, the power components 360 have a plurality of power states. For instance, the power components 360 have a minimum power state, such as, when the power components 360 are idle and a maximum power state, such as, when the power components 360 are fully operational. In addition, for instance, the power components 360 have one or more power states between the minimum power state and the maximum power state, at which the power components 360 are operated (¶ 0036)].
As to claim 5, Taha in view of Leech teaches The memory box of claim 1, wherein the mode manager comprises a controller configured to control first group and the second group to operate in a corresponding operation mode [Taha -- as shown in figure 5, steps 502-508; Systems and methods of dynamic memory management to reduce power consumption are disclosed. The described techniques, or portions thereof, may be used during a sleep mode of an electronic device, during a normal operating mode of the electronic device, or any combination thereof. For example, a first technique may involve utilizing non-volatile memory at an electronic device to reduce sleep floor current ... As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... During the LPM, self-refreshes of volatile memory portions that store the read-only data may be disabled, because the read-only data is being accessed from the non-volatile memory instead. Alternately, the volatile memory portions thereof may be turned off altogether during the LPM (c1 L58 to c2 L40); During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM). Alternately, or in addition, the LPM may be entered in response to a user command or user input requesting a transition to the LPM. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance (c9 L55-62);
Leech -- The power management agent 310 determines whether the sum of the current power consumption levels of the compute nodes 120 in the compute node pool and the requested power increase in the compute node 120 falls below an allowable power budget for the compute node pool, as indicated at step 412. The allowable power budget and an associated allowable power budget limit for the compute node pool are determined at design time or they comprise run-time configurable system parameters ... (¶ 0040-0041); According to block 430, the blade transmits its power requirements to the enclosure. This data includes such numbers as maximum power consumption, Pmax, calculated using databook maximum values at design time, typical power consumption, Ptyp, and/or a hybrid value between the two Pmt which would represent the maximum possible power consumption under the normal specified operating conditions (measured at design time or self measured) ... Similarly, an enclosure can have equivalent power thresholds EncPmax, EncPmt, and EncPtyp that represent the sum of all power consuming subsystems within the enclosure (¶ 0045-0046); According to block 460, the question is asked whether the potential enclosure power consumption, EncPmax, would exceed the allowable budget limit. If the answer to this question is "yes" then flow proceeds to block 470. If the answer to this question is "no" then flow proceeds to block 480. Block 460 represents the decision point at which the enclosure compares the newly calculated enclosure power consumption with the allowable budget limit ... The comparison of Enclosure Power Consumption to EncPlimit proceeds to either one of two states (i.e., blocks 470 or 480) ... The power management agent checks or determines if the enclosure can run in a potentially degraded state ... According to block 670, the enclosure sends the new Pmax value to the blade. The blade adjusts its consumption. Then, according to block 680, upon reception of the new value, Pmax, the blade commences operation within a reduced power envelope. If the blade cannot operate within the adjusted power envelope, then the enclosure can deny power by forcing the blade to power off (¶ 0049-0061)].
As to claim 10, Taha in view of Leech teaches A computing system comprising: the memory box of claim 1; and a host device [Leech – the corresponding “host device” is the “power management agent” as shown in figure 3, 310].
As to claim 15, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details.
As to claim 16, it recites substantially the same limitations as in claim 3, and is rejected for the same reasons set forth in the analysis of claim 3. Refer to “As to claim 3” presented earlier in this Office Action for details.
As to claim 18, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details.
As to claim 19, it recites substantially the same limitations as in claim 1, and is rejected for the same reasons set forth in the analysis of claim 1. Refer to “As to claim 1” presented earlier in this Office Action for details.
As to claim 20, it recites substantially the same limitations as in claim 2, and is rejected for the same reasons set forth in the analysis of claim 2. Refer to “As to claim 2” presented earlier in this Office Action for details.
As to claim 21, it recites substantially the same limitations as in claim 3, and is rejected for the same reasons set forth in the analysis of claim 3. Refer to “As to claim 3” presented earlier in this Office Action for details.
As to claim 22, it recites substantially the same limitations as in claim 4, and is rejected for the same reasons set forth in the analysis of claim 4. Refer to “As to claim 4” presented earlier in this Office Action for details.
As to claim 23, Taha in view of Leech teaches The memory box of claim 1, wherein the operational importance is based on thermal management [Leech -- The power management agent 310 also receives information pertaining to the temperatures of the compute nodes 120. The temperatures of the compute nodes 120 are detected by one or more temperature sensors 330, which include, for instance, thermometers, thermistors, thermocouples, or the like. Information pertaining to the amount of power being consumed by the compute nodes 120 and the temperatures of the compute nodes 120 are transmitted to the power management agent 310 as indicated by the arrow 340 ... (¶ 0033-0034)].
As to claim 24, Taha in view of Leech teaches The memory box of claim 1, wherein the mode manager is further configured to set the first group to operate in the first operating mode at a predetermined performance, and to set the second group to operate in the second operating mode within a range not exceeding the total power limit of the memory box [Taha -- as shown in figure 5, steps 502-508; Systems and methods of dynamic memory management to reduce power consumption are disclosed. The described techniques, or portions thereof, may be used during a sleep mode of an electronic device, during a normal operating mode of the electronic device, or any combination thereof. For example, a first technique may involve utilizing non-volatile memory at an electronic device to reduce sleep floor current ... As another example, a second technique may involve monitoring battery life during normal (e.g., non-sleep) mode. When the battery life falls below a threshold, an electronic device may enter a low performance mode (LPM) ... During the LPM, self-refreshes of volatile memory portions that store the read-only data may be disabled, because the read-only data is being accessed from the non-volatile memory instead. Alternately, the volatile memory portions thereof may be turned off altogether during the LPM (c1 L58 to c2 L40); During operation, the electronic device may monitor battery life. When the battery life falls below a threshold (e.g., 10%), the electronic device may enter a low performance mode (LPM). Alternately, or in addition, the LPM may be entered in response to a user command or user input requesting a transition to the LPM. The LPM may differ from sleep mode in that the LPM may provide continuous system operation, albeit at reduced performance (c9 L55-62);
Leech -- The power management agent 310 determines whether the sum of the current power consumption levels of the compute nodes 120 in the compute node pool and the requested power increase in the compute node 120 falls below an allowable power budget for the compute node pool, as indicated at step 412. The allowable power budget and an associated allowable power budget limit for the compute node pool are determined at design time or they comprise run-time configurable system parameters ... (¶ 0040-0041); According to block 430, the blade transmits its power requirements to the enclosure. This data includes such numbers as maximum power consumption, Pmax, calculated using databook maximum values at design time, typical power consumption, Ptyp, and/or a hybrid value between the two Pmt which would represent the maximum possible power consumption under the normal specified operating conditions (measured at design time or self measured) ... Similarly, an enclosure can have equivalent power thresholds EncPmax, EncPmt, and EncPtyp that represent the sum of all power consuming subsystems within the enclosure (¶ 0045-0046); According to block 460, the question is asked whether the potential enclosure power consumption, EncPmax, would exceed the allowable budget limit. If the answer to this question is "yes" then flow proceeds to block 470. If the answer to this question is "no" then flow proceeds to block 480. Block 460 represents the decision point at which the enclosure compares the newly calculated enclosure power consumption with the allowable budget limit ... The comparison of Enclosure Power Consumption to EncPlimit proceeds to either one of two states (i.e., blocks 470 or 480) ... The power management agent checks or determines if the enclosure can run in a potentially degraded state ... According to block 670, the enclosure sends the new Pmax value to the blade. The blade adjusts its consumption. Then, according to block 680, upon reception of the new value, Pmax, the blade commences operation within a reduced power envelope. If the blade cannot operate within the adjusted power envelope, then the enclosure can deny power by forcing the blade to power off (¶ 0049-0061)].
5. Claims 9, 11-12, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Taha in view of Leech, and further in view of Ping et al. (US Patent Application Publication 2015/0185813, hereinafter Ping).
As to claim 9, Taha in view of Leech teaches the memory devices are connected to the host device, wherein, for the receiving of the priority, the mode manager is configured to receive state information from the sensor from the host device [Leech -- the corresponding “host device” is the “power management agent” as shown in figure 3, 310; The power management agent 310 also receives information pertaining to the temperatures of the compute nodes 120. The temperatures of the compute nodes 120 are detected by one or more temperature sensors 330, which include, for instance, thermometers, thermistors, thermocouples, or the like. Information pertaining to the amount of power being consumed by the compute nodes 120 and the temperatures of the compute nodes 120 are transmitted to the power management agent 310 as indicated by the arrow 340 ... The power management agent 310 implements the power consumption module 314 to monitor the current power consumption levels of the compute nodes 120. The power management agent 310 also implements the power consumption module 314 to compare the current power consumption levels with a power budget. In addition to the current power consumption levels, the power management agent 310 also implements the power comparison module 315 to compare pending increases in the power utilization levels of the compute nodes with the power budget (¶ 0033-0035)], but does not teach doing this through a switch.
However, a switch that connects components together is well known and commonly used in the art.
For example, Ping specifically teaches a switch configured to connect the memory devices to a host device, wherein, the mode manager is configured to receive the state information between the plurality of groups from the host device through the switch [as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210); Embodiments of the inventive concept may also include a system for dynamically allocating a thermal budget for a memory array. The system may include a plurality of memory groups in the memory array, a switch coupled to each of the plurality of memory groups, dynamic thermal budget logic coupled to the switch … (¶ 0015)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to have used a switch configured to connect the memory devices to the host device, as specifically demonstrated by Ping, and to incorporate it into the existing scheme disclosed by Taha in view of Leech, because Ping teaches doing so provides the capability and flexibility of throttling the groups of memory devices [In some embodiments, increasing the throttling of the particular memory group further comprises increasing, by a switch, the throttling of the particular memory group. In some embodiments, decreasing the throttling of the particular memory group further comprises decreasing, by a switch, the throttling of the particular memory group (¶ 0011)].
As to claim 11, Taha in view of Leech & Ping teaches The computing system of claim 10, further comprising a switch configured to connect the host device to the memory box [Ping -- as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210)].
As to claim 12, it recites substantially the same limitations as in claims 1 and 9, and is rejected for the same reasons set forth in the analysis of claims 1 and 9. Refer to “As to claim 1” and “As to claim 9” presented earlier in this Office Action for details.
As to claim 14, Taha in view of Leech & Ping teaches A memory box [Taha -- A method includes initiating a transition from an operating mode to a sleep mode at an electronic device that includes a volatile memory and a non-volatile memory ,,, (abstract)] comprising: the switch of claim 12 [Ping -- as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210)], wherein the switch is configured to connect the memory device to the host device [Ping -- as shown in figure 2A, where a switch (225) is connected to a host (CPU unit, 210)]; the memory devices comprising memory cells configured to store data [Taha -- A method includes initiating a transition from an operating mode to a sleep mode at an electronic device that includes a volatile memory and a non-volatile memory ,,, (abstract)]; and the sensor configured to measure the state information [Leech -- The power management agent 310 also receives information pertaining to the temperatures of the compute nodes 120. The temperatures of the compute nodes 120 are detected by one or more temperature sensors 330, which include, for instance, thermometers, thermistors, thermocouples, or the like. Information pertaining to the amount of power being consumed by the compute nodes 120 and the temperatures of the compute nodes 120 are transmitted to the power management agent 310 as indicated by the arrow 340 ... (¶ 0033-0034)]
6. Claims 8 is rejected under 35 U.S.C. 103 as being unpatentable over Taha in view of Leech, and further in view of Banerjee et al. (US Patent 11,632,337, hereinafter Banerjee).
Regarding claim 8, Taha in view of Leech does not teach the memory devices comprise Compute Express Link (CXL) memory devices.
However, Compute Express Link (CXL) memory devices are well known and commonly used in the art.
For example, Banerjee specifically teaches Compute Express Link (CXL) memory devices [… In some examples, the CXL-E domain agent 118 may include functionality to communicate with a CXL-E domain manager 124 to set up CXL-E communications between devices. In some examples, the CXL-E NIC 120 may translate CXL frames to Ethernet frames, and vice-versa, for performing the techniques described herein for enabling a CXL-E fabric. The CXL-E NIC 120 may connect to the CXL-E switch 110 to provide the servers 106 with connectivity to the low latency ethernet network 126, connectivity to MLD appliances 108, and the like … (c16 L25-45)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to have Compute Express Link (CXL) memory devices, as specifically demonstrated by Banerjee, and to incorporate it into the existing scheme disclosed by Taha in view of Leech, because Banerjee teaches doing so enables disaggregated composable servers in data centers to share resources between hosts and servers/targets offering resources [As discussed above, disaggregated composable servers in data centers are becoming a reality due to the introduction of Compute Express Link (CXL) technologies in the processor complex. Among other things, CXL-based fabrics enable disaggregated composable servers in data centers to share resources between hosts and servers/targets offering resources. Although CXL-based fabrics offer many advantages, several challenges still remain to be solved to enable disaggregated composable servers in data centers (c2 L55-63)].
7. Claims 13 is rejected under 35 U.S.C. 103 as being unpatentable over Taha in view of Leech & Ping, and further in view of Walsh (US Patent Application Publication 2019/0324658).
Regarding claim 13, Taha in view of Leech & Ping does not teach a bandwidth limiter configured to control a bandwidth for data transfer between the host device and the plurality of groups; and a controller configured to control the bandwidth limiter such that the plurality of groups operate in a corresponding operation mode.
However, Walsh specifically a bandwidth for data transfer between the host device and the plurality of groups; and a controller configured to control the bandwidth limiter such that the plurality of groups operate in a corresponding operation mode [In one embodiment, a storage device comprises a command processor configured to monitor a latency QoS status and provide the latency QoS status feedback to a host, one or more memory devices coupled to the command processor, and a bandwidth limiter coupled to the command processor. The bandwidth limiter is configured to determine a bandwidth and determine whether the bandwidth is above or below a threshold value. The storage device further comprises a command fetch coupled to the bandwidth limiter. The command fetch is configured to send commands to the bandwidth limiter, and to temporarily pause fetching additional commands from the host and sending commands to the bandwidth limiter if the bandwidth limiter determines the bandwidth is over the threshold value (¶ 0007)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to have a bandwidth for data transfer between the host device and the plurality of groups; and a controller configured to control the bandwidth limiter such that the plurality of groups operate in a corresponding operation mode, as specifically demonstrated by Walsh, and to incorporate it into the existing scheme disclosed by Taha in view of Leech & Ping, because Walsh teaches doing so provides better quality of services (QoS) [In one embodiment, a storage device comprises a command processor configured to monitor a latency QoS status and provide the latency QoS status feedback to a host, one or more memory devices coupled to the command processor, and a bandwidth limiter coupled to the command processor. The bandwidth limiter is configured to determine a bandwidth and determine whether the bandwidth is above or below a threshold value. The storage device further comprises a command fetch coupled to the bandwidth limiter. The command fetch is configured to send commands to the bandwidth limiter, and to temporarily pause fetching additional commands from the host and sending commands to the bandwidth limiter if the bandwidth limiter determines the bandwidth is over the threshold value (¶ 0007)].
8. Claims 7 is rejected under 35 U.S.C. 103 as being unpatentable over Taha in view of Leech, and further in view of Shim et al. (US Patent Application Publication 2020/0241984, hereinafter Shim).
Regarding claim 7, Taha in view of Leech The memory box of claim 3,wherein the mode manager comprises: a first controller configured to control the group of which the priority is higher to operate in the first operation mode [Taha – processor, figure 1, 102], but does not teach a second controller configured to control the group of which the priority is lower to operate in the second operation mode.
However, Shim specifically teaches a first controller configured to control the group of which the priority is higher to operate in the first operation mode; and a second controller configured to control the group of which the priority is lower to operate in the second operation mode [The memory controllers 520 may be disposed between the data controller 510 and the plurality of memories 420, and may support interfacing therebetween. The memory controllers 520 may include a first memory controller (iMC0) 520A, a second memory controller (iMC1) 520B, and a third memory controller (iMC2) 520C respectively corresponding to the first group of memories 420A, the second group of memories 420B, and the third group of memories 420C included in the plurality of memories 420. The memory controller (iMC0) 520A may be disposed between the data controller 510 and the first group of memories 420A, and may support data transmission/reception therebetween. The memory controller (iMC1) 520B may be disposed between the data controller 510 and the second group of memories 420B, and may support data transmission/reception therebetween. The memory controller (iMC2) 520C may be disposed between the data controller 510 and the third group of memories 420C, and may support data transmission/reception therebetween. For example, when the third group of memories 420C are flash memories, the memory controller (iMC2) 520C may be a flash controller. The first to third group of memories 420A to 420C are for illustrative purposes only and the embodiment is not limited thereto (¶ 0075)].
Therefore, it would have been obvious for one of ordinary skills in the art before the effective filing date of the claimed invention to have a first controller configured to control the group of which the priority is higher to operate in the first operation mode; and a second controller configured to control the group of which the priority is lower to operate in the second operation mode, as specifically demonstrated by Shim, and to incorporate it into the existing scheme disclosed by Taha in view of Leech, in order to allow separate and independent changes of the power consumption modes for different groups of memory devices dynamically.
Conclusion
9. Claims 1-5, 7-16, and 18-24 are rejected as explained above.
10. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHENG JEN TSAI whose telephone number is 571-272-4244. The examiner can normally be reached on Monday-Friday, 9-6.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Reginald Bragdon can be reached on 571-272-4204. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SHENG JEN TSAI/Primary Examiner, Art Unit 2139
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