Prosecution Insights
Last updated: April 19, 2026
Application No. 18/424,961

POWER OVER ETHERNET SYSTEM AND SWITCHING DEVICE AND METHOD FOR THE SAME

Non-Final OA §103
Filed
Jan 29, 2024
Examiner
CLEARY, THOMAS J
Art Unit
2175
Tech Center
2100 — Computer Architecture & Software
Assignee
Senao Networks Inc.
OA Round
3 (Non-Final)
73%
Grant Probability
Favorable
3-4
OA Rounds
2y 7m
To Grant
89%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allow Rate
537 granted / 739 resolved
+17.7% vs TC avg
Strong +16% interview lift
Without
With
+16.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
27 currently pending
Career history
766
Total Applications
across all art units

Statute-Specific Performance

§101
3.1%
-36.9% vs TC avg
§103
36.8%
-3.2% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
25.7%
-14.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 739 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Drawings The drawings were received on 7 January 2025. These drawings are acceptable. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-2, 7-8, and 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over US Patent Application Publication Number 2015/0019884 to Huff et al. (“Huff”) and US Patent Application Publication Number 2019/0081556 to Patel et al. (“Patel”). In reference to Claim 1, Huff discloses a power over ethernet (POE) system (See Paragraphs 3 and 13), comprising: a plurality of POE ports (See Figure 1 PSE CH1 and PSE CH2 and Paragraphs 5-6); a power detector, being connected with the plurality of POE ports, and being configured to detect a power input from each of the plurality of POE ports and generate a detection signal (See Figure 1 Numbers 14 and 16 and Paragraphs 7-8 [portion of PD controllers that detects the power input]); a plurality of switches, being connected with the plurality of POE ports respectively (See Figure 1 Numbers 18 and 20 and Paragraph 8); a plurality of direct current (DC) converter modules, being connected with the plurality of switches (See Figure 1 Numbers 22 and 24 and D1-D4 and Paragraphs 3-4 and 8 [buck/boost flyback regulators are types of DC converters]), and each of the plurality of DC converter modules comprising a DC converter (See Figure 1 Numbers 22 and 24 and Paragraphs 3-4 and 8 [buck/boost flyback regulators are types of DC converters]) and a current sharing controller (See Figure 1 Numbers D1 and D2 and Numbers D3 and D4 and Paragraphs 9 and 43 [diodes provide control to allow current from each channel to be shared by the load]) that are electrically connected with each other (See Figure 1), and the plurality of DC converters are electrically connected with the plurality of switches respectively (See Figure 1); and a controller, being connected with the power detector and the plurality of switches, and being configured to generate a control signal based on the detection signal, wherein the control signal is used to control the plurality of switches and thus controls electrical connections between the plurality of POE ports and the plurality of DC converter modules (See Figure 1 Numbers 14 and 16 and Paragraphs 7-8 [portion of PD controller that outputs PWRGD1 and PWRGD2 based on the detection]) so that the plurality of POE ports transmit the power input to the DC converter of the plurality of DC converter modules respectively (See Figure 1 and Paragraphs 6-9); wherein power converted by each DC converter is tuned into power suitable for being outputted to powered devices under current sharing (See Paragraph 9). However, Huff does not explicitly disclose that the controller is further configured to regularly change the electrical connections between the plurality of POE ports and the plurality of DC converter modules in order through the control signal. Patel discloses a power over ethernet (POE) system (See Figure 3 Number 350 and Paragraphs 1, 10-11, and 24) comprising a plurality of POE ports (See Figure 3 Numbers 331 and 332) connected to a plurality of DC converter modules (See Figure 3 transformers); wherein a controller is further configured to regularly change the electrical connections between the plurality of POE ports and the plurality of DC converter modules in order through a control signal (See Paragraphs 8-9, 18-19, 22, and 27-28). It would have been obvious to one of ordinary skill in the art at the time the invention as filed to construct the device of Huff using the POE source port balancing of Patel, resulting in the invention of Claim 1, in order to yield the predictable result of extending the life of hardware components by utilizing each port approximately equally and reducing wear and tear by running the circuitry for a reduced amount of time (See Paragraph 28 of Patel). In reference to Claim 2, Huff and Patel disclose the limitations as applied to Claim 1 above. Huff further discloses that the detection signal is used to indicate an input status of each of the POE ports (See Paragraphs 7-8). Claims 7 and 12 recite limitaons which are substantially equivalent to those of Claim 1 and are rejected under similar reasoning. Claims 8 and 13 recite limitaons which are substantially equivalent to those of Claim 2 and are rejected under similar reasoning. Claim(s) 1-2, 7-8, and 12-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huff and US Patent Application Publication Number 2019/0081556 to Hazani et al. (“Hazani”). In reference to Claim 1, Huff discloses a power over ethernet (POE) system (See Paragraphs 3 and 13), comprising: a plurality of POE ports (See Figure 1 PSE CH1 and PSE CH2 and Paragraphs 5-6); a power detector, being connected with the plurality of POE ports, and being configured to detect a power input from each of the plurality of POE ports and generate a detection signal (See Figure 1 Numbers 14 and 16 and Paragraphs 7-8 [portion of PD controllers that detects the power input]); a plurality of switches, being connected with the plurality of POE ports respectively (See Figure 1 Numbers 18 and 20 and Paragraph 8); a plurality of direct current (DC) converter modules, being connected with the plurality of switches (See Figure 1 Numbers 22 and 24 and D1-D4 and Paragraphs 3-4 and 8 [buck/boost flyback regulators are types of DC converters]), and each of the plurality of DC converter modules comprising a DC converter (See Figure 1 Numbers 22 and 24 and Paragraphs 3-4 and 8 [buck/boost flyback regulators are types of DC converters]) and a current sharing controller (See Figure 1 Numbers D1 and D2 and Numbers D3 and D4 and Paragraphs 9 and 43 [diodes provide control to allow current from each channel to be shared by the load]) that are electrically connected with each other (See Figure 1), and the plurality of DC converters are electrically connected with the plurality of switches respectively (See Figure 1); and a controller, being connected with the power detector and the plurality of switches, and being configured to generate a control signal based on the detection signal, wherein the control signal is used to control the plurality of switches and thus controls electrical connections between the plurality of POE ports and the plurality of DC converter modules (See Figure 1 Numbers 14 and 16 and Paragraphs 7-8 [portion of PD controller that outputs PWRGD1 and PWRGD2 based on the detection]) so that the plurality of POE ports transmit the power input to the DC converter of the plurality of DC converter modules respectively (See Figure 1 and Paragraphs 6-9); wherein power converted by each DC converter is tuned into power suitable for being outputted to powered devices under current sharing (See Paragraph 9). However, Huff does not explicitly disclose that the controller is further configured to regularly change the electrical connections between the plurality of POE ports and the plurality of DC converter modules in order through the control signal. Hazani discloses a power system (See Figure 2 and Paragraph 31) comprising a plurality of power ports (See Figure 2 Numbers 208(1)-208(Q) and Paragraph 31) connected to a plurality of output connections via a plurality of switches (See Figure 2 Numbers 234(1)-234(Q) and Paragraph 34); wherein a controller is further configured to regularly change the electrical connections between the plurality of power ports and the plurality of output connections via a plurality of switches in order through a control signal (See Paragraphs 38-39 and 59). It would have been obvious to one of ordinary skill in the art at the time the invention as filed to construct the device of Huff using the power source port cycling of Hazani, resulting in the invention of Claim 1, in order to yield the predictable result of allowing for tolerance of inaccuracies in the power output from the power supplies coupled to the power ports by providing power that is proportional to the power supplying capabilities of the power supplies (See Paragraph 38 of Hazani). In reference to Claim 2, Huff and Hazani disclose the limitations as applied to Claim 1 above. Huff further discloses that the detection signal is used to indicate an input status of each of the POE ports (See Paragraphs 7-8). Claims 7 and 12 recite limitaons which are substantially equivalent to those of Claim 1 and are rejected under similar reasoning. Claims 8 and 13 recite limitaons which are substantially equivalent to those of Claim 2 and are rejected under similar reasoning. Response to Arguments Applicant's arguments filed 7 January 2026 have been fully considered but they are not persuasive. Applicant has argued that Huff does not disclose that the power converted by each DC converter is tuned into power suitable for being outputted to powered devices under current sharing (See Pages 9-10). In response, the Examiner notes that Huff discloses that the power converted by each DC converter is tuned into power suitable for being outputted to powered devices (See Paragraphs 8-9), and that the outputs are integrated via current sharing using diodes D1-D4 (See Paragraph 9). Applicant has argued that Huff does not disclose routing power input from multiple ports to DC converters of multiple DC converter modules respectively, nor integrating outputs of multiple DC converter modules and tuning the converted power into power suitable for being outputted to power devices under current sharing (See Page 10). In response, the Examiner notes that Huff discloses routing power input from multiple ports (See Figure 1 PSECH1 and PSECH2) to DC converters of multiple DC converter modules respectively (See Figure 1 Numbers 22 and 24 and Paragraph 8), and integrating outputs of multiple DC converter modules and tuning the converted power into power suitable for being outputted to power devices under current sharing using diodes D1-D4 (See Paragraph 9). Applicant’s remaining arguments directed to the newly presented limitation of “the controller is further configured to regularly change the electrical connections between the plurality of POE ports and the plurality of DC converter modules in order through the control signal” (See Page 10) are moot in view of the new grounds of rejection necessitated by the amendment. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to THOMAS J CLEARY whose telephone number is (571)272-3624. The examiner can normally be reached Monday-Friday 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrew Jung can be reached at 571-270-3779. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /THOMAS J. CLEARY/Primary Examiner, Art Unit 2175
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Prosecution Timeline

Jan 29, 2024
Application Filed
Jun 13, 2025
Non-Final Rejection — §103
Sep 10, 2025
Response Filed
Oct 03, 2025
Final Rejection — §103
Jan 07, 2026
Request for Continued Examination
Jan 24, 2026
Response after Non-Final Action
Feb 04, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
73%
Grant Probability
89%
With Interview (+16.2%)
2y 7m
Median Time to Grant
High
PTA Risk
Based on 739 resolved cases by this examiner. Grant probability derived from career allow rate.

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