DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the gain is inversely proportional to the amplitude of the analog input signal recited in the claims 2 and 8 and 14, an amplitude of the analog output signal is increased relative to the amplitude of the analog input signal when the amplitude of the analog input signal is below a predetermined level recited in the claims 3 and 9 and 15, the amplitude of the analog output signal is decreased relative to the amplitude of the analog input signal when the amplitude of the analog input signal is above the predetermined level recited in the claims 4 and 10 and 16, the amplitude of the analog output signal is equal to the amplitude of the analog input signal when the amplitude of the analog input signal is equal to the predetermined level recited in the claims 5 and 11 and 17, and the analog input signal is the only variable in formulating the gain control signal recited in the claims 6 and 12 and 18 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Jo et al (Fig. 1); 8,093,947].
Regarding claims 1, 7 and 13, Jo et al discloses an amplifier circuit comprising an amplifier (110) configured to receive the analog input signal (Pin) and to output an analog output signal (Pout) responsive to the analog input signal (Pin) and a gain control signal (output signals of 124), and a gain control signal generator (120) configured to receive the analog input signal (Pin) and to generate the gain control signal (output signals of 124) responsive to the analog input signal (Pin).
Regarding claims 2, 8 and 14, wherein a gain (gain of 110) of the amplifier (110) is established in response to the gain control signal (output signals of 124) and the gain is inversely proportional to the amplitude of the analog input signal (Pin).
Regarding claims 3, 9 and 15, wherein an amplitude of the analog output signal (Pout) is increased relative to the amplitude of the analog input signal (Pin) when the amplitude of the analog input signal (Pin) is below a predetermined level.
Regarding claims 4, 10 and 16, wherein the amplitude of the analog output signal (Pout) is decreased relative to the amplitude of the analog input signal (Pin) when the amplitude of the analog input signal (Pin) is above the predetermined level.
Regarding claims 5, 11 and 17, wherein the amplitude of the analog output signal (Pout) is equal to the amplitude of the analog input signal (Pin) when the amplitude of the analog input signal (Pin) is equal to the predetermined level.
Regarding claims 6, 12 and 18, wherein the analog input signal (Pin) is the only variable in formulating the gain control signal (output signals of 124).
Claim(s) 1-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Drogi et al (Fig. 3); 8,018,277].
Regarding claims 1, 7 and 13, Drogi et al discloses an amplifier circuit comprising an amplifier (104) configured to receive the analog input signal (IN) and to output an analog output signal (OUT) responsive to the analog input signal (IN) and a gain control signal (308), and a gain control signal generator (202, 208, 300, 310) configured to receive the analog input signal (IN) and to generate the gain control signal (308) responsive to the analog input signal (IN).
Regarding claims 2, 8 and 14, wherein a gain (gain of 104) of the amplifier (104) is established in response to the gain control signal (308) and the gain is inversely proportional to the amplitude of the analog input signal (IN).
Regarding claims 3, 9 and 15, wherein an amplitude of the analog output signal (OUT) is increased relative to the amplitude of the analog input signal (IN) when the amplitude of the analog input signal (IN) is below a predetermined level.
Regarding claims 4, 10 and 16, wherein the amplitude of the analog output signal (OUT) is decreased relative to the amplitude of the analog input signal (IN) when the amplitude of the analog input signal (IN) is above the predetermined level.
Regarding claims 5, 11 and 17, wherein the amplitude of the analog output signal (OUT) is equal to the amplitude of the analog input signal (IN) when the amplitude of the analog input signal (IN) is equal to the predetermined level.
Regarding claims 6, 12 and 18, wherein the analog input signal (IN) is the only variable in formulating the gain control signal (308).
Claim(s) 1-18 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Gard (Fig. 1); 5,220,589].
Regarding claims 1, 7 and 13, Gard discloses an amplifier circuit comprising an amplifier (48) configured to receive the analog input signal (46) and to output an analog output signal (33) responsive to the analog input signal (46) and a gain control signal (N), and a gain control signal generator (50) configured to receive the analog input signal (46) and to generate the gain control signal (N) responsive to the analog input signal (46).
Regarding claims 2, 8 and 14, wherein a gain (gain of 48) of the amplifier (48) is established in response to the gain control signal (N) and the gain is inversely proportional to the amplitude of the analog input signal (46).
Regarding claims 3, 9 and 15, wherein an amplitude of the analog output signal (33) is increased relative to the amplitude of the analog input signal (46) when the amplitude of the analog input signal (46) is below a predetermined level.
Regarding claims 4, 10 and 16, wherein the amplitude of the analog output signal (33) is decreased relative to the amplitude of the analog input signal (46) when the amplitude of the analog input signal (46) is above the predetermined level.
Regarding claims 5, 11 and 17, wherein the amplitude of the analog output signal (33) is equal to the amplitude of the analog input signal (46) when the amplitude of the analog input signal (46) is equal to the predetermined level.
Regarding claims 6, 12 and 18, wherein the analog input signal (46) is the only variable in formulating the gain control signal (N).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
9,319,015 teaches an amplifier circuit with the gain control signal generator network.
9,337,795 teaches an amplifier circuit with the gain control signal generator network.
7,474,237 teaches an amplifier circuit with the gain control signal generator network.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Henry Choe whose telephone number is (571)272-1760. The examiner can normally be reached MONDAY-FRIDAY 5AM-11:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached at 571-272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HENRY CHOE/ Primary Examiner, Art Unit 2843
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