Prosecution Insights
Last updated: April 19, 2026
Application No. 18/425,763

MULTI-PHASE POWER CONVERTER AND METHOD OF CONTROLLING THE SAME

Final Rejection §103
Filed
Jan 29, 2024
Examiner
ROSARIO BENITEZ, GUSTAVO A
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Delta Electronics Inc.
OA Round
2 (Final)
81%
Grant Probability
Favorable
3-4
OA Rounds
2y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allow Rate
597 granted / 733 resolved
+13.4% vs TC avg
Strong +25% interview lift
Without
With
+25.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
39 currently pending
Career history
772
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
49.3%
+9.3% vs TC avg
§102
28.1%
-11.9% vs TC avg
§112
21.0%
-19.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 733 resolved cases

Office Action

§103
DETAILED ACTION This office action is in response to the amendment filed on 01/29/2026. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to the claim(s) have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Interpretation In re to claims 10-15, method claims 10-15 are rejected based on the following case law, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device inherently performs the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed Cir. 1986). Therefore the previous rejections based on the apparatus will not be repeated. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s)1-4 and 10-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Malinin US 2023/0246542 in view of Lin US 10511235. Regarding Claims 1 and 10, Malinin teaches (Figures 1-5 and 8-10) a multi-phase power converter (100), configured to convert an input power source (AC) into an output power source (Vbulk), the multi-phase power converter comprising: at least two power conversion circuits (104-106), each power conversion circuit comprising a switch bridge arm (M3-M6) formed by an upper switch and a lower switch connected in series, and a control signal generation unit (120), configured to receive an output current of the multi-phase power converter and acquire a loading condition of the multi-phase power converter according to the output current (with 108 and iref which determines all load current conditions, see par. 21-22 and 33), and provide control signals (PWM2-PWM3) for each upper switch and each lower switch, wherein the control signal generation unit (120) is configured to correspondingly turn on or turn off the upper switches and the lower switches (M3-M6) according to the loading condition being a light-loading condition so that the at least two switch bridge arms are alternately driven (See fig. 3 which show the output current of each phase). (For Example: Par. 29-40) Malinin does not teach so that the at least two switch bridge arms are alternately and non-simultaneously driven with any switching cycle. Lin teaches (Figure 6) so that the at least two switch bridge arms (S1-s4) are alternately and non-simultaneously driven with any switching cycle (see fig. 6) . (For Example: Col. 7 lines 28-65) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Malinin to include so that the at least two switch bridge arms are alternately and non-simultaneously driven with any switching cycle, as taught by Lin for maintaining the output waveform with high quality to reduce the number of the switch element operated in the high-frequency switching as well as increase the efficiency. Regarding Claims 2 and 11, Malinin teaches (Figures 1-5 and 8-10) wherein the input power source is an alternating current power source (AC), and the at least two switch bridge arms are alternately driven according to a time period of the alternating current power source (Fig. 3, see operation of the AC signal). (For Example: Par. 29-40) Regarding Claims 3 and 12, Malinin teaches (Figures 1-5 and 8-10) wherein the number of the at least two switch bridge arms is two (104-106), and the two switch bridge arms are alternately driven when a positive half cycle and a negative half cycle (AC signal cycles) of the alternating current power source are exchanged (see fig. 3 in heavy load, par. 20-21 and 32-33). (For Example: Par. 29-40) Regarding Claims 4 and 13, Malinin teaches (Figures 1-5 and 8-10) wherein the number of the at least two switch bridge arms is an integer N (n=2, 104-106), and the plurality N of switch bridge arms are alternately driven at intervals of 360/N degrees of the alternating current power source (180 degrees see fig. 3 when in heavy load). (For Example: Par. 29-40) Claim(s) 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Malinin in view of Lin US 10511235 and further in view of Cai US 2022/0209659. Regarding Claim 5, Malinin teaches (Figures 1-5 and 8-10) wherein the at least two power conversion circuits form a Totem-Pole power factor correction circuit (par. 16), and the Totem-Pole power factor correction circuit comprises: a first switch bridge arm (104), comprising a first upper switch and a first lower switch connected in series (M3-M4), a second switch bridge arm (M5-M6), comprising a second upper switch and a second lower switch connected in series, a first upper driving circuit and a first lower driving circuit (drivers at 120 producing control signals PWM), configured to respectively control the first upper switch and the first lower switch (M3-M4), a second upper driving circuit and a second lower driving circuit (drivers at 120 producing control signals PWM), configured to respectively control the second upper switch and the second lower switch (M5-M6). Malinin does not teach a first bootstrap circuit, coupled to the first upper driving circuit and the first upper switch, a second bootstrap circuit, coupled to the second upper driving circuit and the second upper switch, and a direct current driving voltage, configured to supply power required by the first upper driving circuit, the first lower driving circuit, the second upper driving circuit, and the second lower driving circuit. Cai teaches (Figure2 ) a first bootstrap circuit (Dboot4 and Cboot4 and resistor, see par. 61), coupled to the first upper driving circuit (Dr4) and the first upper switch (S4), a second bootstrap circuit (Dboot3,Cboot3, resistor, see par. 61), coupled to the second upper driving circuit (dr3) and the second upper switch (s3), and a direct current driving voltage (Vcc), configured to supply power required by the first upper driving circuit, the first lower driving circuit, the second upper driving circuit, and the second lower driving circuit (Dr1-dr4). (For Example: Par. 60-61) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Malinin to include a first bootstrap circuit, coupled to the first upper driving circuit and the first upper switch, a second bootstrap circuit, coupled to the second upper driving circuit and the second upper switch, and a direct current driving voltage, configured to supply power required by the first upper driving circuit, the first lower driving circuit, the second upper driving circuit, and the second lower driving circuit, as taught by Cai to provide a power supply to the driver circuitry which reduces complexity of the half bridge topology and high cost for hardware. Regarding Claim 6, Malinin teaches (Figures 1-5 and 8-10) a converter. Malinin does not teach wherein the first bootstrap circuit comprises: a first diode, a first current-limiting resistor, connected to the first diode in series, and a first capacitor, connected to the first current-limiting resistor and the first upper driving circuit, the second bootstrap circuit comprises: a second diode, a second current-limiting resistor, connected to the second diode in series, and a second capacitor, connected to the second current-limiting resistor and the second upper driving circuit. Cai teaches (Figure2 ) wherein the first bootstrap circuit (Dboot4, Cboot4, resistor, par. 61) comprises: a first diode, a first current-limiting resistor, connected to the first diode in series (see fig. 2), and a first capacitor, connected to the first current-limiting resistor and the first upper driving circuit (Dr4), the second bootstrap circuit (Dboot4, Cboot4, resistor, par. 61) comprises: a second diode, a second current-limiting resistor, connected to the second diode in series, and a second capacitor, connected to the second current-limiting resistor and the second upper driving circuit (Dr3). (For Example: Par. 60-61) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Malinin to include wherein the first bootstrap circuit comprises: a first diode, a first current-limiting resistor, connected to the first diode in series, and a first capacitor, connected to the first current-limiting resistor and the first upper driving circuit, the second bootstrap circuit comprises: a second diode, a second current-limiting resistor, connected to the second diode in series, and a second capacitor, connected to the second current-limiting resistor and the second upper driving circuit, as taught by Cai to provide a power supply to the driver circuitry which reduces complexity of the half bridge topology and high cost for hardware. Claim(s) 7-8 and 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Malinin in view of Lin US 10511235 and further in view of Lin US 2021/0050773 (Herein Lin2). Regarding Claims 7 and 14, Malinin teaches (Figures 1-5 and 8-10) the converter. Malinin does not teach wherein the input power source is a direct current power source, and the at least two switch bridge arms are alternately driven in a fixed switching cycle to ensure that an upper driving circuit corresponding to the upper switch operates normally. Lin2 teaches (Figures 1-7) wherein the input power source is a direct current power source (Fig. 2, 200), and the at least two switch bridge arms (Q1-Q4) are alternately driven in a fixed switching cycle (Fig. 4c) to ensure that an upper driving circuit (controlling Q1) corresponding to the upper switch operates normally (operation shown in Fig. 4c). (For Example: Par. 35-38) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Malinin to include wherein the input power source is a direct current power source, and the at least two switch bridge arms are alternately driven in a fixed switching cycle to ensure that an upper driving circuit corresponding to the upper switch operates normally, as taught by Lin2 to significantly increase the power density of the circuit system, reduce circuit cost, and reduce circuit size. Regarding Claims 8 and 15, Malinin teaches (Figures 1-5 and 8-10) wherein the number of the at least two switch bridge arms is N (104-106), and the plurality N of switch bridge arms are alternately driven at intervals of 360/N degrees (180 degrees with n=2, see fig. 3) of an alternating current power source (AC). (For Example: Par. 29-40) Claim 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Malinin in view of Lin US 10511235 and further in view of AAPA (Applicant’s Admitted Prior Art). Regarding Claim 9, Malinin teaches (Figures 1-5 and 8-10) wherein the control signal generation unit (120) is configured to correspondingly turn on or turn off the upper switches and the lower switches (M4-M6) according to the loading condition being a heavy-loading condition (with iref see fig. 3). (For Example: Par. 29-40) Malinin does not teach w according to the loading condition being a heavy-loading condition so that the at least two switch bridge arms are simultaneously driven. AAPA teaches (Figures 1-2) according to the loading condition being a heavy-loading condition (Fig. 2 after time t1) so that the at least two switch bridge arms (91-92) are simultaneously driven (Fig. 2, In1 and In2). (For Example: Par. 5-6) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the circuit of Malinin to include according to the loading condition being a heavy-loading condition so that the at least two switch bridge arms are simultaneously driven, as taught by AAPA to meet the higher demand and acquire higher efficiency. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUSTAVO A ROSARIO-BENITEZ whose telephone number is (571)270-7888. The examiner can normally be reached M-F 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MONICA LEWIS can be reached at 5712721838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GUSTAVO A ROSARIO-BENITEZ/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

Jan 29, 2024
Application Filed
Nov 10, 2025
Non-Final Rejection — §103
Jan 26, 2026
Response Filed
Mar 05, 2026
Final Rejection — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603586
Insulated-Gate Bipolar Transistor (IGBT) Rectifier for Charging Ultra-Capacitors
2y 5m to grant Granted Apr 14, 2026
Patent 12587083
INTERNAL RAMP COMPENSATION FOR CONSTANT ON-TIME BUCK CONVERTER
2y 5m to grant Granted Mar 24, 2026
Patent 12573838
AUTONOMOUS DETECTION OF RAPID SHUTDOWN CONDITION
2y 5m to grant Granted Mar 10, 2026
Patent 12567791
DEVICE AND METHOD FOR DETECTING MAGNITUDE OF INPUT CURRENT OF SWITCHING CONVERTER
2y 5m to grant Granted Mar 03, 2026
Patent 12562644
VOLTAGE STABILIZING CIRCUIT, VOLTAGE STABILIZING METHOD, CHARGING CIRCUIT, AND ELECTRONIC EQUIPMENT
2y 5m to grant Granted Feb 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

3-4
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+25.3%)
2y 9m
Median Time to Grant
Moderate
PTA Risk
Based on 733 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month