Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This is in response to the communication filed on 11/07/2025. Claims 1-20 are pending in the application. Claims 2-10, 16 and 20 are objected. Claims 1, 11-1517-19 are rejected.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 11-15 and 17-19 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2019/0052464 A1 (hereinafter DOLIWA et al.)
Regarding claim 1, DOLIWA et al. teaches a method, comprising:
securing, in a computing device, a secret in a read-only memory (note para. [0012], [0017]: secure, non-volatile memory for storing secret key for key derivation);
generating, by the computing device using the secret, a first key pair having a first public key and a first private key, wherein the first public key is obtainable from the first private key via a first operation (note para. [0012], [0017]: generating first key pair from shared secret);
communicating, by the computing device over a computer network, with a system to obtain a component containing instructions executable in the computing device (note para. [0012], [0015]: storing key derivation/ generating product specific parameters (PSP), instructions/ firmware etc.);
computing, by the computing device, an intermediate key using information about the component installed in the computing device (note para. [0015], [0021]: generating product specific parameters/ keys, intermediate values);
combining, by the computing device, the intermediate key and the first private key via a second operation to generate a second private key in a second key pair having a second public key obtainable from the second private key via the first operation (note para. [0012], [0020] –[0022], [0028]: combining firmware signature verification key (FSK) with DH values to generate additional private keys; generating second/ additional public- private key pairs using intermediate Diffie-Hellman values)
Regarding claim 11, DOLIWA et al teaches a computing device (note para. [0010], [0012]: IC manufacturing environment 10) comprising:
a communication device (note para. [0012], [0014]: IoT devices in network); and
a processor (note para, [0012] – [0013]: CPU/ processor in IC card) configured to:
generate an intermediate key from inputs (note para. [0015], [0021]: generating product specific parameters/ keys, intermediate values);
combine the intermediate key with a first private key to generate a second private key (note para. [0012], [0020] – [0022], [0028]: combining firmware signature verification key (FSK) with DH values to generate private keys);
compute a second public key of the second private key (note para. [0012], [0020] – [0022], [0028]: generating second/ additional public- private key pairs using intermediate Diffie-Hellman values)
Regarding claim 12, DOLIWA et al teaches the computing device of claim 11, further comprising:
communicate using the communication device, the second public key to a remote device for validation without the emote device having access to the second private key (note para. [0020] – [0021]: “when using more than two key pairs, intermediate Diffie-Hellman values are exchanged instead of the public keys of both sides. This makes it possible to verify UIDs implicitly instead of using a signature. Because the private key PK used to create the intermediate value, which is used as the UID, is only known to the IC manufacturer, only UIDs generated by the IC manufacturer can be used in the shared secret calculation”);
a memory device (note para. [0012] [0013]: IC card) configured with a secret unique to the memory device among a population of memory devices, wherein the processor is further configured to compute the first private key from the secret (note para. [0012], [0016], [0017]: generating first key pair from shared secret)
Regarding claim 13, DOLIWA et al teaches the computing device of claim 12, wherein the processor is further configured to communicate with the remote device over a computer network to establish the inputs known to both the computing device and the remote device (note para. [0016], [0026], [0028]: shared secret, intermediate values for generating private/ public key pairs)
Regarding claim 14, DOLIWA et al teaches the computing device of claim 13, wherein the inputs include a secret established via a protocol of Diffie-Hellman (DH) key exchange (note para. [0010], [0021]: Diffie-Hellman values)
Regarding claim 15, DOLIWA et al teaches the computing device of claim 14, wherein the second public key is computable from the second private key via multiplication by a predetermined number; and a first public key is computable from the first private key via multiplication by the predetermined number (note para. [0010], [0021]: Diffie-Hellman values; examiner interprets performing multiplication operations with initial predetermined random number modulo prime is inherent in Diffie-Hellman protocol)
Regarding claim 17, DOLIWA et al teaches a server system (note para. [0010], [0012]: IC manufacturing environment 10), comprising:
a memory (note para. [0012], [0014]: secure memory) configured to store a component and a first public key of a computing device;
a communication device (note para. [0012], [0014]: IoT devices in network); and
a processor (note para, [0012] – [0013]: CPU/ processor in IC card) configured to:
communicate, using the communication device, the component to the computing device to cause installation of the component in the computing device (note para. [0012], [0015]: storing key derivation/ generating product specific parameters (PSP), instructions/ firmware etc.), wherein the computing device is configured to compute a second key pair, including a second private key and a second public key, from a first private key associated with the first public key in a first key pair (note para. [0012], [0020] – [0022], [0028]: combining firmware signature verification key (FSK) with DH values to generate additional private keys; generating second/ additional public- private key pairs using intermediate Diffie-Hellman values);
receive, from the computing device, the second public key (note para. [0021], [0028]);
Regarding claim 18, DOLIWA et al teaches the server system of claim 17, wherein the second key pair is computed in the computing device using inputs known to both the server system and the computing device (note para. [0016], [0026], [0028]: shared secret, intermediate values for generating private/ public key pairs)
Regarding claim 19, DOLIWA et al teaches the server system of claim 18, wherein the inputs include a secret established according to a protocol of Diffie-Hellman (DH) key exchange during communications of the component to the computing device (note para. [0010], [0021]: Diffie-Hellman values); and the inputs further include a cryptographic measurement of the component installed in the computing device (note para. [0013], [0021]: input parameters for key generation)
Allowable Subject Matter
Claims 2-10, 16 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
A shortened statutory period for response to this action is set to expire in 3 (Three) months and 0 (Zero) days from the mailing date of this letter. Failure to respond within the period for response will result in ABANDOMENT of the application (see 35 U.S.C 133, M.P.E.P 710.02(b)). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHANTO ABEDIN whose telephone number is 571-272-3551. The examiner can normally be reached on M-F from 8:30 AM to 6:30 PM. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jung (Jay) Kim, can be reached on 571-272-3804. The RightFax number for faxing directly to the examiner is 571-273-3551.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http:// www.uspto.gov/interviewpractice.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/SHANTO ABEDIN/ Primary Examiner, Art Unit 2494