Prosecution Insights
Last updated: April 19, 2026
Application No. 18/426,814

MULTI-LEVEL JUNCTION BOX FOR INSTALLATION ON SMALL SURFACE AREA

Non-Final OA §103
Filed
Jan 30, 2024
Examiner
ORTIZ, ELIM
Art Unit
2836
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Dana Heavy Vehicle Systems Group LLC
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
2y 11m
To Grant
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
449 granted / 567 resolved
+11.2% vs TC avg
Strong +23% interview lift
Without
With
+22.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
26 currently pending
Career history
593
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
58.0%
+18.0% vs TC avg
§102
19.2%
-20.8% vs TC avg
§112
14.6%
-25.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 567 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 6-9 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Kawaguchi (US 2018/0065576) in view of Lassen (US 10,855,065). Regarding claim 1, Kawaguchi teaches a junction box for a vehicle (see Fig. 1-6), comprising: a housing (see 24, Fig. 1-6); and However, Kawaguchi does not disclose a shelf coupled within the housing, the shelf dividing a first level and a second level of the housing. Yet, Lassen in the same filed of junction box assemblies teaches a shelf coupled within the housing (see division 50 and 52), the shelf dividing a first level and a second level of the housing (see 54, 56 and 58, Fig. 2). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi with the teachings of Lassen by having a shelf coupled within the housing, the shelf dividing a first level and a second level of the housing in order to maximizing vertical space, enhanced organization and defining separate zones of devices. Regarding claim 2, the combination teaches wherein the second level is positioned vertically above the first level (see 54 and 56 or 58, Fig. 2; Lassen). Regarding claim 3, the combination teaches wherein a plurality of electrical components are positioned in the junction box, the plurality of electrical components including low voltage components and high voltage components (see Col 5, line 49-63; Lassen). Regarding claim 6, the combination teaches wherein the first level includes a volume defined by a bottom surface of the shelf, a base of the housing, and side walls of the housing (see 56 or 58; Fig. 2; Lassen). Regarding claim 7, the combination teaches wherein the second level includes a volume defined by a top surface of the shelf, a cover of the housing, and side walls of the housing (see 54, Fig. 2; Lassen). Regarding claim 8, the combination teaches wherein the first level of the housing is smaller in volume (see 54, Fig. 2; Lassen) than the second level of the housing (see 56 or 58, Fig. 2; Lassen). Regarding claim 9, Kawaguchi teaches a junction box for a vehicle (see Fig. 1-6; Kawaguchi), comprising: a and a plurality of fasteners configured to couple the junction box to the vehicle (see 34, para 0025, Fig. 1-6; Kawaguchi). However, Kawaguchi does not disclose multi-level housing including a low voltage level and a high voltage level. Yet, Lassen in the same filed of junction box assemblies teaches multi-level housing (see 50 and 52, Fig. 2) including a low voltage level and a high voltage level (see Col 5, line 49-63). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi with the teachings of Lassen by having a low voltage level and a high voltage level in order to preventing electric shock and fire, minimize electromagnetic interference and avoid insulation failure while mantling code regulations that require that different voltage classes be kept separate. Regarding claim 11, the combination teaches further comprising a shelf positioned in the multi-level housing, the shelf separating the low voltage level from the high voltage level (see 50 and 52, Col 5, line 49-63, Fig. 2; Lassen). Claim 4, 10 and 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kawaguchi and Lassen in further view of Korcz (US 2013/0319715). Regarding claim 4, the combination teaches further comprising low voltage components and high voltage components (see 50 and 52, Col 5, line 49-63, Fig. 2; Lassen). However, the combination does not disclose the location of the components {positioned in the second level and positioned in the first level} Yet, Korcz in the same field of junction boxes teaches positioned in the second level and positioned in the first level (see compartments 126 and 128, Fig.5) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi and Lassen with the teachings of Korcz by having positioned in the second level and positioned in the first level in order to maximizing space, improve organization, and enhancing safety and efficiency by separating low and high voltage. Regarding claim 10, the combination teaches voltage electrical components include one or more components coupled to a base of the multi-level housing (see middle portion attached to lower case, Fig. 1; Kawaguchi) However does not disclose the low voltage level is positioned vertically below the high voltage level, wherein low voltage electrical components are positioned in the low voltage level. Yet, Korcz in the same filed of junction boxes teaches the low voltage level is positioned vertically below the high voltage level, wherein low voltage electrical components are positioned in the low voltage level (see compartments 126 and 128, Fig.5). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi and Lassen with the teachings of Korcz by having the low voltage level is positioned vertically below the high voltage level, wherein low voltage electrical components are positioned in the low voltage level in order to maximizing space, improve organization, and enhancing safety and efficiency. Regarding claim 15, Kawaguchi teaches a junction box for a vehicle (see Fig. 1-6), comprising: a housing (see 24, Fig. 1-6). However, Kawaguchi does not disclose a housing comprising a plurality of levels, the housing configured to separate low voltage electrical components and high voltage electrical components onto different levels within the housing, the low voltage electrical components coupled to different surfaces of the junction box than the high voltage electrical components. Yet, Lassen in the same filed of junction box assemblies teaches a housing (see Fig. 2) comprising a plurality of levels (see 54, 56 and 58, Fig. 2), the housing configured to separate low voltage electrical components and high voltage electrical components onto different levels within the housing (see Col 5, line 49-63), the low voltage electrical components coupled to different surfaces of the junction box than the high voltage electrical components (see Col 5, line 49-63, each component would be in a different areas {54, 56 and 58,}. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi with the teachings of Lassen by having a housing comprising a plurality of levels, the housing configured to separate low voltage electrical components and high voltage electrical components onto different levels within the housing, the low voltage electrical components coupled to different surfaces of the junction box than the high voltage electrical components in order to enhanced safety, improved signal integrity, compliance with electrical codes, and easier maintenance and troubleshooting. However, the combination does not disclose that the different vertical levels. Yet, Korcz in the same filed of junction boxes teaches that the levels are vertical (see compartments 126 and 128, Fig.5). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi and Lassen with the teachings of Korcz by having different vertical levels in order to maximizing space, improve organization, and enhancing safety and efficiency. Regarding claim 16, the combination teaches wherein the low voltage electrical components are coupled to a base of the housing, and wherein the high voltage electrical components are not coupled to the base of the housing (see compartments 126 and 128, Fig.5; zzz). Regarding claim 17, the combination teaches further comprising a shelf coupled within an interior of the housing (see 50 or 50, Fig. 2), wherein a first volume below the shelf within the housing is a first level of the plurality of levels (see 56 or 58, Fig. 2), wherein the low voltage electrical components are positioned within the first level (see compartments 126 and 128, para 0021 and 0054, Fig.5, zzz) and wherein a second volume above the shelf within the housing is a second level of the plurality of levels (see 54, Fig. 2) wherein the high voltage electrical components are positioned within the second level (see compartments 126 and 128, para 0021 and 0054, Fig.5, zzz). Regarding claim 18, the combination teaches the high voltage electrical components (see high-voltage circuit region; Kawaguchi or Col 5, line 49-63; Lassen). However, the combination does not disclose that they are pre-assembled onto a shelf positioned within the housing. Yet, The claim would have been obvious because a pre-assembled technique is recognized as part of the ordinary capabilities of one skilled in the art and well known. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the combination by having are pre-assembled onto a shelf positioned within the housing in order to enable parallel production paths where the main housing and component shelf are assembled concurrently further allowing test-before-install" procedures and allowing faster field maintenance or repair through the simple swap-out of an entire shelf module with a new, pre-tested replacement Regarding claim 19, the combination teaches further comprising a cover that is removably coupled to the housing (see 20, Fig. 2; Lassen). Regarding claim 20, the combination teaches wherein a first level comprises the low voltage electrical components, and wherein a second level comprises the high voltage electrical components, the first level positioned vertically below the second level (see compartments 126 and 128, para 0021 and 0054, Fig.5, zzz). Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Kawaguchi, Lassen and in further view of Holleschau (US 10,938,194). Regarding claim 5, the combination teaches the junction box of claim 1. Yet does not disclose wherein the shelf is positioned on top of protrusions formed into walls of the housing. However, Holleschau in the same filed of electrical boxes teaches the shelf is positioned on top of protrusions formed into walls of the housing (see 31, Fig. 2). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi and Lassen with the teachings of Holleschau by having the shelf is positioned on top of protrusions formed into walls of the housing in order to stability, load distribution, and safety by providing superior load bearing and even weight distribution. Claims 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Kawaguchi, Lassen and in further view of Horiba (US 2024/0260203). Regarding claim 12, the combination teaches wherein the multi-level housing is rectangular in shape (see Fig. 3, Kawaguchi), Yet does not disclose protrusions are molded into each corner of the multi-level housing, the protrusions configured to support a shelf. However, Horiba in the same field teaches protrusions are molded into each corner of the multi-level housing, the protrusions configured to support a shelf. (see 24, Fig. 4). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi and Lassen with the teachings of Horiba by having protrusions are molded into each corner of the multi-level housing, the protrusions configured to support a shelf in order to provide structural integrity, manufacturing efficiency, and assembly simplification. Regarding claim 13, the combination teaches a shelf positioned in the multi-level housing (see 50, Fig. 2; Lassen) and high voltage electrical components (see Col 5, line 49-63; Lassen). However the combination does not disclose the shelf including high voltage electrical components coupled to the shelf. Yet does not disclose the shelf including electrical components coupled to the shelf (elements on top of 132, Fig. 4). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi and Lassen with the teachings of Horiba by having the shelf including electrical components coupled to the shelf in order to enhanced aesthetics by eliminating clutter, increased functionality and convenience. Regarding claim 14, the combination teaches the junction box of claim 9. However, the combination does not disclose wherein the multi-level housing and a shelf coupled within the multi-level housing comprise aluminum. However, Horiba in the same field teaches wherein the multi-level housing and a shelf coupled within the multi-level housing comprise aluminum (see 132, para 0044, Fig. 8). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Kawaguchi and Lassen with the teachings of Horiba by having the multi-level housing and a shelf coupled within the multi-level housing comprise aluminum in order to maximized space efficiency, high strength with low weight, superior durability and corrosion resistance. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELIM ORTIZ whose telephone number is (571)270-7114. The examiner can normally be reached 9:30am-6:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Rexford Barnie can be reached at (571) 272-7492. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ELIM ORTIZ/Primary Examiner, Art Unit 2836
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Prosecution Timeline

Jan 30, 2024
Application Filed
Nov 15, 2025
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+22.9%)
2y 11m
Median Time to Grant
Low
PTA Risk
Based on 567 resolved cases by this examiner. Grant probability derived from career allow rate.

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