NON-FINAL REJECTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings Objection
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters H0, RSNS10 are used in para. [0026] but not shown in any figures.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1-20 are objected to because of the following informalities:
In claim 1, lines 5 and 7, replace “said least one TMR element” with -- said at least one TMR element -- to be consistent with claim language.
In claim 2, lines 6 and 8, replace “said least one TMR element” with -- said at least one TMR element -- to be consistent with claim language.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Drouin et al. (US 2017/0285117 Al, cited by Applicants, “Drouin”).
Regarding Claim 1, Drouin teaches a magnetic sensing device (300; fig.3) configured to be integrated in a magnetic switch device [0047], the magnetic sensing device comprising: at least one tunnel magnetoresistive (TMR) element (304; fig.3) having a TMR resistance that varies with an external magnetic field ([0029]: a tunneling magnetoresistance (TMR) element, [0065]); said least one TMR element (304; fig.3) being coupled to a first power supply rail (302) providing a supply voltage (Vps) substantially independent of the external magnetic field [0065]; said least one TMR element (304; fig.3) being further coupled to a third terminal of a first transistor (306; fig.3), the first transistor (306; fig.3) being biased at a first terminal by a first bias voltage (via 310; [0067]; also note the use of a FET mentioned in [0039]); wherein, at a reference field strength of the external magnetic field, the TMR resistance has a TMR reference resistance value (implicit for the series connection of TMR 304 and transistor 306 as at a fixed/reference field strength of the external magnetic field, the TMR resistance has a TMR reference resistance value), and the first bias voltage is adjustable to control a first current at a second terminal of the first transistor at a first reference current value (variable current I1 in [0096] indicates that the a bias voltage is adjustable or variable to control a first current at a second terminal of the first transistor at a first reference/fixed current value I2. Thus, the limitation is implicitly taught in Fig.3 & [0096]); and wherein said at least one TMR element is configured such that, when the external magnetic field is varied around the reference field strength, the TMR resistance varies around the TMR reference resistance value by a resistance delta (this feature is implicit for the series connection of TMR and transistor in fig.3), such that the first current modulates (variable current I1) around the first reference current value by a current delta ([0096] and fig.3 implicitly teach the limitation).
Regarding Claim 2, Drouin teaches a magnetic switch device (Fig.5) configured to generate two distinct logic levels [0192] in response to a sensed magnetic field strength of an external magnetic field (implicit for the switch mentioned exemplarily in [0047]), the magnetic switch device comprising: at least one TMR element (506; fig.5) having a TMR resistance that varies with the external magnetic field [0087]; said least one TMR element being coupled to a first power supply rail (502) providing a supply voltage (Vps) substantially independent of the external magnetic field ([0087]-[0088]); said least one TMR element being further coupled to a third terminal of a first transistor, the first transistor being biased at a first terminal by a first bias voltage (via 504, [0088]); wherein, at a reference field strength of the external magnetic field, the TMR resistance has a TMR reference resistance value (implicit for the series connection of TMR 506 and transistor 508 as at a fixed/reference field strength of the external magnetic field, the TMR resistance has a TMR reference resistance value), and the first bias voltage is adjustable to control a first current at a second terminal of the first transistor at a first reference current value (variable current I1 in [0096] indicates that the a bias voltage is adjustable or variable to control a first current at a second terminal of the first transistor at a first reference/fixed current value I2. Thus, the limitation is implicitly taught in Fig.3 & [0096]); and wherein said at least one TMR element is configured such that, when the external magnetic field is varied around the reference field strength, the TMR resistance varies around the TMR reference resistance value by a resistance delta (this feature is implicit for the series connection of TMR and transistor in fig.3-5), such that the first current modulates (variable current I1) around the first reference current value by a current delta ([0096] and fig.3-5 implicitly teach the limitation); wherein the magnetic switch device further comprises a second transistor (510) biased at a first terminal of the second transistor by a second bias voltage (via 512), a second terminal of the second transistor being connected to the second terminal of the first transistor at a node (at 516); and wherein the second bias voltage is adjustable to control a second current (I2) at the second terminal of the second transistor such that the second current is substantially equal to the first reference current value of the first transistor [0096].
Regarding Claim 3, the magnetic switch device according to claim 2 is taught by Drouin.
Drouin further teaches wherein said at least one TMR element comprises a first TMR element (506), having a first TMR resistance (implicit in 506) and coupled to a third terminal of the first transistor (508) and to a first power supply rail (502) (shown in fig.5 that 502, 506 and 508 are in series); wherein, at a reference field strength of the external magnetic field, the first TMR resistance has a first TMR reference resistance value (this feature is implicit for the series connection of TMR 506 and transistor 508 in fig.5) wherein the first TMR element is configured such that, when the external magnetic field is varied around the reference field strength, the first TMR resistance varies around the first TMR reference resistance value by a resistance delta (variable current I1), such that the first current modulates around the first reference current value by a current delta ([0096] and fig.5 implicitly teach the limitation).
Regarding Claim 4, the magnetic switch device according to claim 2 is taught by Drouin.
Drouin further teaches wherein, when the external magnetic field is varied around the field strength reference value, an output voltage at the node is substantially equal to the first current delta multiplied by an equivalent output impedance at the node (Zload 518 in fig.5, [0103]).
Regarding Claim 5, the magnetic switch device according to claim 3 is taught by Drouin.
Drouin further teaches that said at least one TMR element further comprises a second TMR element (706 and 714; fig.7) connected to the second transistor (710); wherein the second TMR element has a second TMR resistance that varies with the external magnetic field (implicit function of 714); wherein, at the reference field strength of the external magnetic field, the second TMR resistance has a second TMR reference resistance value (implicit function of 714), and the second bias voltage is adjustable (due to variable current I2) to control the second current at the second terminal of the second transistor at a second reference current value [0142]; and wherein the second TMR element is configured such that, when the external magnetic field is varied around the reference field strength, the second TMR resistance varies around the second TMR reference resistance value by a second resistance delta, such that the second current is modulated (due to variable current I1 or I2) around the second reference current value by a current delta ([0126]-[0142]).
Allowable Subject Matter
Claims 6-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
With regard to Claim 6, the prior arts of the record do not teach or fairly suggest a magnetic switch device comprising, in combination with the other recited elements, wherein the first and second TMR elements are configured to be sensitive to the external magnetic field in opposite directions, such that, when the external magnetic field varies around the field strength reference value, the second TMR resistance is configured to vary around the second TMR reference resistance value by a second resistance delta having a polarity opposed to the one of the first resistance delta; and wherein an output voltage at the node is substantially equal to twice the value of the current delta multiplied by an equivalent output impedance at the node.
With regard to Claim 7, the prior arts of the record do not teach or fairly suggest a magnetic switch device comprising, in combination with the other recited elements, a first cascode transistor, connected to the first transistor and biased by a first cascode bias voltage; and a second cascode transistor, connected to the second transistor and biased by a second cascode bias voltage.
With regard to Claim 13, the prior arts of the record do not teach or fairly suggest a magnetic switch device comprising, in combination with the other recited elements, wherein said at least one TMR element comprises at least a magnetic tunnel junction including a reference layer having a fixed reference magnetization; a ferromagnetic sense layer having a free sense magnetization that is orientable relative to the fixed reference magnetization in the presence of an external magnetic field; and a tunnel barrier layer between the reference layer and the sense layer; and wherein the reference layer comprises a synthetic antiferromagnet structure.
Claims 8-12, 14-20 are allowed by virtue of their dependence from Claims 7 and 13.
Conclusion
The following prior arts made of record and not relied upon, are considered pertinent to applicant's disclosure:
Agrawal (US 2019/0207562 A1) teaches an apparatus to prevent supply-to-ground current in a comparator is disclosed. The apparatus includes circuitry to determine if first and second output nodes of the comparator have respectively reached first and second logic levels, and circuitry responsive to a determination that the voltage at the first and second output nodes of the comparator has reached the first and second logic levels, to generate a signal. In addition, the apparatus includes circuitry to supply the signal to a transistor, the signal to turn off the transistor and prevent the flow of supply-to-ground current through the comparator [Abstract].
Fruhauf et al. (5,291,139) teaches a circuit for the detection of a fuse with oxide vertical fusing has another fuse that is of the same type but cannot be blown and, in parallel with each of the fuses, a voltage reference circuit. The output of each of the voltage reference circuits is an input of a differential comparator. This differential comparator is preferably provided with a voltage reference circuit that is independent of the supply voltage Vcc [Abstract].
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUMAN NATH whose telephone number is (571)270-1443. The examiner can normally be reached on M to F 9:00 am to 5:00 pm.
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/SUMAN K NATH/Primary Examiner, Art Unit 2855