DETAILED ACTION
1. This action is in response to the amendment filed on 8/20/26.
Notice of Pre-AIA or AIA Status
2. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
3. Claims 1 and 11 are objected to because of the following informalities:
Claim 1 recites “generating first indication” should be replaced with “generating a first indication”.
Claim 11 recites “an first indication” should be replaced with “a first indication”.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
4. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
5. Claims 1-9 and 11-19 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. (US 11340644) in view of Gil et al. (US 20230205243) and Tyrrell (US 20250138563).
Regarding claim 11: Jung et al. discloses an apparatus (i.e. figures 1-2) comprising:
a multiplexer (MUX) (i.e. 151) configured to:
receive a plurality of voltages (i.e. from 131-133) respectively from a plurality of voltage regulators (i.e. 131-133); and select, based on a selection signal (i.e. CLK2), a selected voltage regulator (i.e. from 151 to 152) from the plurality of voltage regulators (i.e. from 131-133);
a voltage comparator (i.e. 152) configured to: sample an output of the selected voltage regulator (i.e. from 151 to 152) that is based on a source follower whose regulated voltage (i.e. regulated Vout from 131-133),
but does not specifically disclose a window voltage comparator configured to: sample an output of the selected voltage regulator that is based on a source follower whose regulated voltage is set by a reference voltage to generate a sampled output voltage; compare the sampled output voltage against a desired range; and generate an first indication in response to a result of comparing the sampled output voltage against the desired range; and a processor configured to perform operations, the operations comprising: determine an adjustment amount to the reference voltage based on the first indication and at least one second indication, the second indication generated in response to a previous comparison; and adjust the reference voltage based on the adjustment amount.
Gil et al. disclose a voltage regulator (i.e. figures 1-5) comprising:
a voltage comparator (i.e. 113) configured to:
sample (i.e. by 112) an output (i.e. Vout) of the voltage regulator (i.e. 111) that is based on a source follower whose regulated voltage (i.e. regulated Vout) is set by a reference voltage (i.e. from 118) to generate a sampled output voltage (i.e. Vout, Vfb);
compare the sampled output voltage (i.e. Vout, Vfb) against a desired range (i.e. range of Vtarget); and
generate an first indication (i.e. ERR_CODE, Bn) in response to a result of comparing the sampled output voltage (i.e. Vout, Vfb) against the desired range (i.e. range of Vtarget); and
a processor (i.e. 114, 118) configured to perform operations, the operations comprising:
determine an adjustment amount (i.e. from ERR_CODE) to the reference voltage (i.e. from 118) based on the first indication (i.e. ERR_CODE, Bn) and at least one second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43), the second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43) generated in response to a previous comparison (i.e. comparison by the comparator 113); and adjust the reference voltage (i.e. adjust by 118) based on the adjustment amount (i.e. from ERR_CODE) (i.e. ¶ 12-28).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Tyrrell disclose a low dropout regulator (i.e. figure 1A) comprising the voltage comparator is a window voltage comparator (i.e. 120).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Gil et al.’s invention with the regulator as disclose by Tyrrell to keep the switching operation and the dynamics of the LDO consistent, and the performance as expected and reduced the PSRR sensitivity of the output stage.
Regarding claim 12: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the desired range is bounded by a high operating voltage and a low operating voltage.
Gil et al. disclose (i.e. figures 1-5) wherein the desired range (i.e. range of Vtarget) is bounded by a high operating voltage and a low operating voltage (i.e. figure 2: high and low of voltage range Vtarget).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Regarding claim 13: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose to compare the sampled output voltage against the desired range, the window voltage comparator is configured to: determine whether the sampled output voltage is within the desired range; determine whether the sampled output voltage is higher than the desired range; or determine whether the sampled output voltage is lower than the desired range.
Gil et al. disclose (i.e. figures 1-5) wherein to compare the sampled output voltage against the desired range (i.e. range of Vtarget), the window voltage comparator (i.e. 113) is configured to: determine whether the sampled output voltage (i.e. Vout, Vfb) is within the desired range (i.e. range of Vtarget); determine whether the sampled output voltage (i.e. Vout, Vfb) is higher than the desired range; or determine whether the sampled output voltage (i.e. Vout, Vfb) is lower than the desired range (i.e. figure 2: high and low of voltage range Vtarget) (i.e. ¶ 12-28),
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Tyrrell disclose a low dropout regulator (i.e. figure 1A) comprising the voltage comparator is a window voltage comparator (i.e. 120).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Gil et al.’s invention with the regulator as disclose by Tyrrell to keep the switching operation and the dynamics of the LDO consistent, and the performance as expected and reduced the PSRR sensitivity of the output stage.
Regarding claim 14: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose to generate the first indication in response to a result of comparing the sampled output voltage against the desired range, the window voltage comparator is configured to: generate the first indication to keep the reference voltage in response to determining that the sampled output voltage is within the desired range; generate the first indication to decrease the reference voltage in response to determining that the sampled output voltage is higher than the desired range; or generate the first indication to increase the reference voltage in response to determining that the sampled output voltage is lower than the desired range.
Gil et al. disclose (i.e. figures 1-5) wherein to generate the indication (i.e. from 113) in response to a result of comparing the sampled output voltage (i.e. Vout, Vfb) against the desired range (i.e. range of Vtarget), the window voltage comparator is configured to: generate the first indication (i.e. from 113) to keep the reference voltage (i.e. from 118) in response to determining that the sampled output voltage (i.e. Vout, Vfb) is within the desired range (i.e. range of Vtarget); generate the first indication (i.e. from 113) to decrease the reference voltage (i.e. from 118) in response to determining that the sampled output voltage (i.e. Vout, Vfb) is higher than the desired range (i.e. range of Vtarget); or generate the first indication (i.e. from 113) to increase the reference voltage (i.e. from 118) in response to determining that the sampled output voltage (i.e. Vout, Vfb) is lower than the desired range (i.e. range of Vtarget) (i.e. see figure 2 and ¶ 12-28),
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Tyrrell disclose a low dropout regulator (i.e. figure 1A) comprising the voltage comparator is a window voltage comparator (i.e. 120).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Gil et al.’s invention with the regulator as disclose by Tyrrell to keep the switching operation and the dynamics of the LDO consistent, and the performance as expected and reduced the PSRR sensitivity of the output stage.
Regarding claim 15: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose to determine the adjustment amount to the reference voltage based on the first indication and the second indication, the processor is further configured to perform operations comprising: determine the adjustment amount to the reference voltage to maintain the output of the selected voltage regulator within the desired range.
Gil et al. disclose (i.e. figures 1-5) wherein (i.e. figures 1-5) wherein to determine the adjustment amount (i.e. from ERR_CODE) to the reference voltage based on the first indication (i.e. from 113) and the second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43), the processor is further configured to perform operations comprising: determine the adjustment amount (i.e. from ERR_CODE) to the reference voltage (i.e. from 118) to maintain the output (i.e. Vout) of the selected voltage regulator within the desired range (i.e. range of Vtarget) (i.e. ¶ 12-28).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Regarding claim 16: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the desired range is a desired voltage level.
Gil et al. disclose (i.e. figures 1-5) wherein the desired range (i.e. range of Vtarget) is a desired voltage level (i.e. ¶ 12-28).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Regarding claim 17: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the window voltage comparator is further configured to: repeatedly sample the output of the selected voltage regulator at a plurality of sampling instances to generate at least the first and second indications, compare the sampled output voltage against the desired range, and generate the indication in response to the result of the comparing, and wherein the processor is further configured to perform operations comprising: repeatedly determine an adjustment amount to the reference voltage based on the first and second indications indication and adjust the reference voltage based on the adjustment amount to maintain the output of the selected voltage regulator within the desired range.
Gil et al. disclose (i.e. figures 1-5) wherein the window voltage comparator is further configured to: repeatedly (i.e. function of 112, 113) sample the output (i.e. Vout) of the selected voltage regulator at a plurality of sampling instances (i.e. from 112) to generates at least the first (i.e. ERR_CODE, Bn) and second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43), compare the sampled output voltage (i.e. Vout, Vfb) against the desired range (i.e. range of Vtarget), and generate the indication (i.e. from 113) in response to the result of the comparing (i.e. function of 113), and wherein the processor (i.e. 114, 118) is further configured to perform operations comprising: repeatedly determine an adjustment amount (i.e. from ERR_CODE) to the reference voltage (i.e. from 118) based on the first (i.e. ERR_CODE, Bn) and second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43) and adjust the reference voltage (i.e. from 118) based on the adjustment amount (i.e. from ERR_CODE) to maintain the output of the selected voltage regulator within the desired range (i.e. ¶ 12-28),
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
but does not specifically disclose the voltage comparator is the window voltage comparator.
Tyrrell disclose a low dropout regulator (i.e. figure 1A) comprising the voltage comparator is a window voltage comparator (i.e. 120).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Gil et al.’s invention with the regulator as disclose by Tyrrell to keep the switching operation and the dynamics of the LDO consistent, and the performance as expected and reduced the PSRR sensitivity of the output stage.
Regarding claim 18: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose the adjustment amount to the reference voltage based on the first and second indications, the processor is further configured to perform operations comprising: determine the adjustment amount to the reference voltage based on the first and second indication generated in response to comparing a current sampled output voltage and one or more prior sampled output voltages against the desired range.
Gil et al. disclose (i.e. figures 1-5) (i.e. figures 1-5) wherein to determine the adjustment amount (i.e. from ERR_CODE) to the reference voltage (i.e. from 118) based on the first (i.e. ERR_CODE, Bn) and second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43), the processor (i.e. 114, 118) is further configured to perform operations comprising: determine the adjustment amount (i.e. from ERR_CODE) to the reference voltage (i.e. from 118) based on the first (i.e. ERR_CODE, Bn) and second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43) generated in response to comparing a current sampled output voltage (i.e. figure 2: Vfb, Vout during T4) and one or more prior sampled output voltages (i.e. figure 2: Vfb, Vout sample prior to T4) against the desired range (i.e. range of Vtarget) (i.e. ¶ 28-33).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Regarding claim 19: Jung et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose successive adjustment amounts are variable when the plurality of indications first and second indication indicate that the current sampled output voltage and the one or more prior sampled output voltages are all higher or lower than the desired range.
Gil et al. disclose (i.e. figures 1-5) (i.e. figures 1-5) wherein successive adjustment amounts (i.e. from ERR_CODE) are variable when the first (i.e. ERR_CODE, Bn) and second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43) that the current sampled output voltage (i.e. figure 2: Vfb, Vout during T4) and the one or more prior sampled output voltages (i.e. figure 2: Vfb, Vout sample prior to T4) are all higher or lower than the desired range (i.e. range of Vtarget) (i.e. ¶ 28-33).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Jung et al.’s invention with the regulator as disclose by Gil et al. to provide effective power and current densities can be kept within reliability limits with the described techniques.
Regarding claims 1-9: the method steps will be met during the normal operation of the apparatus described above. (Examiner notes: For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated).
6. Claims 10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Jung et al. (US 11340644) in view of Gil et al. (US 20230205243) and Tyrrell (US 20250138563) and further in view of Park (US 20170083033).
Regarding claim 20: Gil et al. disclose the limitation of the claim(s) as discussed above, but does not specifically disclose to adjust the reference voltage based on the adjustment amount, the processor is further configured to perform operations comprising: increment or decrement an up/down counter by the adjustment amount, wherein the up/down counter corresponds to a range of variation of the reference voltage.
Park et al. disclose a power supply (i.e. figures 1-4) comprising to adjust the reference voltage (i.e. Vref) based on the adjustment amount (i.e. from 114, 112), the processor is further configured to perform operations comprising: increment or decrement an up/down counter (i.e. counter of 112 and/or 1340, 340) by the adjustment amount, wherein the up/down counter corresponds to a range of variation of the reference voltage (i.e. Vref) (i.e. ¶ 24, 33, and 57).
Therefore, it would have been obvious to one with ordinary skill in the art before the earliest effective filing date to modify the circuit of Gil et al.’s invention with the power supply as disclose by Park et al. to operate at the MEP in a particular digital circuit makes that particular digital circuit more energy efficient.
Regarding claim 10: the method steps will be met during the normal operation of the apparatus described above. (Examiner notes: For method claims, note that under MPEP 2112.02, the principles of inherency, if a prior art device, in its normal and usual operation, would necessarily perform the method claimed, then the method claimed will be considered to be anticipated by the prior art device. When the prior art device is the same as a device described in the specification for carrying out the claimed method, it can be assumed the device will inherently perform the claimed process. In re King, 801 F.2d 1324, 231 USPQ 136 (Fed. Cir. 1986). Therefore, the previous rejections based on the apparatus will not be repeated).
Response to Arguments
7. Applicant's arguments filed 8/20/26 have been fully considered but they are not persuasive.
Applicant argues that “Applicant has amended claim 11 to recite a multiple indications used by the processor to perform operations, which is not described in either Jung, Gil, Tyrell. Claim 11 recites, in part: determine an adjustment amount to the reference voltage based on the first indication and at least one second indication, the second indication generated in response to a previous comparison”.
The Examiner disagrees because Gil et al. disclose a voltage regulator (i.e. figures 1-5, equivalent shows in parentheses) determine an adjustment amount (i.e. from ERR_CODE) to the reference voltage (i.e. from 118) based on the first indication (i.e. ERR_CODE, Bn) and at least one second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43), the second indication (i.e. ERR_CODE, B0 and/or the CTL_CODE from 114 ¶ 28, 33, 43) generated in response to a previous comparison (i.e. comparison by the comparator 113); and adjust the reference voltage (i.e. adjust by 118) based on the adjustment amount (i.e. from ERR_CODE) (i.e. ¶ 12-28).
Conclusion
8. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
9. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NGUYEN TRAN whose telephone number is (571)270-1269. The examiner can normally be reached Flex: M-F 8-7.
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/Nguyen Tran/Primary Examiner, Art Unit 2838
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