DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 5/13/2025 and 2/1/2024 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Claims 12-20 are directed to a process. Claims 1-11 are directed to a machine or an article of manufacture.
With respect to claim(s) 1 and 12:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
generate/generating a next program instruction using a search operation (Mental process – A person can generate (think of) a next program instruction by using a search operation (evaluation and/or judgment via thinking) – see MPEP § 2106.04(a)(2)(III))
(Claim 1) […] to generate the next program instruction […] (Mental process – A person can generate (think of) a next program instruction by using a search operation (evaluation and/or judgment via thinking) – see MPEP § 2106.04(a)(2)(III))
generate/generating a probability of the next program instruction based on processing the current program state and the next program instruction […] (Mathematical concepts – Generating (e.g., calculating) a probability involves mathematical calculations – see MPEP § 2106.04(a)(2)(I))
generate a value of the next program instruction based on processing the current program state, the next program instruction, and a set of alternative outcomes […] (Mental process – A person can generate (think of) a value based on various inputs via mind or by using pen and paper – see MPEP § 2106.04(a)(2)(III))
generate/generating an updated program state based on adding the next program instruction to the set of program instructions. (Mental process – A person can generate (think of) a next program instruction to be added to other program instructions in the mind or by using pen and paper – see MPEP § 2106.04(a)(2)(III))
If claim limitations, under their broadest reasonable interpretation, cover performance of the limitations as a mental process, but for the recitation of generic computer components, then the claim limitations fall within the mathematical or mental process grouping of abstract ideas. Accordingly, the claim “recites” an abstract idea.
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 1) A processing system comprising: one or more memories comprising processor-executable instructions; and one or more processors configured to execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
(Claim 12) A processor-implemented method of program generation, comprising: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
access/accessing a current program state comprising a set of program instructions; (Mere data gathering – Adding insignificant extra-solution activity of mere data gathering to the judicial exception – see § MPEP2106.05(g).)
(Claim 1) wherein […] the one or more processors are configured to execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
[…] using a machine learning model; (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim as a whole, looking at the additional elements individually and in combination, does not contain any other additional elements that are indicative of integration into a practical application, the claim is directed to an abstract idea.
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 1) A processing system comprising: one or more memories comprising processor-executable instructions; and one or more processors configured to execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
(Claim 12) A processor-implemented method of program generation, comprising: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
access/accessing a current program state comprising a set of program instructions; (Simply appending well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception (WURC)- see MPEP § 2106.05(d)(ll)(iv) - Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93.)
(Claim 1) wherein […] the one or more processors are configured to execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
[…] using a machine learning model; (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Considering the additional elements individually and in combination, and the claim as a whole, the additional elements do not provide significantly more than the abstract idea. Therefore, the claim is not patent eligible.
With respect to claim(s) 2 and 13:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
[…] to generate/generating the value of the next program instruction […] (Mental process – A person can generate (think of) a value based on various inputs via mind or by using pen and paper – see MPEP § 2106.04(a)(2)(III))
generate/generating, for each respective alternative outcome of the set of alternative outcomes, a respective intermediate value based on processing the current program state, the next program instruction, and the respective alternative outcome […] (Mental process – A person can generate (think of) a respective intermediate value based on various inputs via mind or by using pen and paper – see MPEP § 2106.04(a)(2)(III))
generate a mean intermediate value based on averaging the respective intermediate values for each respective alternative outcome of the set of alternative outcomes; (Mathematical concepts – Generating a mean intermediate value by averaging respective intermediate values involves mathematical calculations – see MPEP § 2106.04(a)(2)(I))
weight the mean intermediate value using the probability of the next program instruction to generate the value of the next program instruction. (Mathematical concepts – Weighting the mean intermediate value using a probability involves multiplying the mean intermediate value by the previously obtained probability – see MPEP § 2106.04(a)(2)(I))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 2) wherein […] the one or more processors are configured to execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
using the machine learning model; (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 2) wherein […] the one or more processors are configured to execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
using the machine learning model; (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 3 and 14:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
to generate the next program instruction, (Mental process – A person can generate (think of) a value based on various inputs via mind or by using pen and paper – see MPEP § 2106.04(a)(2)(III))
generate a respective value of each respective program instruction of the set of program instructions; and (Mental process – A person can generate (think of) a respective value via mind or by using pen and paper – see MPEP § 2106.04(a)(2)(III))
select the next program instruction in response to determining that the value of the next program instruction is greater than the respective values of each other program instruction of the set of program instructions. (Mental process – A person can mentally select/determine that a value is greater than other values – see MPEP § 2106.04(a)(2)(III))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 3) wherein to […] the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 3) wherein to […] the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to: (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 4 and 15:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
generate another next program instruction using the search operation; and (Mental process – A person can generate (think of) a next program instruction by using a search operation (evaluation and/or judgment via thinking) – see MPEP § 2106.04(a)(2)(III))
generate another updated program state based on adding the other next program instruction to the set of program instructions. (Mental process – A person can generate (think of) a next program instruction to be added to other program instructions in the mind or by using pen and paper – see MPEP § 2106.04(a)(2)(III))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 4) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 4) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 5 and 16:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
in response to determining that the updated program state satisfies a program description describing desired functionality of a computer program, […] (Mental process – A person can mentally determine that an updated program state satisfies a program description describing desired functionality of a program – see MPEP § 2106.04(a)(2)(III))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 5) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to, […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
[…] output/outputting the set of program instructions. (Adding insignificant extra-solution activity to the judicial exception – see § MPEP2106.05(g).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 5) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to, […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
[…] output/outputting the set of program instructions. (Simply appending well-understood, routine, conventional activities previously known to the industry, specified at a high level of generality, to the judicial exception (WURC)- see MPEP § 2106.05(d)(ll)(i) - Receiving or transmitting data over a network, e.g., using the Internet to gather data, Symantec, 838 F.3d at 1321, 120 USPQ2d at 1362 (utilizing an intermediary computer to forward information).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 6 and 17:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
[…] to generate the next program instruction, […] (Mental process – A person can generate (think of) a next program instruction by using a search operation (evaluation and/or judgment via thinking) – see MPEP § 2106.04(a)(2)(III))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 6) wherein […] the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
process/processing a problem description describing desired functionality of a computer program using the machine learning model. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 6) wherein […] the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
process/processing a problem description describing desired functionality of a computer program using the machine learning model. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 7 and 18:
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
wherein the problem description comprises a set of input values and a corresponding set of target output values for the computer program. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
wherein the problem description comprises a set of input values and a corresponding set of target output values for the computer program. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 8 and 19:
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 8) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
update/updating one or more parameters of the machine learning model based on the set of program instructions to generate an updated machine learning model. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 8) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
update/updating one or more parameters of the machine learning model based on the set of program instructions to generate an updated machine learning model. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 9 and 20:
2A Prong 1: The claim(s) recite(s) an abstract idea. Specifically:
[…] generate/generating another set of program instructions […] (Mental process – A person can generate (think of) another set of program instructions – see MPEP § 2106.04(a)(2)(III))
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
(Claim 9) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
[…] using the updated machine learning model. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
(Claim 9) wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
[…] using the updated machine learning model. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 10:
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
wherein the search operation comprises a Monte Carlo tree search (MCTS) operation. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
wherein the search operation comprises a Monte Carlo tree search (MCTS) operation. (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
With respect to claim(s) 11:
2A Prong 2: The additional elements recited in the claim(s) do not integrate the abstract idea into a practical application, individually or in combination.
Additional elements:
wherein the machine learning model comprises a large language model (LLM). (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
2B: The claim(s) do(es) not include additional elements that are sufficient to amount to significantly more than the judicial exception.
Additional elements:
wherein the machine learning model comprises a large language model (LLM). (Mere instructions to apply an abstract idea on a computer, or merely uses a computer as a tool to perform an abstract idea – see MPEP 2106.05(f).)
Since the claim does not recite additional elements that either integrate the judicial exception into a practical application, nor provide significantly more than the judicial exception, the claim is not patent eligible. Therefore, the claim is not patent eligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-5, 8-12, 14-16, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over MICHI (WO2024018065) in view of HAO ("Reasoning with Language Model is Planning with World Model") and FENG ("AlphaZero-Like Tree-Search Can Guide Large Language Model Decoding And Training"), hereafter MICHI, HAO, and FENG respectively.
Regarding Claim 1:
MICHI teaches:
A processing system comprising: one or more memories comprising processor-executable instructions; and one or more processors configured to execute the processor-executable instructions and cause the processing system to: (MICHI [page 1, lines 18-23] teaches: “This specification describes a system implemented as computer programs on one or more computers in one or more locations that optimizes a target algorithm for execution on a target processor. That is, the system determines an optimized algorithm that satisfies the specification of the target algorithm but can be executed on the target processor with reduced latency, i.e., relative to an existing implementation of the target algorithm for the target processor.” MICHI [page 2, lines 13-18] teaches: “The described system optimizes a target algorithm for execution on a target processor by representing the target algorithm as an assembly program in an assembly language that is specific to the particular architecture of the target processor. That is, the target processor has control unit(s), registers, arithmetic and logic unit(s), and memory constructed to enable the target processor to recognize and execute programming instructions defined by the assembly program.”)
access a current program state comprising a set of program instructions; (MICHI [page 7, lines 24-26] teaches: “That is, the system 100 starts with an empty buffer and then iteratively adds instructions to the buffer using the neural network 120 to build the candidate assembly program.” MICHI [page 8, lines 7-9] teaches: “For example, the state input can include instruction data representing the instructions (i.e., a current program state comprising a set of program instructions) that are currently in the candidate assembly program and location data representing the state of the memory and the registers of the target processor 110.” MICHI [page 9, lines 19-23] teaches: “The system generates a current state input specifying a current state of the candidate assembly program as of the time step (step 202). The system processes the current state input using a representation neural network that is configured to process the current state input to generate a state representation of the current state of the candidate assembly program (step 204).” Examiner’s note: Under BRI, access a current program state can be interpreted as processing the current state input, which must be accessed or read first prior to being processed.)
generate a next program instruction using a search operation, (MICHI [page 8, lines 21-25] teaches: “The system 100 can, for example, directly use the probability distribution generated by the neural network 120 to select the instruction to be added candidate assembly program or can perform a search of future states of the candidate assembly program using the representation neural network 120 and the policy neural network (and other components) and then select the instruction using the results of the search.” MICHI [page 9, lines 27-29] teaches: “For example, the system can perform a tree search using the state representation in order to select the assembly instruction to be added to the current candidate assembly program.” MICHI [page 17, lines 26-27] teaches: “The system performs, using the state representation and starting from the root node in the state tree, a look-ahead search through the state tree (step 404).” MICHI [page 18, last paragraph] teaches: “After performing the search, the system selects, based on the statistics for edges from the root node after the look-ahead search is performed, the instruction from the set of instructions (step 406).” Examiner’s note: Paragraph [0065] of the instant specification states: “In this way, rather than generating the program one instruction at a time (e.g., by selecting the "best" next instruction for each time step without any deliberation, planning ahead, or backtracking), as is done in conventional systems, the search system can evaluate a variety of potential future paths for each alternative next instruction in order to select the best sequence of instructions.” Accordingly, generate a next program instruction using a search operation can be interpreted as selecting a next program instruction using MICHI’s tree search by selecting the assembly instruction to be added to the current candidate assembly program by performing a tree search, as disclosed in MICHI [page 9, lines 27-29].)
wherein, to generate the next program instruction, the one or more processors are configured to execute the processor-executable instructions and cause the processing system to: generate a probability of the next program instruction based on processing the current program state […] using a machine learning model; (MICHI [page 1, lines 18-23] teaches: “This specification describes a system implemented as computer programs on one or more computers in one or more locations that optimizes a target algorithm for execution on a target processor. That is, the system determines an optimized algorithm that satisfies the specification of the target algorithm but can be executed on the target processor with reduced latency, i.e., relative to an existing implementation of the target algorithm for the target processor.” MICHI [page 9, lines 21-26] teaches: “The system processes the current state input using a representation neural network that is configured to process the current state input to generate a state representation of the current state of the candidate assembly program (step 204). The system then selects an assembly instruction from the set of assembly instructions in the assembly programming language using the state representation of the current state of the candidate assembly program (step 206).” MICHI [page 10, lines 1-8] teaches: “The policy neural network is a neural network, e.g., a feed-forward neural network (i.e., using a machine learning model), that is configured to receive a state representation and to process the state representation (i.e., based on processing the current state program) to generate a probability distribution over the set of assembly instructions (i.e., generate a probability of the next program instruction). The dynamics neural network is a neural network, e.g., a feed-forward neural network, that is configured to receive a state representation and data identifying an assembly instruction and to generate a predicted next state representation that represents the state of the program if the identified instruction is added to the program when the program is in the state represented by the input state representation.” MICHI [page 11, lines 3-5] teaches: “The system can then select the instruction to be added to the assembly program using the probability distribution, e.g., by selecting the instruction with the highest probability or by sampling from the distribution using an appropriate sampling technique.”)
generate a value of the […] program instruction […] based on processing the current program state, […] using the machine learning model; (MICHI [page 10, lines 9-12] teaches: “In some implementations, the system uses two value neural networks (i.e., using the machine learning model): a latency neural network that predicts a latency return for the program given the current state and a correctness neural network that predicts a correctness return (i.e., generate a value) for the program (i.e., of the […] program instruction) given the current state (i.e., based on processing the current program state).”)
generate an updated program state based on adding the next program instruction to the set of program instructions. (MICHI [page 7, lines 21-26] teaches: “Generally, the system 100 generates a candidate assembly program by adding a respective assembly instruction to the candidate assembly program at each of a plurality of time steps using the neural network 120.That is, the system 100 starts with an empty buffer and then iteratively adds instructions to the buffer using the neural network 120 to build the candidate assembly program.” Examiner’s note: Under BRI, generate an updated program state can be interpreted as generating a candidate assembly program by adding respective assembly instructions to the candidate assembly program at each of a plurality of time steps using the neural network 120.)
MICHI is not relied upon for teaching, but HAO teaches: generate a probability of the next program instruction based on processing the current program state and the next program instruction using a machine learning model; (HAO [page 4, section 3.2 Reward Design] teaches: “Likelihood of the action. When an action is generated by the LLM conditioning on the in-context demonstration and the current state, the probability of the specific action reflects the LLM’s preference. We thus can incorporate the log probability of the action as a reward. This reward reflects the “instinct” of LLMs as an agent, and can be also used as a prior for which action to explore.” HAO [page 6, section 4 Experiments] teaches: “First, we prompt the LLM (i.e., using a machine learning model) with some example test cases along with their solutions, and then calculate the log probability of the action given the current state (i.e., based on processing the current program state and the next program instruction) (“Likelihood of action” reward in Section 3.2), denoted as
r
1
.”)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of MICHI and HAO before them, to include HAO’s likelihood of action reward computation in MICHI’s optimization algorithm. One would have been motivated to make such a combination in order to repurpose an LLM to act as both a world model and a reasoning agent, to enable the LLM to simulate states of the world and anticipate action outcomes, and achieve an effective balance between exploration and exploitation via Monte Carlo Tree Search (HAO [page 9, section 6 Conclusion]).
MICHI is not relied upon for teaching, but FENG teaches: generate a value of the next program instruction based on processing […] the next program instruction, and a set of alternative outcomes using the […] model; (FENG [pages 14-15, Appendix C Background of Monte Carlo Tree-Search Algorithms] teaches: “Once we build the tree, we can use various search algorithms to find a high-reward trace. However, it’s not easy to balance between exploration and exploitation during the search process, especially when the tree is sufficiently deep. Therefore we adopt Monte Carlo Tree Search(MCTS) (i.e., using the […] model) variants as choices for strategic and principled search. […]
N
(
s
,
a
)
is the visit count of selecting action
a
at node
s
[…].” FENG [page 15, Expand and evaluate] teaches: “After encountering a leaf node
s
L
by select, if
s
L
is not a terminal node, it will be expanded by the language model policy. The state of the leaf node is evaluated by the value network, noted as
v
s
L
.” FENG [page 15, Backup] teaches: “After expand and evaluate on a leaf node, backward the statistics through the path
s
L
,
s
L
-
1
,
…
,
s
0
, for each node, increase the visit count by
N
(
s
t
,
a
t
)
=
N
(
s
t
,
a
t
)
+
1
, and the total action-value are updated as
W
(
s
t
,
a
t
)
=
W
(
s
t
,
a
t
)
+
v
(
s
L
)
, the mean action-value are updated as
Q
(
s
t
,
a
t
)
=
W
(
s
t
,
a
t
)
/
N
(
s
t
,
a
t
)
.” Examiner’s note: Under BRI, a set of alternative outcomes can be interpreted as the leaf values
v
s
L
accumulated into the total action-value
W
(
s
t
,
a
t
)
over the simulations that selected action
a
t
, and generate a value of the next program instruction based on processing […] the next program instruction, and a set of alternative outcomes using the […] model can be interpreted as computing the mean action-value
Q
s
t
,
a
t
for the action
a
t
.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of MICHI, HAO, and FENG before them, to include FENG’s backup operation that maintains visit counts and total and mean action-values from the neural network evaluations in MICHI and HAO’s optimization algorithm. One would have been motivated to make such a combination in order to obtain a search control strategy that initially prefers actions with high prior probability and low visit count, but asymptotically prefers actions with high action-value (FENG [page 15, Appendix C Background of Monte Carlo Tree-Search Algorithms]).
Regarding Claim 3:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. MICHI further teaches:
wherein to generate the next program instruction, the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to: generate a respective value of each respective program instruction of the set of program instructions; (MICHI [page 1, lines 18-23] teaches: “This specification describes a system implemented as computer programs on one or more computers in one or more locations that optimizes a target algorithm for execution on a target processor. That is, the system determines an optimized algorithm that satisfies the specification of the target algorithm but can be executed on the target processor with reduced latency, i.e., relative to an existing implementation of the target algorithm for the target processor.” MICHI [page 9, lines 21-26] teaches: “The system processes the current state input using a representation neural network that is configured to process the current state input to generate a state representation of the current state of the candidate assembly program (step 204). The system then selects an assembly instruction from the set of assembly instructions in the assembly programming language using the state representation of the current state of the candidate assembly program (step 206).” MICHI [page 10, lines 1-8] teaches: “The policy neural network is a neural network, e.g., a feed-forward neural network, that is configured to receive a state representation and to process the state representation to generate a probability distribution over the set of assembly instructions (i.e., generate a respective value of each respective instruction of the set of program instructions). The dynamics neural network is a neural network, e.g., a feed-forward neural network, that is configured to receive a state representation and data identifying an assembly instruction and to generate a predicted next state representation that represents the state of the program if the identified instruction is added to the program when the program is in the state represented by the input state representation.” Examiner’s note: Under BRI, a respective value of each respective program instruction of the set of program instructions can be interpreted as each instruction in the set of assembly instructions. Further, generate a respective value can be interpreted as the probability assigned to each instruction on the set of assembly instructions when generating a probability distribution.)
select the next program instruction in response to determining that the value of the next program instruction is greater than the respective values of each other program instruction of the set of program instructions. (MICHI [page 11, lines 3-5] teaches: “The system can then select the instruction (i.e., select the next program instruction) to be added to the assembly program using the probability distribution, e.g., by selecting the instruction with the highest probability (i.e., in response to determining that the value of the next program instruction is greater than the respective values of each other program instruction of the set of program instructions) or by sampling from the distribution using an appropriate sampling technique.”)
Regarding Claim 4:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. MICHI further teaches:
wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to generate another next program instruction using the search operation; (MICHI [page 1, lines 18-23] teaches: “This specification describes a system implemented as computer programs on one or more computers in one or more locations that optimizes a target algorithm for execution on a target processor. That is, the system determines an optimized algorithm that satisfies the specification of the target algorithm but can be executed on the target processor with reduced latency, i.e., relative to an existing implementation of the target algorithm for the target processor.” MICHI [page 9, lines 11-18] teaches: “In particular, as described above the system generates a candidate assembly program by adding a respective assembly instruction to the candidate assembly program at each of a plurality of time steps using the neural network. At each of the plurality of time steps (i.e., generate another next program instruction), the system can perform steps 202-208 to add a respective assembly instruction to the candidate assembly program. For example, the system can continue performing iterations of steps 202-208 until termination criteria are satisfied, e.g., until the candidate assembly program satisfies the specification of the target algorithm or until a maximum number of instructions are included in the candidate assembly program.” Examiner’s note: Each new iteration of steps 202-208 generates a new respective assembly instruction to be added to the assembly program using tree search disclosed in MICHI [page 9, lines 27-32]).)
generate another updated program state based on adding the other next program instruction to the set of program instructions. (MICHI [page 7, lines 24-26] teaches: “That is, the system 100 starts with an empty buffer (i.e., generate another updated program state based on adding the other next program instruction to the set of program instructions) and then iteratively adds instructions to the buffer using the neural network 120 to build the candidate assembly program.”)
Regarding Claim 5:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. MICHI further teaches:
wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to, in response to determining that the updated program state satisfies a program description describing desired functionality of a computer program, output the set of program instructions. (MICHI [page 1, lines 18-23] teaches: “This specification describes a system implemented as computer programs on one or more computers in one or more locations that optimizes a target algorithm for execution on a target processor. That is, the system determines an optimized algorithm that satisfies the specification of the target algorithm but can be executed on the target processor with reduced latency, i.e., relative to an existing implementation of the target algorithm for the target processor.” MICHI [page 9, lines 15-18] teaches: “For example, the system can continue performing iterations of steps 202-208 until termination criteria are satisfied, e.g., until the candidate assembly program satisfies the specification of the target algorithm (i.e., in response to determining that the updated program state satisfies a program description) or until a maximum number of instructions are included in the candidate assembly program.” MICHI [page 11, lines 13-15] teaches: “The correctness measure measures whether the candidate assembly program as of the time step, when executed on the target processor, generates outputs that match outputs generated by the target algorithm (i.e., a program description describing a desired functionality of a computer program).” MICHI [page 4, lines 13-17] teaches: “In particular, the system 100 receives data specifying a target algorithm 102 and generates as output an optimized assembly program 150 (i.e., output the set of program instructions) that represents an optimized version of the target algorithm 102, i.e., that satisfies the specifications of the target algorithm 102 while having a reduced latency compared to other programs that also satisfy the specification of the target algorithm 102.”)
Regarding Claim 8:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. MICHI further teaches:
wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to update one or more parameters of the machine learning model based on the set of program instructions to generate an updated machine learning model. (MICHI [page 6, lines 23-27] teaches: “In particular, the system 100 repeatedly generates candidate assembly programs using the neural network 120 and uses the generated candidate assembly programs (i.e., based on the set of program instructions) to generate training data for training the neural network 120. The system 100 then intermittently trains the neural network 120 (i.e., update one or more parameters of the machine learning model) on the training data, so that the candidate assembly programs generated using the neural network 120 become more efficient as training progresses (i.e., to generate an updated machine learning model).” MICHI [pages 12-13] teaches: “The system can use the correctness measure(s) for the time step(s) and the latency measure for the program to generate training data for training the representation neural network and other components of the neural network, e.g., the policy neural network and, when included, the dynamics neural network, the one or more value neural networks, or both.”)
Regarding Claim 9:
MICHI in view of HAO and FENG teaches the elements of claim 8 as outlined above. MICHI further teaches:
wherein the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to generate another set of program instructions using the updated machine learning model. (MICHI [page 14, lines 3-6] teaches: “Alternatively, after training has been completed, the system can generate a new assembly program (i.e., generate another set of program instructions) using the trained neural network (i.e., using the updated machine learning model), i.e., by adding assembly instructions to the assembly program using the trained neural network as described above, and then select the new assembly program as the optimized assembly program.”)
Regarding Claim 10:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. MICHI further teaches:
wherein the search operation comprises a Monte Carlo tree search (MCTS) operation. (MICHI [page 17, lines 28-30] teaches: “For example, the system can perform a Monte Carlo Tree Search (MCTS) by, at each of multiple search iterations, traversing the state tree until a leaf node is reached. Once a leaf node is reached, the system can expand the leaf node and then terminate the search iteration.”)
Regarding Claim 11:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. HAO further teaches:
wherein the machine learning model comprises a large language model (LLM). (HAO [page 4, Likelihood of the action] teaches: “When an action is generated by the LLM conditioning on the in-context demonstration and the current state, the probability of the specific action reflects the LLM’s preference.”)
Regarding Claim 12:
The claim recites similar limitations as corresponding claim 1 and is rejected for similar reasons as claim 1 using similar teachings and rationale. MICHI further teaches:
A processor-implemented method of program generation, comprising: (MICHI [page 1-2] teaches: “In one aspect, a method includes receiving data specifying a target algorithm to be optimized for execution on a target processor, e.g., a target processor that has a particular architecture, and generating an assembly program that represents an optimized version of the target algorithm that is optimized for execution on target processor, e.g., on the particular architecture of the target processor. The assembly program includes a plurality of assembly instructions in an assembly programming language for the target processor and the generating includes repeatedly performing operations that include generating a candidate assembly program by adding a respective assembly instruction to the candidate assembly program at each of a plurality of time steps, including, at each of the plurality of time steps: generating a current state input specifying a current state of the candidate assembly program as of the time step, processing the current state input using a representation neural network that is configured to process the current state input to generate a state representation of the current state of the candidate assembly program; and selecting an assembly instruction from a set of assembly instructions in the assembly programming language using the state representation of the current state of the candidate assembly program; determining, for each of one or more of the time steps, a correctness measure for the candidate assembly program as of the time step that measures whether the candidate assembly program as of the time step, when executed on the target processor, generates outputs that match outputs generated by the target algorithm; and determining a latency measure that measures a latency of the candidate assembly program when executed on the target processor.”)
Regarding Claim 14:
MICHI in view of HAO and FENG teaches the elements of claim 12 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 3 and is rejected for similar reasons as claim 3 using similar teachings and rationale.
Regarding Claim 15:
MICHI in view of HAO and FENG teaches the elements of claim 12 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 4 and is rejected for similar reasons as claim 4 using similar teachings and rationale.
Regarding Claim 16:
MICHI in view of HAO and FENG teaches the elements of claim 12 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 5 and is rejected for similar reasons as claim 5 using similar teachings and rationale.
Regarding Claim 19:
MICHI in view of HAO and FENG teaches the elements of claim 12 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 8 and is rejected for similar reasons as claim 8 using similar teachings and rationale.
Regarding Claim 20:
MICHI in view of HAO and FENG teaches the elements of claim 19 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 9 and is rejected for similar reasons as claim 9 using similar teachings and rationale.
Claims 2 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over MICHI in view of HAO and FENG as applied respectively above to claims 1 and 12, and further in view of KUMAR ("Reward-Conditioned Policies") and NI ("LEVER: Learning to Verify Language-to-Code Generation with Execution"), hereafter KUMAR and NI respectively.
Regarding Claim 2:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. MICHI further teaches:
wherein to generate the value of the next program instruction, the one or more processors are configured to execute the processor-executable instructions and cause the processing system to: (MICHI [page 1, lines 18-23] teaches: “This specification describes a system implemented as computer programs on one or more computers in one or more locations that optimizes a target algorithm for execution on a target processor. That is, the system determines an optimized algorithm that satisfies the specification of the target algorithm but can be executed on the target processor with reduced latency, i.e., relative to an existing implementation of the target algorithm for the target processor.” MICHI [page 10, lines 9-12] teaches: “In some implementations, the system uses two value neural networks: a latency neural network that predicts a latency return for the program given the current state and a correctness neural network that predicts a correctness return (i.e., generate the value) for the program (i.e., of the next program instruction) given the current state.”)
FENG further teaches: […] generate a mean intermediate value based on averaging the respective intermediate values for each respective alternative outcome of the set of alternative outcomes; (FENG [page 15, Backup] teaches: “After expand and evaluate on a leaf node, backward the statistics through the path
s
L
,
s
L
-
1
,
…
,
s
0
, for each node, increase the visit count by
N
(
s
t
,
a
t
)
=
N
(
s
t
,
a
t
)
+
1
, and the total action-value are updated as
W
(
s
t
,
a
t
)
=
W
(
s
t
,
a
t
)
+
v
(
s
L
)
, the mean action-value are updated as
Q
(
s
t
,
a
t
)
=
W
(
s
t
,
a
t
)
/
N
(
s
t
,
a
t
)
.” Examiner’s note: Under BRI, generate a mean intermediate value can be interpreted as computing
Q
(
s
t
,
a
t
)
, which is based on averaging the accumulated total-action value (i.e., based on averaging the respective intermediate values for each respective alternative outcome of the set of alternative outcomes).)
MICHI in view of HAO and FENG is not relied upon for teaching, but KUMAR teaches: generate, for each respective alternative outcome of the set of alternative outcomes, a respective intermediate value based on processing the current program state, the next program instruction, and the respective alternative outcome using the machine learning model; (KUMAR [page 3, section 4 Reward-conditioned Policies] teaches: “The basic idea behind our approach is simple: we alternate between a training a policy of the form
π
θ
a
t
s
t
,
Z
with supervised learning on all data collected so far, where
Z
is an estimate of the return for the trajectory containing the tuple
s
t
,
a
t
, and using the latest policy to collect more data.” KUMAR [page 4, section 4.2 Implementation and Architecture Details] teaches: “We model the policy
π
θ
a
t
s
t
,
Z
as a three-layer fully-connected deep neural network (i.e., using the machine learning model) that takes
s
(i.e., based on processing the current program state) and
Z
(i.e., the respective alternative outcome) as inputs and outputs a Gaussian distribution (i.e., generate, for each respective alternative outcome of the set of alternative outcomes, a respective intermediate value) over actions (i.e., the next program instruction).” Examiner’s note: Under BRI, a respective intermediate value can be interpreted as the probability assigned to action
a
t
by the Gaussian distribution.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of MICHI, HAO, FENG, and KUMAR before them, to include KUMAR’s reward-conditioned policies in MICHI, HAO, and FENG’s optimization algorithm. One would have been motivated to make such a combination in order to train a single model to simultaneously represent policies for all possible reward values, and generalize to larger reward values (KUMAR [page 9, section 6 Discussion and Future Work]).
MICHI in view of HAO, FENG, and KUMAR is not relied upon for teaching, but NI teaches: weight the mean intermediate value using the probability of the next program instruction to generate the value of the next program instruction. (NI [page 3, Verification with Execution] teaches: “Given an input
x
and a candidate program
y
^
∈
S
(i.e., next program instruction), we obtain the reranking probability as the joint probability of generation and passing the verification:
P
R
y
^
,
v
=
1
|
x
=
P
L
M
y
^
x
⋅
P
θ
v
=
1
|
x
,
y
^
,
E
y
^
3
.
"
Examiner’s note: Under BRI, the mean intermediate value can be interpreted as the reranker, which is based on a representation of the execution results
E
y
^
of the candidate program, and the probability of the next program instruction can be interpreted as
P
L
M
y
^
x
, which is the probability of the candidate program. Additionally, to generate the value of the next program instruction can be interpreted as computing
P
R
y
^
,
v
=
1
|
x
.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of MICHI, HAO, FENG, KUMAR, and NI before them, to include NI’s reranker in MICHI, HAO, FENG, and KUMAR’s optimization algorithm. One would have been motivated to make such a combination in order to improve language-to-code generation by learning to verify the generated programs with their execution results (NI [page 1, Abstract]).
Regarding Claim 13:
MICHI in view of HAO and FENG teaches the elements of claim 12 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 2 and is rejected for similar reasons as claim 2 using similar teachings and rationale.
Claims 6-7 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over MICHI in view of HAO and FENG as applied respectively above to claims 1 and 12, and further in view of LE ("CodeRL: Mastering Code Generation through Pretrained Models and Deep Reinforcement Learning"), hereafter LE.
Regarding Claim 6:
MICHI in view of HAO and FENG teaches the elements of claim 1 as outlined above. MICHI further teaches:
to generate the next program instruction, the one or more processors are configured to further execute the processor-executable instructions and cause the processing system to […] (MICHI [page 1, lines 18-23] teaches: “This specification describes a system implemented as computer programs on one or more computers in one or more locations that optimizes a target algorithm for execution on a target processor. That is, the system determines an optimized algorithm that satisfies the specification of the target algorithm but can be executed on the target processor with reduced latency, i.e., relative to an existing implementation of the target algorithm for the target processor.”)
MICHI in view of HAO and FENG is not relied upon for teaching, but LE teaches: “[…] process a problem description describing desired functionality of a computer program using the machine learning model. (LE [page 4, section 3.1 Program Synthesis Task] teaches: “Following a sequence-to-sequence approach, the program synthesis task contains a problem description as an input sequence
D
(i.e., a problem description) and an output sequence of program
W
^
=
w
^
1
,
…
,
w
^
T
,
w
^
t
∈
V
that can solve the problem. […] During test time, models generate sequences of programs by autoregressively sampling token
w
^
t
from the distribution
p
_
θ
.
|
w
^
1
:
t
-
1
,
D
(i.e., process a problem description). Models are evaluated against unit tests corresponding to the problem. Each test includes a pair of input and ground-truth output. In real-world program synthesis tasks [Hendrycks et al., 2021], example unit tests are often given as parts of the problem specification.” LE [page 2, Figure 1] teaches: “An example program synthesis task (Right): Each task is defined by a problem specification in natural language, often containing example input and output pairs (i.e., a problem description describing desired functionality of a computer program). The expected output is a program to be checked for functional correctness against some unit tests.” Examiner’s note: Under BRI, a problem description can be interpreted as LE’s task containing the problem description
D
and the input and output pairs.)
Accordingly, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of MICHI, HAO, FENG, and LE before them, to include LE’s inputs
D
and
W
^
in MICHI, HAO, and FENG’s optimization algorithm. One would have been motivated to make such a combination in order to obtain an output sequence of a program that can solve a given problem (LE [page 4, section 3.1 Program Synthesis Task]).
Regarding Claim 7:
MICHI in view of HAO, FENG, and LE teaches the elements of claim 6 as outlined above. LE further teaches:
wherein the problem description comprises a set of input values and a corresponding set of target output values for the computer program. (LE [page 4, section 3.1 Program Synthesis Task] teaches: “Following a sequence-to-sequence approach, the program synthesis task contains a problem description as an input sequence
D
(i.e., the problem description) and an output sequence of program
W
^
=
w
^
1
,
…
,
w
^
T
,
w
^
t
∈
V
that can solve the problem. […] During test time, models generate sequences of programs by autoregressively sampling token
w
^
t
from the distribution
p
_
θ
.
|
w
^
1
:
t
-
1
,
D
. Models are evaluated against unit tests corresponding to the problem. Each test includes a pair of input and ground-truth output. In real-world program synthesis tasks [Hendrycks et al., 2021], example unit tests are often given as parts of the problem specification.” LE [page 2, Figure 1] teaches: “An example program synthesis task (Right): Each task is defined by a problem specification in natural language, often containing example input and output pairs (i.e., comprises a set of input values and a corresponding set of target output values for the computer program). The expected output is a program to be checked for functional correctness against some unit tests.”)
Regarding Claim 17:
MICHI in view of HAO and FENG teaches the elements of claim 12 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 6 and is rejected for similar reasons as claim 6 using similar teachings and rationale.
Regarding Claim 18:
MICHI in view of HAO, FENG, and LE teaches the elements of claim 17 as outlined above. Additionally, the claim recites similar limitations as corresponding claim 7 and is rejected for similar reasons as claim 7 using similar teachings and rationale.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Alvaro S Laham Bauzo whose telephone number is (571)272-5650. The examiner can normally be reached Mon-Fri 7:30 AM - 11:00 AM | 1:00 PM - 5:30 PM ET.
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/A.S.L./Examiner, Art Unit 2146
/USMAAN SAEED/Supervisory Patent Examiner, Art Unit 2146
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