Prosecution Insights
Last updated: April 19, 2026
Application No. 18/429,908

TEMPERATURE SENSOR

Non-Final OA §103
Filed
Feb 01, 2024
Examiner
LIN, ERICA S Y
Art Unit
2853
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohm Co. Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
88%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
889 granted / 1037 resolved
+17.7% vs TC avg
Minimal +2% lift
Without
With
+2.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
38 currently pending
Career history
1075
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
46.8%
+6.8% vs TC avg
§102
29.4%
-10.6% vs TC avg
§112
18.4%
-21.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1037 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-12 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Pub. 2019/0310140 (“Mori”) in view of U.S. Patent Pub. 2023/0008041 (“Liu”). Claim 1 Mori discloses a temperature sensor, comprising: a temperature detection diode, disposed at a position having a target temperature (paragraph [0056], diode Dt); a current supply circuit (current mirror circuit 11a), configured to supply a first evaluation current and a second evaluation current to the temperature detection diode in a forward direction of the temperature detection diode at different timings (currents through 11a1 and 11a2); an amplifying circuit, configured to generate a first amplified voltage by amplifying a difference between a forward voltage of the temperature detection diode and a reference voltage during a supply period of a first evaluation current to the temperature detection diode, and generate a second amplified voltage by amplifying the difference between the forward voltage of the temperature detection diode and the reference voltage during a supply period of the second evaluation current to the temperature detection diode (paragraphs [0063-0069], amplifier 15); a temperature detection circuit, configured to detect the target temperature based on the first amplified voltage and the second amplified voltage (threshold correction 14 and alarm detection 13). Mori discloses a reference voltage but does not appear to explicitly disclose a reference voltage generation circuit, configured to include a reference diode disposed at a position having a temperature corresponding to the target temperature, and generate the reference voltage using a forward voltage of the reference diode when a reference current is supplied in a forward direction of the reference diode. Liu discloses a reference voltage generator circuit with reference diode (paragraph [0062]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have incorporated a reference voltage generator circuit with reference diode, as disclosed by Liu, into the device of Mori, such that a reference voltage generation circuit, configured to include a reference diode disposed at a position having a temperature corresponding to the target temperature, and generate the reference voltage using a forward voltage of the reference diode when a reference current is supplied in a forward direction of the reference diode, for the purpose of providing a supply voltage accounting for temperature variations (Liu, paragraph [0062]). Claim 2 Mori in view of Liu discloses the temperature sensor of Claim 1, wherein the first evaluation current and the second evaluation current have current values different from each other, and the temperature detection circuit is configured to detect the target temperature based on a difference between the first amplified voltage and the second amplified voltage (Mori, Fig. 3, paragraph [0058]). Claim 3 Mori in view of Liu discloses the temperature sensor of Claim 2, wherein the temperature detection circuit includes: an AD converter, configured to receive the first amplified voltage and the second amplified voltage from the amplifying circuit as input analog voltages, and convert the first amplified voltage and the second amplified voltage into a first digital signal and a second digital signal, respectively; and an arithmetic circuit, configured to detect the target temperature based on a difference between the first digital signal and the second digital signal (Mori, Fig. 3, paragraph [0062], comparator 12 with alarm detection circuit 13). Claim 4 Mori in view of Liu discloses the temperature sensor of Claim 1, wherein the current supply circuit is configured to supply a current having same current value as the second evaluation current to the reference diode as the reference current (Mori, Fig. 2, paragraph [0044-0047], ideal value current equal). Claim 5 Mori in view of Liu discloses the temperature sensor of Claim 2, wherein the current supply circuit is configured to supply a current having same current value as the second evaluation current to the reference diode as the reference current (Mori, Fig. 2, paragraph [0044-0047], ideal value current equal). Claim 6 Mori in view of Liu discloses the temperature sensor of Claim 3, wherein the current supply circuit is configured to supply a current having same current value as the second evaluation current to the reference diode as the reference current (Mori, Fig. 2, paragraph [0044-0047], ideal value current equal). Claim 7 Mori in view of Liu discloses the temperature sensor of Claim 1, wherein the temperature detection circuit is configured to generate a temperature detection signal indicating a detection result of the target temperature (Mori, paragraph [0062]). Claim 8 Mori in view of Liu discloses the temperature sensor of Claim 2, wherein the temperature detection circuit is configured to generate a temperature detection signal indicating a detection result of the target temperature (Mori, paragraph [0062]). Claim 9 Mori in view of Liu discloses the temperature sensor of Claim 3, wherein the temperature detection circuit is configured to generate a temperature detection signal indicating a detection result of the target temperature (Mori, paragraph [0062]). Claim 10 Mori in view of Liu discloses the temperature sensor of Claim 1, wherein each of the temperature detection diode and the reference diode is formed by a bipolar transistor having a collector and a base connected to the collector (Mori, paragraphs [0003, 0030], IBGT). Claim 11 Mori in view of Liu discloses the temperature sensor of Claim 2, wherein each of the temperature detection diode and the reference diode is formed by a bipolar transistor having a collector and a base connected to the collector (Mori, paragraphs [0003, 0030], IBGT). Claim 12 Mori in view of Liu discloses the temperature sensor of Claim 3, wherein each of the temperature detection diode and the reference diode is formed by a bipolar transistor having a collector and a base connected to the collector (Mori, paragraphs [0003, 0030], IBGT). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERICA S Y LIN whose telephone number is (571)270-7911. The examiner can normally be reached M-F 8-4, TW M,W. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Douglas X Rodriguez can be reached at (571) 431-0716. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERICA S LIN/Primary Examiner, Art Unit 2853
Read full office action

Prosecution Timeline

Feb 01, 2024
Application Filed
Feb 21, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
88%
With Interview (+2.4%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1037 resolved cases by this examiner. Grant probability derived from career allow rate.

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