DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/17/2025 has been entered.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-3, 8-9, 12-16, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215).
Regarding Claim 1, Choi discloses an integrated circuit (integrated current measuring apparatus 1 with PCB 10, Figures 2-10, Abstract) comprising:
at least one magnetic sensor (comprising Hall sensor 30, Figures 2-6, 8-9, Paragraph 39) for measuring a magnetic field induced by a first current of at least 125 Amps at a distance of 10 mm or less (Figures 2-9, 1 with battery pack 100, Figure 10, Paragraphs 5-6, “….a lithium secondary battery pack which currently attracts much attention as an energy storage system (ESS) of an electric vehicle uses a high charge/discharge current of about 100 A to about 300 A and, when a current sensor of the battery pack for the electric vehicle…”);
a shunt interface for sensing a voltage over a shunt resistor (comprising voltage measuring nodes 13a, 13b for measuring voltage over shunt resistor 20 Figures 3-6,9), said voltage indicative of a second current (Paragraphs 48-49);
one or both of a digital communication interface and an output port (comprising terminals 23, 25, Figures 3-4,6,9, output port of 1 coupled to load 200, Figure 10, Paragraphs 48-49);
a controller configured for transmitting one or more values of said first current and said second current over one or both of said digital communication interface and said output port (Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values, a processor, an application-specific integrated circuit (ASIC), another chipset, a logic circuit, an amplifier, a comparator, a register, a communication modem, a data processor, etc.., which are well known in the art”, Paragraph 78, “…In addition to the integrated current-measuring apparatus 1, the battery pack 100 according to the present disclosure may further include …… various devices configured to control charge/discharge of the battery module, e.g., a BMS, a relay, and a fuse”),
wherein the integrated circuit is provided as a single packaged device (integrated current sensing apparatus 1, Figure 10).
Choi does not specifically show in Figures the disclosed controller and the digital communication interface and said output port.
Compton discloses an integrated circuit (Figures 1-4) comprising:
at least one magnetic sensor for measuring a magnetic field induced by a first current (comprising 31, 32, Figures 1-4);
one or both of a digital communication interface (comprising 42) and an output port (comprising 44, Figures 1-4);
a controller configured (comprising 36) for transmitting one or more values of said first current (32 coupled to 34 and output of 34 coupled to 36) over one or both of said digital communication interface and said output port (output from 36 to 42, 44, Figures 1-4), wherein the integrated circuit is provided as single unit/system (1, in Figures 3-4).
Compton also discloses an additional/temperature sensor sending sensed signal to the controller (40, sending output to 36, Figures 1-4) and embodiments where connecting a sensor as a shunt interface for sensing a voltage over an activation coil, said voltage indicative of a second current (Paragraph 84, “…the sensor 31 is adapted to be electrically connected to the first and second terminal 17a, 17b and adapted to measure the voltage between the first and second terminals 17a, 17b. In other words, the sensor 31 is adapted to measure the voltage of the coil 18 of the actuation portion 16”). It would have been obvious to one of ordinary skill in the art before the effective
filing date of the claimed invention as disclosed in Paragraph 41 of Choi and including the details of configuring the controller to transmit the measured current signals over the digital communication interface and the output port as taught by Compton.
Regarding Claim 2, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the shunt resistor is connectable to the integrated circuit; or wherein the shunt resistor is incorporated inside the integrated circuit (20 connectable to or incorporated inside the IC as shown in Figures 2-4, 6, 8-10).
Regarding Claim 3, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the controller is connected to the at least one magnetic sensor via a first data path; and wherein the controller is connected to the shunt interface via a second data path different from the first data path (Compton, 32/32a coupled to 34 via first data path); and wherein the controller is connected to the shunt interface via a second data path different from the first data path (controller connected to the shunt interface sensing voltage over the shunt resistor 110/604 of Westrick, Jr. in Figures 1-2, 7-9 in the combination via a second/separate data path).
Regarding Claim 8, combination of Choi and Compton discloses the integrated circuit of Claim 1, further comprising at least one analog-to-digital converter (ADC) for digitizing said voltage (Paragraph 41, “….Although not shown in FIGS. 2 to 4 for convenience of illustration, the PCB 10 may selectively include an analog-to-digital (ADC) circuit configured to convert a voltage difference between both ends of the shunt resistor 20 and an output of the Hall sensor 30 into current values….”, Compton, Part of 34, Figures 1-4, Paragraph 42).
Regarding Claim 9, combination of Choi and Compton discloses the integrated circuit of Claim 1, further comprising a voltage interface for measuring a second voltage (Compton, voltage interface for measuring voltage at the output of 47/47a-c and coupled to the controller 36 input, Figures 1-4).
Regarding Claim 12, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the integrated circuit further comprises an integrated temperature sensor (Compton, comprising 40, Figures 1-4).
Regarding Claim 13, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the integrated circuit further comprises a temperature sensor/thermistor interface for measuring an external temperature (Compton, comprising 40, Figures 1-4, Paragraph 46); and wherein the controller is further configured to assert said output port based on the measured external temperature (Compton, controller 36 receives inputs from 32 and 40 and output to 42, 44). Combination of combination of Choi and Compton does not specifically disclose the temperature sensor/thermistor being a negative temperature coefficient component.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select the temperature sensor/thermistor in the combination, as a negative temperature coefficient component (NTC thermistor) to take advantage of the known property of the NTC thermistor having a high resistance under a low temperature and a low resistance under a high temperature, fast response time and working in a wide temperature range.
Regarding Claim 14, combination of Choi and Compton discloses the integrated circuit of Claim 1, comprising said digital communication interface and at least one output port (comprising part of 42, 44); and configured for receiving instructions from an external processor via said digital communication interface, and for asserting said at least one output port in response to an instruction received from said external processor (Compton, part of remote device 50, Figures 1-4, Paragraphs 64-65, 70, 93).
Regarding Claim 15, combination of Choi and Compton discloses the integrated circuit of Claim 1, comprising said digital communication interface and a first and a second output port (Compton, 44 comprising a first output port coupled to 44, a second output port coupled to 16, 12, Figures 1-4); and configured for receiving instructions from an external processor via said digital communication interface, and for asserting either the first output port or the second output port in response to an instruction received from said external processor (Compton, external processor being part of remote device 50 sending/receiving instructions via 42, 44, Figures 1-4, Paragraphs 64-65, 70, 93).
Regarding Claim 16, Choi discloses a circuit comprising:
an integrated circuit according to Claim 1, having at least one output port; and one or both of a switch with an actuator and a fuse operatively connected to said at least one output port (Paragraph 78, “…In addition to the integrated current-measuring apparatus 1, the battery pack 100 according to the present disclosure may further include at least one battery module including a set of pouch-type or can-type secondary batteries, a pack case configured to accommodate the battery module, and various devices configured to control charge/discharge of the battery module, e.g., a BMS, a relay, and a fuse”).
Regarding Claim 20, Choi discloses the integrated circuit of Claim 16, further comprising a magnetic shield provided in a vicinity of the magnetic sensor (comprising 50, Figures 2, 4, 6-9).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Vincent et al. (US 2015/0070026).
Regarding Claim 4, combination of Choi and Compton does not specifically disclose the integrated circuit of Claim 1, wherein the controller is configured for detecting an overcurrent condition by comparing said first and/or said second current with a predefined threshold value.
Vincent discloses an integrated circuit (Figures 1-7) comprising: at least one magnetic sensor for measuring a magnetic field induced by a first current (comprising 44, Figure 2); a shunt interface for sensing a voltage indicative of a second current (voltage sensor 46, Figure 2);
one or both of a digital communication interface (comprising 53, Figure 2) and an output port (comprising 54); and a controller configured (comprising 48, Figure 2) for transmitting one or more values of said first current and said second current (48 receiving inputs from 44 and 46, Figure 2) over one or both of said digital communication interface and said output port (48 configured to output to 53, 54, Figure 2),
wherein the controller is configured for detecting an overcurrent condition by comparing said first and/or said second current with a predefined threshold value (117, 120, Figure 3), and if an overcurrent condition is detected, to assert said output port (124, Figure 3).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination detecting overcurrent condition as taught by Vincent, to interrupt the current flow in the switch path in case of a fault/malfunction in the integrated circuit.
Claims 5-7 is rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Nehmeh (US 9,612,262).
Regarding Claim 5, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the controller further comprises a timer (Compton, Paragraphs 47, 49, 92).
Combination of Choi and Compton does not disclose that the controller is configured for detecting an overcurrent condition of said first and/or second current using an I2T technique, and if an overcurrent condition is detected, to assert said output port.
Nehmeh discloses an integrated circuit (Figures 1-8, 11) comprising at least one magnetic sensor for measuring a magnetic field induced by a first current (comprising Hall effect sensor 410, Figures 5, 7);
one or both of a digital communication interface (comprising 42) and an output port (comprising 518, 520, Figures 5, 7);
a controller configured (comprising 502, Figures 5, 7) for transmitting one or more values of said first current (output 510, Figures 5, 7), wherein the controller is configured for detecting an overcurrent condition of said first and/or a second current from a voltage measurement using an I2T technique (Column 10, lines 33-51), and if an overcurrent condition is detected, to assert an output port (output to 514, 518, 520, Figures 5, 7, Column 9, lines 25-45). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination, detecting overcurrent condition using an I2T technique as taught by Nehmeh, for improved the short circuit protection including short circuit protection for any external elements fed by the current (see Nehmeh, Column 10, lines 33-46).
Regarding Claim 6, combination of Choi, Compton discloses the integrated circuit of Claim 1, wherein the integrated circuit comprises a first and a second output port (Compton, 44 comprising a first output port coupled to 44, a second output port coupled to 16, 12, Figures 1-4); and wherein the integrated circuit further comprises a timer (Paragraphs 47, 49, 92).
Combination of Choi and Compton does not disclose that the controller is configured for detecting an overcurrent condition of said first and/or second current, and if an overcurrent condition is detected, to assert said first output port; and if the overcurrent condition is still present a time interval ΔT later, to assert said second output port.
Nehmeh discloses an integrated circuit (Figures 1-8, 11) comprising at least one magnetic sensor for measuring a magnetic field induced by a first current (comprising Hall effect sensor 410, Figures 5, 7);
one or both of a digital communication interface (comprising 518, 520, Figures 5, 7) and an output port comprising a first and a second output port (comprising 514, Figures 5, 7);
a controller configured (comprising 502, Figures 5, 7) for transmitting one or more values of said first current and/or a second current corresponding to a voltage measurement (output to 514, 518, 520, Figures 5, 7, Column 9, lines 25-45), and
the controller is configured for detecting an overcurrent condition of said first and/or second current, and if an overcurrent condition is detected, to assert said first output port (output to 514, Figures 5, 7, Column 10, lines 41-47, Column 9, lines 25-45); and if the overcurrent condition is still present a time interval ΔT later, to assert said second output port (output to the other of 514/518, 520, Figures 5, 7, Column 10, lines 52-59, Column 9, lines 25-45, Claim 11).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination, detecting overcurrent condition including a delayed response as taught by Nehmeh such that when external shorts are detected, contactors/switches carrying the first and/or second current can be selectively controlled/opened to avoid unnecessary loss of other circuits in the system due to loss of power (see Nehmeh, Column 10, lines 51-59).
Regarding Claim 7, combination of Choi, Compton and Nehmeh discloses the integrated circuit of Claim 6, wherein the time interval ΔT is a predefined time interval; or wherein the time interval ΔT is calculated as a function of the measured first current (Nehmeh, Column 10, lines 51-59, Claim 11).
Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Franke (US 2009/0278531).
Claim 10 recites an integrated circuit comprising at least two magnetic sensors configured for measuring a magnetic field difference or a magnetic field gradient, induced by a current, and the limitations of a shunt interface, one or both of a digital communication interface and a controller as recited in Claim 1, and excluding the new limitation of the first current of at least 125 Amps at a distance of 10mm or less.
Regarding Claim 10, combination of Choi and Compton discloses the integrated circuit of Claim 1, wherein the magnetic sensor is a Hall sensor (Choi, Hall sensor 30, Figures 2-6, 8-9, Paragraph 39), configured for measuring a magnetic field, induced by said first current (Choi, Hall sensor 30, Figures 2-6, 8-9, Paragraph 39, Compton, Paragraph 83). Combination of Choi and Compton does not disclose specifically disclose measuring a magnetic field difference or a magnetic field gradient and additional magnetic sensor to have at least two magnetic sensors in Claim 1 rejection.
Franke discloses an integrated circuit (Figures 1-5, Abstract) comprising at least two magnetic sensors (comprising 21, 22a, 22b, Figures 1-2, 4-5, Paragraphs 7, 37, 43), configured for measuring a magnetic field difference or a magnetic field gradient, induced by a current (Paragraph 7, Paragraph 34, “….With reference to the measurement signals 21', 22' and the parameters stored in the memory 7 for the position of the Hall sensors 21, 22a relative to the primary component, the position of the secondary component relative to the primary component in real time is determined by means of the microcontroller 2”, Paragraphs 37, 43).
It would have been obvious to one of ordinary skill in the art before the effective
filing date of the claimed invention to provide in the combination, to provide at least two magnetic sensors, to measure magnetic fields aligned in at least two different directions or planes (see Franke, Paragraphs 7-8).
Regarding Claim 11, combination of Choi, Compton and Franke discloses the integrated circuit, of Claim 10, wherein said at least two magnetic sensors comprise at least two horizontal Hall elements or at least two vertical Hall elements, spaced apart from each other and oriented in parallel, and configured for measuring a magnetic field difference or a magnetic field gradient (Franke, 21, 22a, 22b, Figures 1-2, 4-5, Paragraphs 7, 37, 43).
Claims 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Iwaki et al. (US 2022/0158433).
Regarding Claim 17, combination of Choi and Compton discloses the circuit of Claim 16, wherein the integrated circuit comprises a first output port and a second output port (Compton, a first outport for connecting terminal 17a, 17b of 16 and a second output for connecting terminals 13a, 13b of 12, Figures 1-4); wherein the actuator of said switch is connected to the first output port (Compton, the first outport being for connecting terminal 17a, 17b of actuator 16, Figures 1-4).
Combination of Choi and Compton does not disclose a fuse, wherein the fuse is operatively connected to the second output port.
Iwaki discloses a circuit (Figures 1-2, 5-7) comprising an integrated circuit (comprising 11, Figures 1-2, 5-7) having a first output port and a second output port (comprising 21, 13, Figures 1-2, 5-7), a switch with an actuator (switch 14 with relay driver 23, Figure 2) and a fuse (15, Figure 2, wherein the fuse is operatively connected to the second output port (15 coupled to 13, Figure 2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination, a fuse as taught by Iwaki, to increase the response time/speed and reduce size of the switch circuit (see Iwaki, Paragraphs 27-28).
Regarding Claim 18, combination of Choi, Compton and Iwaki discloses the circuit of Claim 16, wherein the switch and the fuse are connected in series (14, 15 connected in series, Figures 1-2, 5-7).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Choi (US 2021/0048454) in view of Compton et al. (US 2021/0098215) and Kim (US 2018/0069411).
Regarding Claim 19, combination of Choi and Compton does not specifically disclose the circuit of Claim 16, further comprising detection means for testing whether the switch is opened or closed.
Kim discloses a circuit (Figures 1-2) comprising a switch with an actuator (comprising130, Figures 1-2) and a fuse (120, Figures 1-2) operatively connected to an output port (connected to output port to connect to M, 200, Figures 1-2), and detection means for detecting whether the switch is actually open or closed (comprising 170, Figures 1-2, Paragraphs 44-45).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide in the combination, a detection means as taught by Kim, to indirectly determine the status of the switch and to take protective measures (see Kim, Paragraphs 44-45).
Response to Arguments
Applicant's arguments filed on 10/17/2025 have been fully considered but they are not persuasive and/rendered moot in view of new grounds of rejection.
Applicant’s arguments, on Pages 10-12 of the Remarks toward obviousness rejection of Claims 1-3, 8-9, 12-16 and 20 are rendered moot in view of new grounds of rejection (103 rejection of claims using the combination of Compton and Westrick, Jr. is changed to 103 rejection using newly found Choi reference as primary reference and Compton as a secondary reference).
Applicant’s arguments, on Pages 10-13 of the Remarks toward secondary references Westrick, Jr. and Huber Lindenberger are rendered moot as the references are not relied upon in the current rejection and the argued upon and/or new limitations are disclosed by the newly found primary reference Choi.
Regarding Applicant’s arguments, on Pages 13-14 of the Remarks toward dependent claims 2-3, 8-9, 12-16, Claim 4, and Claims 5-7 that are directed toward the limitations of Claim 1, please see the response to arguments toward Claim 1 above.
Applicant argues, on Page 14 of the Remarks toward the rejection of Claim 10 and the secondary reference Franke that there is no teaching of measuring a magnetic field gradient or magnetic field difference in the referenced paragraphs 7, 34, 37 and 43 of Franke.
In response, examiner respectfully notes that in Paragraph 3, Franke discloses, “….With reference to the measurement signals 21', 22' and the parameters stored in the memory 7 for the position of the Hall sensors 21, 22a relative to the primary component, the position of the secondary component relative to the primary component in real time is determined by means of the microcontroller 2”. It is further respectfully noted that having the measurement signals from two Hall sensors located at two different locations stored in the memory and available to the controller to determine the magnetic field gradient or magnetic field difference.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Bladridge (US 2015/0057822) discloses a power controller (200, Figures 1-2) including current detection circuit 108 configured for detecting an overcurrent condition of using an I2T technique (212 in 108); Westrick, Jr. et al. (US 9,064,661) discloses an integrated circuit (Figures 1-2, 7-13) comprising a shunt interface for sensing a voltage over a shunt resistor (comprising shunt interface for sensing voltage over shunt resistor 110, Figures 1-2, 604, Figures 7, 9), said voltage indicative of current through an activation coil of a contactor (current through activation coil 116, Figures 1-2, 7-9), and a controller (112, Figures 1-2, 7-9) configured to receive one or more values of the second current and transmit to a memory (112 receives 110b at the input and transmit to 122, Figures 7-9); Huber Lindenberger et al. (US 2021/0190893)discloses an integrated circuit (Figures 1-11) comprising a magnetic sensor (A, B, Figures 3, 5A, 5B), a controller (40, Figures 3, 5A, 5B), and other components integrated on the same semiconductor substrate (10, Figures 3, 5A, 5B, Paragraph 51, 79).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LUCY M THOMAS whose telephone number is (571)272-6002. The examiner can normally be reached Mon-Fri 9:30 am - 5:30 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V Tran can be reached at (571)270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LUCY M THOMAS/ Examiner, Art Unit 2838, 11/06/2025
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838