DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see page 6 of Remarks, filed December 30, 2025, with respect to the 35 U.S.C. 112 Rejection of claim 3 have been fully considered and are persuasive. The rejection of the aforementioned claim has been withdrawn.
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Kim et al. (US Publication 2013/0194715) is relied upon herein to disclose the material of the internal electrodes.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5, 7-8 AND 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Publication 2013/0194715) in view of Hideyuki (JP6171220B2).
In re claim 1, Kim discloses a capacitor body comprising:
a first internal electrode (31 – Figure 2, ¶44) and a second internal electrode (32 – Figure 2, ¶44) alternately stacked while being spaced apart from each other, and
a dielectric layer (11 – Figure 2, ¶45) interposing the first internal electrode and the second internal electrode (Figure 2), wherein the first internal electrode, the second internal electrode, and the dielectric layer are stacked in a first direction (‘T’ direction – Figure 1, Figure 2), and the capacitor body includes a first surface (S1 – Figure 1, Figure 2, ¶42) and a second surface (S4 – Figure 1, Figure 2, ¶42) facing the first surface in a second direction perpendicular to the first direction (Figure 1, Figure 2), and
first (21 – Figure 2, ¶39) and second external electrodes (22 – Figure 2, ¶39) connected to the first internal electrode (31 – Figure 2) and the second internal electrode (32 – Figure 2), respectively, and the first and second external electrodes are disposed on the first surface and the second surface (Figure 2), respectively,
wherein the first internal electrode includes Nickel (Ni), copper (Cu), or both, and palladium (Pd) (¶15).
Kim further discloses the first internal electrode (31 – Figure 2) has a first end portion (portion of 31 contacting 21 – Figure 2) and the second internal electrode (32 – Figure 2) has a second end portion (portion of 32 contacting 22 – Figure 2).
Kim does not disclose wherein the first internal electrode comprises a first end portion protruding from the first surface by 0.5 μm to 5 μm, and
wherein the second internal electrode comprises a second end portion protruding from the second surface by 0.5 μm to 5 μm,
wherein the first end portion comprises a first plating layer, and
wherein the first plating layer includes palladium (Pd).
Hideyuki discloses wherein the first internal electrode comprises a first end portion protruding from the first surface by 0.5 μm to 5 μm (Summary of the Invention ¶10), and
wherein the second internal electrode comprises a second end portion protruding from the second surface by 0.5 μm to 5 μm (Summary of the Invention ¶10), and
the internal electrode is plated, and, thus, the first end portion comprises a first plating layer (Description of the Preferred Embodiments ¶13-14. The internal electrodes can be formed through a plating process.).
The combination of Kim and Hideyuki discloses wherein the first plating layer includes palladium (Pd).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the protruding portions of Hideyuki to increase the adhesion between the internal electrode and external electrode of the electronic device.
In re claim 2, Kim inv view of Hideyuki discloses the multilayer capacitor of claim 1, as explained above. Kim does not disclose wherein the first end portion and the second end portion are disposed to be offset from each other in the second direction of the capacitor body and alternately protrude from first and second surfaces of the capacitor body, respectively.
Hideyuki further discloses wherein the first end portion (protrusion portions of 3 on left surface of 10 – Figure 1) and the second end portion (protrusion portions of 3 on right surface of 10 – Figure 1) are disposed to be offset from each other in the second direction of the capacitor body (10 – Figure 1, Figure 2) and alternately protrude from first and second surfaces of the capacitor body (left and right surfaces of 10 – Figure 1, Figure 2), respectively.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the protruding portions of Hideyuki to increase the adhesion between the internal electrode and external electrode of the electronic device.
In re claim 3, Kim in view of Hideyuki discloses the multilayer capacitor of claim 1, as explained above. Kim further discloses a first external electrode (21 – Figure 2) is electrically connected to the first end portion (end portion 31 – Figure 2 ); and
the second external electrode (22 – Figure 2) is electrically connected to the second end portion (end portion of 32 – Figure 2).
In re claim 4, Kim in view of Hideyuki discloses the multilayer capacitor of claim 3, as explained above. Kim further discloses wherein the first external electrode (21 – Figure 2) comprises:
a first conductive layer disposed on the first surface (S1 – Figure 1, Figure 2) and connected to the first internal electrode (¶42-44); and
a first internal plating layer disposed to cover the first conductive layer (¶43), and
wherein the second external electrode (22 – Figure 2) comprises:
a second conductive layer disposed on the second surface (S4 – Figure 1, Figure 2) and connected to the second internal electrode (¶42-44); and
a second internal plating layer disposed to cover the first conductive layer (¶43).
In re claim 5, Kim in view of Hideyuki discloses the multilayer capacitor of claim 4, as explained above. Kim further discloses wherein the capacitor body further includes a third surface and a fourth surface (S3, S6 – Figure 1, Figure 2, ¶42) facing each other in the first direction (‘T’ direction – Figure 1, Figure 2), the first conductive layer comprises:
a first connection portion (portion of 21 on S1 – Figure 1, Figure 2) located on the first surface and connected to the first end portion (Figure 2); and
a first band portion (portion of 21 on S3, S6 – Figure 1, Figure 2) extending to at least a portion of the third surface (S3 – Figure 1, Figure 2), and
the second conductive layer comprises:
a second connection portion (portion of 22 on S4 – Figure 1, Figure 2) located on the second surface (S4 – Figure 1, Figure 2) and connected to the second end portion (Figure 2); and
a second band portion (portion of 22 on S3, S6 – Figure 1, Figure 2) extending to at least a portion of the third surface (S3 – Figure 1, Figure 2).
In re claim 7, Kim in view of Hideyuki discloses the multilayer capacitor of claim 1, as explained above. Kim does not disclose wherein the second end portion comprises a second plating layer.
Hideyuki discloses wherein the second end portion comprises a plating layer (Description of the Preferred Embodiments ¶13-14. The internal electrodes can be formed through a plating process.).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the protruding portions of Hideyuki to increase the adhesion between the internal electrode and external electrode of the electronic device.
In re claim 8, Kim in view of Hideyuki discloses the multilayer capacitor of claim 7, as explained above. Kim further discloses the second internal electrode layer comprises at least one of nickel (Ni), copper (Cu), tin (Sn), and palladium (Pd) (¶15).
Kim does not disclose the second end portion is a second plating layer.
Hideyuki discloses the internal electrode is plated, and, thus, the second end portion comprises a second plating layer (Description of the Preferred Embodiments ¶13-14. The internal electrodes can be formed through a plating process.).
The combination of Kim and Hideyuki discloses wherein the second end portion is a second plating layer that includes palladium (Pd).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the protruding portions of Hideyuki to increase the adhesion between the internal electrode and external electrode of the electronic device.
In re claim 11, Kim in view of Hideyuki discloses the multilayer capacitor of claim 7, as explained above. Kim further discloses wherein each of the first and second internal electrodes (31, 32 – Figure 2) includes a plurality of internal electrodes (Figure 2).
Claim(s) 6 AND 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Publication 2013/0194715) in view of Hideyuki (JP6171220B2) and in further view of Kim ‘559 et al. (US Publication 2020/0312559).
In re claim 6, Kim in view of Hideyuki discloses the multilayer capacitor of claim 4, as explained above. Kim does not disclose the first external electrode further comprises a first external plating layer disposed to cover the first internal plating layer; and
the second external electrode further comprises a second external plating layer disposed to cover the second internal plating layer.
Kim ‘559 discloses the first external electrode (130 – Figure 3, ¶39) further comprises a first external plating layer (133 – Figure 3, ¶57) disposed to cover the first internal plating layer (132 – Figure 3, ¶57); and
the second external electrode (140 – Figure 3, ¶39) further comprises a second external plating layer (143 – Figure 3, ¶39) disposed to cover the second internal plating layer (142 – Figure 3, ¶39).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the multiple plating layers improve corrosion resistance and mounting characteristics.
In re claim 18, Kim in view of Hideyuki and in further view of Kim ‘559 discloses he multilayer capacitor of claim 6, as explained above. Kim does not disclose wherein the first external plating layer includes an end portion that covers (i) an end of the first conductive layer, and (ii) contacts the capacitor body, wherein the first external plating layer overlaps both the first internal electrode and the second internal electrode.
Kim ‘559 discloses wherein the first external plating layer (133 – Figure 3) includes an end portion that covers (i) an end of the first conductive layer (131 – Figure 3, ¶58) , and (ii) contacts the capacitor body (110 - Figure 3, ¶37), wherein the first external plating layer (133 – Figure 3) overlaps both the first internal electrode and the second internal electrode (121, 122 – Figure 3, ¶49).
Kim does not disclose wherein the first surface is etched.
Hideyuki discloses the first surface is etched (Description of the Embodiments ¶6).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the protruding portions of Hideyuki to increase the adhesion between the internal electrode and external electrode of the electronic device.
Kim does not disclose wherein the first surface is laser etched. However, this claim is considered to be a product by process claim since the claim language is directed to the step required to form the protruding internal electrodes. Therefore, this step has been given no patentable weight since it has been held that the determination of patentability in a product-by-process claim is based on the product itself, even though the claim may be limited and defined by the process. That is, the product in such a claim is unpatentable if it is the same as or obvious from the product of the prior art, even if the prior product was made by a different process. In re Thorpe, 777 F.2d 695, 697, 227 USPQ 964, 966 (Fed. Cir. 1985). A product-by-process limitation adds no patentable distinction to the claim, and is unpatentable if the claimed product is the same as a product of the prior art.
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Publication 2013/0194715) in view of Hideyuki (JP6171220B2) and in further view of Choi (US Publication 2015/0109718).
In re claim 9, Kim in view of Hideyuki discloses the multilayer capacitor of claim 1, as explained above. Kim does not disclose wherein a surface roughness of the capacitor body is in a range of 0.2 μm to 1 μm.
Choi discloses wherein a surface roughness of the capacitor body is in a range of 0.2 μm to 1 μm (Claim 12, Table 4).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to incorporate the component body surface roughness characteristics of Choi to improve the mechanical strength of the device when embedded in a printed circuit board (¶115-116: Choi).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Publication 2013/0194715) in view of Hideyuki (JP6171220B2) and in further view of Chae et al. (US Publication 2015/0022943).
In re claim 10, Kim in view of Hideyuki discloses the multilayer capacitor of claim 1, as explained above. Kim does not disclose wherein a thickness of the capacitor body in the first direction is smaller than or equal to 150 μm.
Chae discloses wherein a thickness of the capacitor body in the first direction is smaller than or equal to 150 μm (¶46).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dielectric layer thickness, and thus thickness of the component body, to achieve a device having desired capacitance and miniaturization characteristics per user specifications, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US Publication 2013/0194715) in view of Hideyuki (JP6171220B2).
In re claim 12, Kim in view of Hideyuki discloses the multilayer capacitor of claim 1, as explained above. Kim further discloses the capacitor body has a preset thickness in the first direction (Figure 1), a preset length in the second direction (Figure 1), and a preset width in a third direction (Figure 1) perpendicular to the first direction and the second direction (Figure 1).
Kim does not disclose the preset thickness of the capacitor body is smaller than the preset width.
However, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to adjust the dielectric layer thickness, and thus thickness of the component body, to achieve a device having desired capacitance and miniaturization characteristics per user specifications, since such a modification would have involved a mere change in the size of a component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Amano et al. (US Patent 5,712,758) Figure 1
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ARUN RAMASWAMY whose telephone number is (571)270-1962. The examiner can normally be reached Monday - Friday, 9:00 am - 5:00 pm.
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/ARUN RAMASWAMY/ Primary Examiner, Art Unit 2848