Prosecution Insights
Last updated: April 19, 2026
Application No. 18/433,808

POWER SWITCH ASSEMBLY WITH CO-PACKAGED PROTECTION FUNCTION

Non-Final OA §103§112
Filed
Feb 06, 2024
Examiner
FAUBERT, SAMANTHA LYNETTE
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies Austria AG
OA Round
2 (Non-Final)
87%
Grant Probability
Favorable
2-3
OA Rounds
2y 7m
To Grant
79%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allow Rate
33 granted / 38 resolved
+18.8% vs TC avg
Minimal -8% lift
Without
With
+-7.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
24 currently pending
Career history
62
Total Applications
across all art units

Statute-Specific Performance

§103
51.7%
+11.7% vs TC avg
§102
31.4%
-8.6% vs TC avg
§112
16.9%
-23.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 38 resolved cases

Office Action

§103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The previous objection is withdrawn due to amended drawings filed on 1/14/206. The new drawings are accepted. Response to Arguments Applicant’s arguments, see Pg. 11, Para. 2 & 3, filed 1/14/2026, with respect to the rejection(s) of claim(s) 1-20 under 103 rejection by Zeng & Miatton have been fully considered and are persuasive. Applicant argues “that the present application has a priority date of February 7, 2023. MIATTON was published on June 20, 2024. Accordingly, Applicant also notes that MIATTON only qualifies as prior art under 102(a)(2), since it was published after the priority date of the present application. However, MIATTON is not 102(a)(2) prior art because the exception under 102(b)(2)(C) applies (i.e., the commonly owned exception).” Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Zeng et al., CN108736869 (hereinafter referred to as Zeng), and Sada et al., US20240088886 (hereinafter referred to as Sada). Claim Rejections - 35 USC § 112 The previous rejection of claim 13 (previously misstated as claim 1) is withdrawn due to amended claims filed on 1/14/2026. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-5, 13, and 16-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zeng et al., CN108736869 (hereinafter referred to as Zeng), in view of Sada et al., US20240088886 (hereinafter referred to as Sada). In regards to claim 1, Zeng teaches a power switch assembly (MOS and driver protection circuit; [Pg. 8, Para. 15] & [Fig. 1]), a first assembly load terminal (power access point; [Fig. 1]) and a second assembly load terminal (RTN; [Fig. 1]), [AltContent: arrow][AltContent: textbox (RTN)][AltContent: textbox (RTN)][AltContent: arrow] PNG media_image1.png 354 502 media_image1.png Greyscale comprising: a power switch (metal-oxide-semiconductor 140; [Fig. 1]) having a control terminal (gate of 140; [Fig. 1]), a first load terminal (drain of 140; [Fig. 1]) and a second load terminal (source of 140; [Fig. 1]); a driving circuit (driver 110; [Pg. 8, Para. 19] & [Fig. 1]) coupled to the control terminal (implicit, gate of 140 is coupled to the driving circuit 110 through tube 130; [Fig. 1]) and configured to control (driving; [Pg. 8, Para. 19]) the power switch responsive to a control signal applied to the assembly control terminal (implicit; [Fig. 1]); a protection device (tube 130, F1; [Fig. 1]) associated with a first current duration and a first current value (inherent, the first current duration is the time it takes for a fuse to open and the first current value is the max current rating of the fuse) and arranged between the driving circuit and the control terminal (implicit; [Fig. 1]), the protection device has a first terminal (left node of F1; [Fig. 1]) coupled to the driving circuit (implicit; [Fig. 1]) and a second terminal (right node of F1; [Fig. 1]) coupled to the control terminal (implicit; [Fig. 1]), and the protection device being configured to decouple the driving circuit from the control terminal based on the first current duration and the first current value (inherent, the function of a fuse is to open, or decouple, when a current has exceeded the fuse’s current duration and rating and/or its I-V curve.); and a clamping device (transient suppression diode D1; [Abstract] & [Fig. 1]) associated with a second current duration and a second current value (inherent, The second current duration is less than the rated timing of the peak pulse rating and the second current value is less than the derived current from the maximum power dissipation rating and/or I-V curve.), the clamping device being coupled to the first terminal of the protection circuit (Examiner’s Note: The protection circuit is understood as the protection device.), between the driving circuit and the protection device (implicit; [Fig. 1]), and to the second load terminal (implicit; [Fig. 1]), the clamping device being configured to couple the control terminal to the second load terminal based on the second current duration and the second current value (inherent, The second current duration is less than the rated timing of the peak pulse rating and the second current value is less than the derived current from the maximum power dissipation rating and/or I-V curve.), and wherein the first current duration is longer than the second current duration (inherent, a transient suppression diode operates faster than a fuse). Zeng does not teach a power switch assembly comprising an assembly control terminal and a single substrate and wherein the power switch, driving circuit, the protection device, and the clamping device are integrated on a single substrate, and wherein the first current value is lower than the second current value. Sada teaches a power switch assembly (semiconductor device 1; [Fig. 2]) comprising an assembly control terminal (input electrode 13; [Fig. 2]) and a single substrate (semiconductor layer 2; [0088] & [Fig. 5]) (Examiner’s Note: It is understood that the broadest reasonable interpretation of substrate includes layer(s).) and wherein the power switch (MISFET 9; [Fig. 2]) (metal-oxide-semiconductor 140, Zeng), driving circuit (gate control circuit 25; [0063] & [Fig. 2]) (driver 110, Zeng), the protection device (protection circuit 25; [Fig. 2]) (tube 130, F1, Zeng), and the clamping device (active clamp circuit 26; [Fig. 2]) (Transient Suppression Diode D1, Zeng) are integrated on a single substrate (semiconductor layer 2; [0088] & [Fig. 5]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng to incorporate a power switch assembly comprising an assembly control terminal and a single substrate and wherein the power switch, driving circuit, the protection device, and the clamping device are integrated on a single substrate as taught by Sada. The motivation for doing so would be to make the circuit commercially available. Zeng and Sada discloses the invention except for wherein the first current value is lower than the second current value. In order for the circuit to operate correctly and not have the diode, or clamping device, break before the fuse blows. Therefore, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to have selected the fuse and diode such that first current value is lower than the second current value, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). The benefit for doing so would be to protect the clamping device, the gate driver, and the gate of the power switch from short circuit events. In regards to claim 2, Zeng further teaches wherein: the protection device is configured to decouple the driving circuit from the control terminal (fuse opens, implicit; [Fig. 1]) if a current flowing through the protection device exceeds the first current value for an entirety of the first current duration (tripping points of a fuse), and the clamping device is configured to couple the control terminal to the second load terminal if the current flowing through the protection device exceeds the second current value for an entirety of the second current duration (Examiner’s Note: When there is a short circuit between the load terminals, the diode will conduct and forward bias. Therefore, the control terminal is coupled to the source by the voltage drop of the diode. During normal operation the diode does not conduct (forward bias) and the control terminal is decoupled from the second load terminal.). In regards to claim 3, Zeng further teaches wherein the clamping device is configured to keep the control terminal and the second load terminal decoupled if the current flowing through the protection device exceeds the first current value for the entirety of the first current duration ([Pg. 8, Para. 21]) (inherent, The diode is designed at a second current level higher than the first current level. Therefore, the diode will be non-conducting according to the I-V curve because the voltage on the anode will be lower than the control node.). In regards to claim 4, Zeng further teaches wherein the current is a current flowing between the first load terminal and the control terminal (Between the grid G and the drain D of pipe when short circuit conducting; [Pg. 8, Para. 21]). In regards to claim 5, Zeng further teaches wherein: the protection device is configured to irreversibly decouple (fuse rapidly; [Pg. 8, Para. 21]) the driving circuit from the control terminal if the current flowing through the protection device exceeds the first current value for the entirety of the first current duration, and the clamping device is configured to reversibly couple (A current loop, Transient Suppression Diode D1 can be formed; [Pg. 8, Para. 21]) (inherent, the diode can switch between a conducting state and a non-conducting state) the control terminal to the second load terminal if the current flowing through the protection device exceeds the second current value for the entirety of the second current duration (inherent, In order for the circuit to have appropriate protection, the diode has to conduct for the entirety of the second duration while the second current value is exceeded. The second current value and second current duration were set in claim 1.). In regards to claim 13, Zeng teaches a protection method of a power switch assembly (MOS and driver protection circuit; [Pg. 8, Para. 15] & [Fig. 1]) comprising: a driving circuit (driver 110; [Pg. 8, Para. 19] & [Fig. 1]), a protection device (tube 130, F1; [Fig. 1]), a clamping device (transient suppression diode D1; [Abstract] & [Fig. 1]), and a power switch (metal-oxide-semiconductor 140; [Fig. 1]) having a control terminal (gate of 140; [Fig. 1]), a first load terminal (drain of 140; [Fig. 1]) and a second load terminal (source of 140; [Fig. 1]), wherein the driving circuit is coupled to the control terminal via the protection device (implicit, gate of 140 is coupled to the driving circuit 110 through tube 130; [Fig. 1]) and wherein the clamping device is coupled to a terminal of the protection circuit, arranged between the driving circuit and the protection device (implicit; [Fig. 1]), and to the second load terminal (coupled to the RTN; [Fig. 1]), [AltContent: arrow][AltContent: textbox (RTN)][AltContent: textbox (RTN)][AltContent: arrow] PNG media_image1.png 354 502 media_image1.png Greyscale comprising: operating the power switch based on a control signal provided to the driving circuit (output of driver 110; [Fig. 1]); while operating the power switch, decoupling, by the protection device, the driving circuit from the control terminal based on a current flowing through the protection device exceeding a first current value for an entirety of a first current duration of the protection device (inherent, the function of a fuse is to open, or decouple, when a current has exceeded the fuse’s current duration and rating and/or its I-V curve.); and while operating the power switch, coupling (implicit; [Fig. 1]), by the clamping device, the control terminal to the second load terminal based on the current flowing through the protection device exceeding a second current value for an entirety of a second current duration (inherent, The second current duration is less than the rated timing of the peak pulse rating and the second current value is less than the derived current from the maximum power dissipation rating and/or I-V curve), and wherein the first current duration is longer than the second current duration (inherent, a transient suppression diode operates faster than a fuse). Zeng does not teach a power switch assembly comprising an assembly control terminal and wherein the first current value is lower than the second current value. Sada teaches a power switch assembly (semiconductor device 1; [Fig. 2]) comprising an assembly control terminal (input electrode 13; [Fig. 2]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng to incorporate a power switch assembly comprising an assembly control terminal as taught by Sada. The motivation for doing so would be to make the circuit commercially available. Zeng and Sada discloses the invention according to claim 13 except for wherein the first current value is lower than the second current value. In order for the circuit to operate correctly and not have the diode, or clamping device, break before the fuse blows, the diode needs to be of a higher current value than the fuse’s current rating. Therefore, it would have been obvious to one having ordinary skill in the art at the time of the invention was made to have selected the fuse and diode such that first current value is lower than the second current value, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). The benefit for doing so would be to protect the clamping device, the gate driver, and the gate of the power switch from short circuit events. In regards to claim 16, Zeng does not explicitly teach wherein the first current duration is within a first range of a first order of magnitude, and wherein the second current duration is within a second range of a second order of magnitude. One of ordinary skill in the art knows that fuses operate on the order of 100s of milliseconds and seconds while a diode operates on an order of picosecond to microseconds and therefore, would have found it obvious to select an appropriate fuse and diode with ratings such that the claimed current durations set the appropriate protection level of a gate driver. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to set the first current duration to a first order of magnitude and the second current duration to a second order of magnitude since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. The motivation for doing so would be to have both of the protection devices operate correctly to protect the gate driver. In regards to claim 17, Zeng does not explicitly teach wherein the first current value is equal to or less than 100mA, and wherein the second current value is equal or greater than 500mA. One of ordinary skill in the art knows fuses and diodes were commercially available in a 100mA and 500mA rating and therefore, would have found it obvious to select the claimed current values in order to set the appropriate protection level of a gate driver which has operating limits in the order of 10s to 100s of mA. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to set the first current value equal to or less than 100mA and the second current value is equal to or greater than 500mA, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. The motivation would be to protect the gate driver. In regards to claim 18, Zeng does not teach wherein the power switch, driving circuit, the protection device, and the clamping device are integrated on a single substrate. Sada teaches wherein the power switch (semiconductor device 1; [Fig. 2]), driving circuit (gate control circuit 25; [0063] & [Fig. 2]) (driver 110, Zeng), the protection device (protection circuit 25; [Fig. 2]) (tube 130, F1, Zeng), and the clamping device (active clamp circuit 26; [Fig. 2]) (Transient Suppression Diode D1, Zeng) are integrated on a single substrate (semiconductor layer 2; [0088] & [Fig. 5]) (Examiner’s Note: It is understood that the broadest reasonable interpretation of substrate includes layer(s).). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng wherein the power switch, driving circuit, the protection device, and the clamping device are integrated on a single substrate as taught by Sada. The motivation for doing so would be to make the circuit commercially available. In regards to claim 19, Zeng does not explicitly teach wherein the first current duration is within a first range of a first order of magnitude, and wherein the second current duration is within a second range of a second order of magnitude. One of ordinary skill in the art knows that fuses operate on the order of 100s of milliseconds and seconds while a diode operates on an order of picosecond to microseconds and therefore, would have found it obvious to select an appropriate fuse and diode with ratings such that the claimed current durations set the appropriate protection level of a gate driver. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to set the first current duration to a first order of magnitude and the second current duration to a second order of magnitude since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. The motivation for doing so would be to have both of the protection devices operate correctly to protect the gate driver. In regards to claim 20, Zeng does not explicitly teach wherein the first current value is equal to or less than 100mA, and wherein the second current value is equal or greater than 500mA. One of ordinary skill in the art knows fuses and diodes were commercially available in a 100mA and 500mA rating and therefore, would have found it obvious to select the claimed current values in order to set the appropriate protection level of a gate driver which has operating limits in the order of 10s to 100s of mA. Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to set the first current value equal to or less than 100mA and the second current value is equal to or greater than 500mA, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. The motivation would be to protect the gate driver. Claim(s) 6 & 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zeng et al., CN108736869 (hereinafter referred to as Zeng), in view of Sada et al., US20240088886 (hereinafter referred to as Sada), and in further view of NPL, edaboard.com (hereinafter referred to as NPL U). In regards to claim 6, Zeng does not teach wherein: the single substrate is a multi-layered substrate, and the power switch, the driving circuit, the protection device and the clamping device are formed on the single multi-layered substrate; and the protection device is formed on a metal layer of the multi-layered substrate as a connection between the driving circuit and the control terminal, wherein the connection is configured to disintegrate based on a current flowing through the protection device exceeding the first current value for an entirety of the first current duration. Sada teaches wherein: the single substrate (semiconductor device 1; [Abstract]) is a multi-layered substrate (implicit; [Fig. 5]), and the power switch (split-gate transistor 9; [Abstract] & [Fig. 2]), the driving circuit (gate control circuit 25; [Fig. 2]), the protection device and the clamping device (protection circuit 24; [Fig. 2]) (Examiner’s Note: It is understood that the clamping device and protection device are both within the protection circuit 24. Sada teaches the gate control circuit and the protection circuit are located within the control IC 10 and is connected by gate control wiring 17. [0054]) are formed on the single (qty of 1 device; [Abstract] & [Fig. 1]) multi-layered substrate (implicit; [Fig. 5]); and the protection device is formed on a metal layer (semiconductor layer 2; [Fig. 5]) of the multi-layered substrate as a connection (gate control wiring 17; [Fig. 1]) between the driving circuit (semiconductor layer 2; [Fig. 1 & 5]) and the control terminal (second gate trench; [Fig. 5]) (Examiner’s Note: The circuit and connections would still be the circuit as taught by Zeng.). Sada does not teach wherein the connection is configured to disintegrate based on a current flowing through the protection device exceeding the first current value for an entirety of the first current duration. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng in order to incorporate wherein: the single substrate is a multi-layered substrate, and the power switch, the driving circuit, the protection device and the clamping device are formed on the single multi-layered substrate; and the protection device is formed on a metal layer of the multi-layered substrate as a connection between the driving circuit and the control terminal as taught by Sada. Sada further teaches the construction of the semiconductor for the circuit as taught by Zeng. The motivation for doing so would be apply a known manufacturing construction of the gate driver and power switch semiconductor. NPL U teaches wherein the connection (PCB trace as a fuse; [Pg. 1]) is configured to disintegrate (blown fuse) based on a current flowing through the protection device exceeding the first current value for an entirety of the first current duration. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng & Sada in order to incorporate wherein the connection is configured to disintegrate based on a current flowing through the protection device exceeding the first current value for an entirety of the first current duration as taught by NPL U. The motivation for doing so would be for a cost saving manufacturing method when the whole power switch assembly is designed “to be disposable”(NPL U, [Pg. 3, Schmitt Trigger]). In regards to claim 7, Zeng and Sada do not teach wherein the protection device is integrated into a connection between the driving circuit and the control terminal to provide a disintegration location, the connection at the disintegration location being configured to disintegrate based on a current flowing through the protection device exceeding the first current value for an entirety of the first current duration. NPL U teaches wherein the protection device is integrated into a connection (PCB trace as a fuse; [Pg. 1]) between the driving circuit and the control terminal to provide a disintegration (blown fuse) location, the connection at the disintegration location being configured to disintegrate (blown fuse) based on a current flowing through the protection device exceeding the first current value for an entirety of the first current duration. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng and Sada wherein the protection device is integrated into a connection between the driving circuit and the control terminal to provide a disintegration location, the connection at the disintegration location being configured to disintegrate based on a current flowing through the protection device exceeding the first current value for an entirety of the first current duration as taught by NPL U. The PCB trace as a fuse would replace the fuse as taught by Zeng onto the substrate as taught by Sada. The motivation for doing so would be for a cost saving manufacturing method when the whole power switch assembly is designed “to be disposable”(NPL U, [Pg. 3, Schmitt Trigger]). Claim(s) 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zeng et al., CN108736869 (hereinafter referred to as Zeng), in view of Sada et al., US20240088886 (hereinafter referred to as Sada), and in further view of Elliot et al., US20180205220 (hereinafter referred to as Elliot). In regards to claim 8, Zeng and Sada do not teach the power switch assembly of claim 1, further comprising: a load path protection device, the load path protection device being configured to decouple the first assembly load terminal from the first load terminal based on a current flowing through the load path protection device exceeding the first current value for an entirety of first current duration. Elliot teaches the power switch assembly of claim 1, further comprising: a load path protection device (fuses 383, 385, 387, 389, or 390; [Fig. 3]), the load path protection device being configured to decouple (blown fuse) the first assembly load terminal (+ terminal of load 304; [Fig. 3]) from the first load terminal (drain of MOSFETs 306, 326, or 346-348; [Fig. 3]) based on a current flowing through the load path protection device exceeding the first current value for an entirety of first current duration (Examiner’s Note: A fuse is blown open when a current exceeds its current and timing rating.). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng and Sada for the power switch assembly of claim 1, further comprising: a load path protection device, the load path protection device being configured to decouple the first assembly load terminal from the first load terminal based on a current flowing through the load path protection device exceeding the first current value for an entirety of first current duration as taught by Elliot. The motivation for doing so would be to provide further protection of the power switch. Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zeng et al., CN108736869 (hereinafter referred to as Zeng), in view of Sada et al., US20240088886 (hereinafter referred to as Sada), and in further view of Besse et al., US20110084339 (hereinafter referred to as Besse). In regards to claim 9, Zeng and Sada do not teach wherein the clamping device is configured to protect the driving circuit against an electrostatic discharge (ESD) event. Besse teaches wherein the clamping device (clamping structure 130; [Fig. 1]) is configured to protect (self-limit the current; [0023]) the driving circuit against an electrostatic discharge (ESD) event (ESD events; [0023]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng and Sada wherein the clamping device is configured to protect the driving circuit against an electrostatic discharge (ESD) event as taught by Besse. Besse teaches how the existing transient suppression diode as taught by Zeng along with the resistance element 120 provide ESD protection. The motivation for doing so would be to protect the control circuit from ESD events because the control terminal is connected to the outside of the package as taught by Sada. Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zeng et al., CN108736869 (hereinafter referred to as Zeng), in view of Sada et al., US20240088886 (hereinafter referred to as Sada), and in further view of Kuo et al., US20230275073 (hereinafter referred to as Kuo). In regards to claim 10, Zeng & Sada do not teach wherein the clamping device is one of: an n-metal oxide semiconductor (n-MOS) transistor, wherein a gate of the n-MOS transistor is coupled to the second load terminal, a Zener diode, wherein a cathode of the Zener diode is coupled to the second load terminal, or a pn-junction, wherein a cathode of the pn-junction is coupled to the second load terminal. Kuo teaches wherein the clamping device is one of: an n-metal oxide semiconductor (n-MOS) transistor, wherein a gate of the n-MOS transistor is coupled to the second load terminal, a Zener diode (second Zener diode ZD2, [0047] & [Fig. 1]), wherein a cathode of the Zener diode is coupled to the second load terminal (source S of the transistor T1; [Fig. 1]), or a pn-junction, wherein a cathode of the pn-junction is coupled to the second load terminal. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng & Sada to incorporate wherein the clamping device is one of: an n-metal oxide semiconductor (n-MOS) transistor, wherein a gate of the n-MOS transistor is coupled to the second load terminal, a Zener diode, wherein a cathode of the Zener diode is coupled to the second load terminal, or a pn-junction, wherein a cathode of the pn-junction is coupled to the second load terminal as taught by Kuo. The transient suppression diode D1 as taught by Zeng would be substituted with the Zener diode ZD2 as taught by Kuo. The diode would maintain the same connection points as taught by Zeng. The motivation for doing so would be engineering design choice to protect the circuit. Claim(s) 11-12 and 14-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Zeng et al., CN108736869 (hereinafter referred to as Zeng), in view of Sada et al., US20240088886 (hereinafter referred to as Sada), and in further view of Fabro, US11342855 (hereinafter referred to as Fabro). In regards to claim 11, Zeng and Sada do not teach wherein the driving circuit is a solid-state isolator, the solid-state isolator being configured to generate one of a turn-on voltage and a turn-off voltage based on the control signal applied to the assembly control terminal. Fabro teaches wherein the driving circuit is a solid-state isolator (isolation device and solid state switch; [Col. 11, Ln. 4-6] & [Fig. 3]), the solid-state isolator being configured to generate one of a turn-on voltage (turning on the switch 320; [Col. 9, Ln. 32-38] & [Fig. 3]) and a turn-off voltage (turn off strength; [Col. 9, Ln. 32-38] & [Fig. 3]) based on the control signal (On-Off Keying; [Col. 9, Ln. 32-38]) applied to the assembly control terminal (implicit; [Fig. 3]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng and Sada wherein the driving circuit is a solid-state isolator, the solid-state isolator being configured to generate one of a turn-on voltage and a turn-off voltage based on the control signal applied to the assembly control terminal as taught by Fabro. The apparatus 300 of Fabro would be the substitute for the driver circuit as taught by Zeng. The motivation for doing so would be to mitigate noise susceptibility of the control for the power switch. In regards to claim 12, Zeng and Sada do not teach wherein the driving circuit is a gate driver, the gate driver being configured to selectively couple the control terminal to one of a turn-on voltage source and a turn-off voltage source. Fabro teaches wherein the driving circuit is a gate driver (implicit; [Fig. 3]) (Examiner’s Note: The apparatus 300 is capable of providing a PWM signal to a gate of a power switch. This function makes the apparatus 300 a gate driver.), the gate driver being configured to selectively couple the control terminal to one of a turn-on voltage source (input voltage source 302; [Fig. 3]) and a turn-off voltage source (passive turn off device 318; [Fig. 3]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng and Sada wherein the driving circuit is a gate driver, the gate driver being configured to selectively couple the control terminal to one of a turn-on voltage source and a turn-off voltage source as taught by Fabro. In regards to claim 14, Zeng and Sada do not teach wherein the solid-state isolator includes a transformer comprising a primary side coupled to an input side of the driving circuit, and a secondary side coupled to an output side of the driving circuit. Fabro teaches wherein the solid-state isolator includes a transformer (transformer 310; [Fig. 3]) comprising a primary side (primary side 306; [Fig. 3]) coupled to an input side (left hand side; [Fig. 3]) of the driving circuit, and a secondary side (secondary side 308; [Fig. 3]) coupled to an output side (right hand side; [Fig. 3]) of the driving circuit. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng and Sada wherein the solid-state isolator includes a transformer comprising a primary side coupled to an input side of the driving circuit, and a secondary side coupled to an output side of the driving circuit as taught by Fabro In regards to claim 15, Zeng and Sada do not teach wherein the output side of the driving circuit comprises a turn-off switch and negative charge pump configured to control the turn-off switch, and wherein the turn-off switch is configured, while in a conductive state, to couple the control terminal to the second assembly load terminal to maintain the power switch in a non-conductive state. Fabro teaches wherein the output side of the driving circuit comprises a turn-off switch (passive turn off device 318; [Fig. 3]) and negative charge pump (negative charge pump 324; [Fig. 3]) configured to control the turn-off switch (ability… to adequately pump; [Col. 8, Ln. 34-37]), and wherein the turn-off switch is configured, while in a conductive state (is used; [Col. 9, Ln. 22-25]), to couple the control terminal to the second assembly load terminal (in parallel with… Cg2 322; [Col. 9, Ln. 22-25] & [Fig. 3]) to maintain the power switch in a non-conductive state (turn off of the switch 320; [Col. 9, Ln. 22-25]). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Zeng and Sada wherein the output side of the driving circuit comprises a turn-off switch and negative charge pump configured to control the turn-off switch, and wherein the turn-off switch is configured, while in a conductive state, to couple the control terminal to the second assembly load terminal to maintain the power switch in a non-conductive state as taught by Fabro. The motivation for doing so would be to improve the turn off control of the power switch. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMANTHA L FAUBERT whose telephone number is (703)756-1311. The examiner can normally be reached Monday - Friday 8AM - 5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached at 5712701682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. SAMANTHA LYNETTE FAUBERT Examiner Art Unit 2836 /CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838
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Prosecution Timeline

Feb 06, 2024
Application Filed
Nov 13, 2025
Non-Final Rejection — §103, §112
Jan 14, 2026
Response Filed
Mar 16, 2026
Non-Final Rejection — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

2-3
Expected OA Rounds
87%
Grant Probability
79%
With Interview (-7.6%)
2y 7m
Median Time to Grant
Moderate
PTA Risk
Based on 38 resolved cases by this examiner. Grant probability derived from career allow rate.

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