DETAILED ACTION
The instant application having Application No. 18/435422 filed on 02/07/2024 is presented for examination by the examiner.
Claim 1-17 is/are pending in the application.
Claims 1, 9 and 17 is/are independent claims.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
Priority
As required by M.P.E.P. 201.14(c), acknowledgement is made of applicant’s claim for priority based on applications filed on 02/17/2023.
Drawings
The applicant’s drawings submitted are acceptable for examination purposes.
Information Disclosure Statement
As required by M.P.E.P. 609, the applicant’s submissions of the Information Disclosure Statement dated 02/07/2024 is acknowledged by the examiner and the cited references have been considered in the examination of the claims now pending.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Regarding claim 17; claim 17 is rejected under 35 U.S.C. 101 because the claims is directed to non-statutory subject matter. Claim 17 recites “[a] computer-readable recording medium”. Under a recent precedential opinion, the scope of the recited “computer readable recording medium” encompasses transitory media such as signals or carrier waves, where, as here the Specification does not limit the computer readable storage medium to non-transitory forms. See Ex parte Mewherter, 107 USPQ2d 1857, 1862 (PTAB 2013) (precedential) (holding recited machine-readable storage medium ineligible under § 35 U.S.C. 101 since it encompassed transitory media). The Examiner respectfully suggests that the claim be amended to either “A non-transitory computer-readable storage medium” or “a computer-readable storage device” to make the claim statutory under 35 USC 101; (emphasis added).
Claims 1-16, the claims are within at least one of the four categories of patent eligible subject matter as it is directing to a method/neural network accelerator claims under Step 1. However, claim 1-17 are/is rejected under 35 USC 101 because the claims are/is directed to an abstract idea without being integrated into a practical application nor being significantly more.
Per claims 1, 9 and 17, the limitations “identifying a first array …”, “identifying a tile distance …”, and “forming a plurality of data tile sets …”, as drafted, recite functions that, under its broadest reasonable interpretation, covers functions that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitation “identifying a first array …”, “identifying a tile distance …”, and “forming a plurality of data tile sets …” as drafted, are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process. The limitations encompass a human mind carrying out the functions through observation, evaluation, judgment and /or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas under Prong 1 Step 2A.
Under Prong 2 Step 2A, this judicial exception is not integrated into a practical application. The claim recites the following additional elements “memory storing ..”, “at least one processor configured …” and “allocating the plurality of data tile sets …” The “memory storing ..”, “at least one processor configured …” are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using a generic computer component, or merely a generic computer or generic computer components to perform the judicial exception. The claim recites the addition element “allocating the plurality of data tile sets …” This limitation is a mere generic transmission and presentation of collected and analyzed data which is considered to be insignificant extra solution activity (MPEP 2106.05(g). Accordingly, the additional elements do not integrate the recited judicial exception into a practical application, and the claim is therefore directed to the judicial exception. See MPEP 2106.05(f).
The claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements are “memory storing ..”, “at least one processor configured …” and “allocating the plurality of data tile sets …” the mere use of generic computer to implement the abstract idea, as discussed above, which does not amount to significantly more, thus, not an inventive concept, and the courts have identified gathering data, storing data, and outputting the result is well-understood, routine and conventional activity (Berkheimer v. HP, Inc., 881 F.3d 1360, 1368, 125 USPQ2d 1649, 1654 (Fed. Cir. 2018)), thus, cannot amount to an inventive concept.. Accordingly, the claim does not appear to be patent eligible under 35 USC 101. See MPEP 2106.05(d).
Regarding claims 2 and 10, under prong 2, the “wherein the unfolded input tensor is a two-dimensional tensor obtained …” limitations are additional elements that recite insignificant extra solution activity which do not amount to a practical application, nor amount to significantly more under step 2B as explained above.
Regarding claims 3 and 11, the limitation “wherein the identifying of the tile distance includes identifying the tile distance by a value obtained by dividing a second value …” is an additional metal process under prong 1.
Regarding claims 4 and 12, the limitation “identifying a plurality of second arrays of the plurality of data tiles by grouping data tiles spaced apart from the first array by the tile distance” and “forming the plurality of data tile sets by grouping data tiles included in each of the plurality of second arrays.” are an additional metal process under prong 1.
Regarding claims 5 and 13, the limitation “wherein the identifying of the plurality of data tile sets includes forming a plurality of data tile sets by grouping adjacent data tiles …” is an additional metal process under prong 1.
Regarding claims 6 and 14, the limitation “identifying a plurality of second arrays of the plurality of data tiles by grouping data tiles spaced apart from the first array by the tile distance” and “forming the plurality of data tile sets by grouping data tiles included in each of the plurality of second arrays.” are an additional metal process under prong 1.
Regarding claims 8 and 16, the limitation “wherein the preset number is determined based on a number of data tiles capable of being simultaneously allocated to each of the plurality of components.” is an additional metal process under prong 1.
Allowable Subject Matter
Claims 3, 6-7, 11, and 14-15 would be allowable if rewritten to overcome the 101 rejection(s), set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following prior art made of record and not relied upon is cited to establish the level of skill in the applicant’s art and those arts considered reasonably pertinent to applicant’s disclosure. See MPEP 707.05(c).
Prior arts:
US 2023/0266968 to Ware
FIG. 7 illustrates an exemplary vector-matrix multiply operation parallel-processed within an array of broadcast-data TPUs. In this case, the filter weight matrix includes 512 rows and 512 columns of filter weights (2.sup.18 filter weight values) to be convolved with an input tensor having a 512-element sub-tensor data depth (i.e., K=512, L=512).
US 2022/0343145 to Xue
Embodiments described in this specification take advantage of this fact by preprocessing the input graph 301 into a plurality of tiles with different levels of sparsity (i.e., the number of non-zero values). These tiles may then be assigned to different hardware architectures for parallelly performing the matrix computations in training or inferencing.
US 2021/0021790 to Singh
A second property of the preferred pattern of FIG. 8 is that it has the maximum distance between the closest pair of tiles of the same color among all possible patterns containing equal number of red and blue tiles, twice as many green tiles as red tiles and twice as many panchromatic tiles as green tiles. This property of evenly distributing tiles of each color helps minimize aliasing and the resulting moire and false color artifacts.
US 2019/0057281 to Francos
determining a distance between a subspace which is spanned by the defined vectors of the respective first image tile and a subspace which is spanned by the defined vectors of the corresponding second image tile; for each of the first image tiles, responsive to the determined distances and a distance rule, determining whether the respective first image tile and its corresponding second image tile comprise observations of the same portion; and outputting an indication of the portions determination.
US 2015/0178982 to Farrell
In one exemplary embodiment the source data group is an 8.times.8 tile of adjacent pixels (i.e., a 64 pixel square). Within the exemplary xy plane illustrated in FIG. 4, the scene geometry includes a polygon 410 partially occluding polygon 405.
US 2011/0274349 to Kalevo
The maximum number Mmax of columns of a filter array FA1 may be determined e.g. by dividing the width w3 of the perimeter PRM of a filter array FA1 by the horizontal distance w1 between the centers of pixels P1 of the input image IMG1, and by rounding the result upwards or downwards to an integer value. The maximum number Nmax of rows of a filter array FA1 may be determined respectively.
US 2009/0171994 to Sprangle
For example, a processor may construct cells for partitioning the processing of a larger array of data, such as, set of data elements 210. The processor may process adjacent or overlapping groups 216 of data elements (e.g., 4.times.4 pixel tiles in an image).
The prior art of record does not disclose and/or fairly suggest at least claimed limitations recited in such manners in dependent claims 3, 6-7, 11 and 14-15.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1, 4, 9, 12 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0050717 to Temam et al. (hereafter “Temam”) and US 2022/0139072 to Klaiman et al. (hereafter “Klaiman”)
As per claim 1, Temam discloses a scheduling method of a neural network accelerator (paragraphs 0026-0027 and 0090), the scheduling method comprising:
identifying a first array of a plurality of data tiles (FIGs. 1-2; paragraphs 0032-0033 and 0037: “For a given tensor construct, a compute tile may require access to an element of a particular tensor to execute a plurality of dot product computations associated with the tensor. Computation occurs when an input activation provided by a narrow memory structure is multiplied with a parameter or weight provided by a wide memory structure. Because the tensor is stored in a memory, a set of tensor indices may require translation to a set of memory addresses. In general, a tensor traversal unit of a compute tile executes control operations that provide the index of each dimension associated with the tensor and order in which index elements are traversed to perform computations. Tensor computations end when multiplication results are written to an output bus and stored in memory.” [Wingdings font/0xE0] index elements (data tile as claimed) arrange by rows and columns (data array as claimed) of an object/tensor/array assigned to collection of tiles) constituting an unfolded input tensor obtained by unfolding an input tensor (FIGs. 1-2; paragraphs 0032-0033 and 0037: “instructions attempt to access registers that reside in the same physical banks in the same cycle, resulting in a bank access conflict. For example, assuming the register file organization depicted in FIG. 2, the following instruction V0=V1+V9 includes two operands in the same physical bank. In this case, both of the register V1 and V9 reside in bank B 220B. Consequently, accesses to the registers V1 and V9 must be serialized. This serialization of accesses increases the execution latency of the instruction.”) to perform a convolution operation (paragraphs 0096-0097) by using a general matrix multiplication (GEMM) operation (FIGs. 1-2; paragraphs 0032 and 0056-0057: dot/multiplying operation on the object/tensor/data array);
forming a plurality of data tile sets by grouping the plurality of data tiles (paragraphs 0033, 0036, 0054, 0070 and 0082: tile/cells are grouped into first set, second set …); and
allocating the plurality of data tile sets to a plurality of components that process the general matrix multiplication operation (FIGs. 1-2; paragraphs 0032 and 0056-0057: dot/multiplying operation on the object/tensor/data array) in parallel (paragraphs 0069-0070 and 0086).
Temam does not explicitly disclose identifying a tile distance indicating a distance between a pair of data tiles with highest data similarity among the plurality of data tiles in the first array; and grouping the plurality of data tiles based on the tile distance.
Klaiman further discloses identifying a tile distance indicating a distance between a pair of data tiles (FIG. 1; blocks 102 and 106) with highest data similarity among the plurality of data tiles in the first array (FIGs. 3A-3B; paragraph 0010-0011 and 0107: “The method comprises receiving a plurality of digital images, wherein each received image depicts a tissue sample; splitting each of the received images into a plurality of tiles; automatically generating tile pairs, wherein each tile pair has assigned a label being indicative of the degree of similarity of two tissue patterns depicted in the two tiles of the pair, wherein the degree of similarity is computed as a function of the spatial proximity of the two tiles in the pair, wherein the distance positively correlates with dissimilarity “ and “selecting a plurality of pairs of tiles and automatically assigning a label to each pair. The label is an indicator of the degree of similarity of the two tissue patterns depicted by the two tiles of the pair. The label is automatically computed as a function of the spatial distance of the two tiles of the pair (and hence, implicitly, as a function of the distance of the two tissue regions depicted by the two tiles of the pair).”)); and
grouping the plurality of data tiles based on the tile distance (FIGs. 3A-3B; paragraphs 0020-0021, 0034 and 0107).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Klaiman into Temam’s teaching because it would provide for the purpose of automatically generating tile pairs, wherein each tile pair has assigned a label being indicative of the degree of similarity of two tissue patterns depicted in the two tiles of the pair, wherein the degree of similarity is computed as a function of the spatial proximity of the two tiles in the pair, wherein the distance positively correlates with dissimilarity; training a machine learning module (MLM) using the labeled tile pairs as training data to generate a trained MLM. The trained MLM is adapted for performing an image analysis of digital histopathology images (Klaiman, paragraph 0010).
As per claim 4, Temam discloses wherein the forming of the plurality of data tile sets tiles (paragraphs 0033, 0036, 0054, 0070 and 0082: tile/cells are grouped into first set, second set …)
Temam does not explicitly disclose identifying a plurality of second arrays of the plurality of data tiles by grouping data tiles spaced apart from the first array by the tile distance (FIGs. 3A-3B; paragraphs 0020-0021, 0034 and 0107); and
forming the plurality of data tile sets by grouping data tiles included in each of the plurality of second arrays (FIGs. 3A-3B; paragraphs 0020-0021, 0034 and 0107).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Klaiman into Temam’s teaching because it would provide for the purpose of automatically generating tile pairs, wherein each tile pair has assigned a label being indicative of the degree of similarity of two tissue patterns depicted in the two tiles of the pair, wherein the degree of similarity is computed as a function of the spatial proximity of the two tiles in the pair, wherein the distance positively correlates with dissimilarity; training a machine learning module (MLM) using the labeled tile pairs as training data to generate a trained MLM. The trained MLM is adapted for performing an image analysis of digital histopathology images (Klaiman, paragraph 0010).
As per claim 9, it is a neural network accelerator claim, which recite(s) the same limitations as those of claim 1. Accordingly, claim 9 is rejected for the same reasons as set forth in the rejection of claim 1.
As per claim 12, it is a neural network accelerator claim, which recite(s) the same limitations as those of claim 4. Accordingly, claim 12 is rejected for the same reasons as set forth in the rejection of claim 4.
As per claim 17, it is a medium claim, which recite(s) the same limitations as those of claim 1. Accordingly, claim 17 is rejected for the same reasons as set forth in the rejection of claim 1.
Claims 2 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Temam et al. and Klaiman, as applied to claims 1 and 9, and further in view of US 2018/0365561 to Temam et al. (hereafter “Temman ‘561”)
As per claim 2, Temmam discloses wherein the unfolded input tensor is a multi-dimensional tensor obtained based on arranging a plurality of elements of the input tensor (paragraphs 0032, 0056 and 0064), on which element-by-element multiplication is performed at each step of the convolution operation (paragraphs 0032, 0056 and 0064), as elements of each row of the unfolded input tensor (paragraph 0032 and 0075).
Temam does not explicitly disclose a multi dimension tensor is 2-D tensor.
Temam ‘561 further discloses a multi dimension tensor is 2-D tensor (paragraph 0036).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Temam ‘561 into Temam’s teaching and Klaiman’s teaching because it would provide for the purpose of Performing iterations of a second nested loop that is nested within the first nested loop based until a first loop bound for the second nested loop is reached can include performing each iteration of the second nested loop in parallel using the computing units (Temam ‘561, paragraph 0007).
As per claim 10, it is a neural network accelerator claim, which recite(s) the same limitations as those of claim 2. Accordingly, claim 10 is rejected for the same reasons as set forth in the rejection of claim 2.
Claims 5 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Temam et al. and Klaiman, as applied to claims 1 and 4 and 12, and further in view of US 2020/0258292 to Rangananthan et al. (hereafter “Ranganathan”)
As per claim 5, Temam does not explicitly disclose wherein the identifying of the plurality of data tile sets includes forming a plurality of data tile sets by grouping adjacent data tiles in each of the plurality of second arrays by a preset number for each group.
Rangananthan further discloses wherein the identifying of the plurality of data tile sets includes forming a plurality of data tile sets by grouping adjacent data tiles in each of the plurality of second arrays by a preset number for each group (paragraph 0157: “The source data group is associated with an x,y address and is of a known size. Embodiments herein are not limited with respect to the size of the source data group, which may be dependent on a rasterization rate, etc. In one exemplary embodiment the source data group is an 8×8 tile of adjacent pixels (i.e., a 64 pixel square).”).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Ranganathan into Temam’s teaching and Klaiman’s teaching because it would provide for the purpose of o send data between different threads executing on the graphics core array (Ranganathan, paragraph 0059).
As per claim 13, it is a neural network accelerator claim, which recite(s) the same limitations as those of claim 5. Accordingly, claim 13 is rejected for the same reasons as set forth in the rejection of claim 5.
Claims 8 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Temam, Klaiman, and Ranganathan, as applied to claims 5 and 13, and further in view of US 2017/0178386 to Redshaw et al. (hereafter “Redshaw”)
As per claim 8, Temam does not explicitly disclose wherein the preset number is determined based on a number of data tiles capable of being simultaneously allocated to each of the plurality of components.
Redshaw further discloses wherein the preset number is determined based on a number of data tiles capable of being simultaneously allocated to each of the plurality of components (paragraph 0053: “in one allocation process an equal number of tiles from the block may be allocated to each of the processing engines 216. The block of tiles comprises a plurality of groups of spatially adjacent tiles to be allocated to different sets of processing engines coupled to respective cache subsystems 220. For example, FIG. 5 shows a block of tiles 500. The block of tiles 500 is a 4×4 block of tiles.”).
It would have been obvious to a person having ordinary skill in the art before the effective filling date of the claimed invention to combine a teaching of Redshaw into Temam’s teaching, Klaiman’s teaching, and Ranganathan’s teaching because it would provide for the purpose of one or more allocation modes to allocate tiles to the processing engines, wherein the one or more allocation modes include a spatial allocation mode in which groups of spatially adjacent tiles are allocated to the processing engines according to a spatial allocation scheme, said spatial allocation scheme ensuring that each of said groups of spatially adjacent tiles is allocated to a set of processing engines which are coupled to the same cache subsystem (Redshaw, paragraph 0009).
As per claim 16, it is a neural network accelerator claim, which recite(s) the same limitations as those of claim 8. Accordingly, claim 16 is rejected for the same reasons as set forth in the rejection of claim 8.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Tuan Dao whose telephone number is (571) 270 3387. The examiner can normally be reached on Monday to Friday from 09am to 05pm. The examiner can also be reached on alternate Fridays.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Pierre Vital, can be reached at telephone number (571) 272 4215. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TUAN C DAO/ Primary Examiner, Art Unit 2198
Prosecution Insights