DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendments
Applicant’s amendment filed 06/24/2026 has been considered and entered.
The objection to the drawings set forth in the office action received 04/23/2026 is withdrawn in view of the applicant’s arguments.
The objection to the claims set forth in the office action received 04/23/2026 is withdrawn in view of the applicant’s arguments.
Response to Arguments
The applicant’s arguments filed 06/24/2026 have been fully considered but are moot in view of modified grounds for rejection. Limitations including the amended limitations presented in the claims filed 06/24/2026 are now disclosed by Li (US 20230087809 A1) (See the 35 USC 102/103 sections of this office action).
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4, 7-8, 12-15, and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Li (US 20230087809 A1).
With regards to claim 1, Li discloses a chip, comprising:
a substrate including an active device in the substrate (Figs1a/Active device 202 and substrate [124, 127, and 104-1]);
a first optical waveguide on the substrate (Fig1a/First optical waveguide 110);
a second optical waveguide on the first optical waveguide and extending from the first optical waveguide through back-end-of-line (BEOL) layers of the chip (Fig1a/Second optical waveguide [140 and 137]);
a grating coupler in an active device layer of the substrate and between the first optical waveguide and the second optical waveguide (Paragraph 54/Lines 30-34); and
a waveguide photo detector (PD) on the first optical waveguide and communicably coupled to the active device through the BEOL layers of the chip (Fig1a/PD 108).
With regards to claim 2, Li discloses the chip of claim 1, in which the active device is coupled to the waveguide PD through the BEOL layers to integrate an electric signal path of the active device with the first optical waveguide and the second optical waveguide (Fig1a).
With regards to claim 3, Li discloses the chip of claim 1, in which the second optical waveguide is in an active device layer of the substrate and the waveguide PD is directly on the first optical waveguide (Fig1a/Active layer [104-1).
With regards to claim 4, Li discloses the chip of claim 3, in which the active device layer comprises a silicon-on-insulator (SOI) layer (Paragraph 59/Lines 14-20).
With regards to claim 7, Li discloses the chip of claim 1, further comprising a metal communicably coupled between the first optical waveguide and the second optical waveguide (Fig1a/Metal 130; Paragraph 54/Lines 25-27 [interface indicated by the arrow below]).
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With regards to claim 8, Li discloses the chip of claim 1, further comprising a fiber optic cable coupled to the second optical waveguide (Fig1a; Paragraph 55/Lines 9-15).
With regards to claim 12, Li discloses a method of fabricating a chip, comprising:
forming an active device in a substrate (Figs1a/Active device 202 and substrate [124, 127, and 104-1]);
forming a first optical waveguide on the substrate (Fig1a/First optical waveguide 110);
forming a second optical waveguide on the first optical waveguide, in which the second optical waveguide extends from the first optical waveguide through back-end-of-line (BEOL) layers of the chip (Fig1a/Second optical waveguide [140 and 137]);
forming a grating coupler in an active device layer of the substrate and between the first optical waveguide and the second optical waveguide (Paragraph 54/Lines 30-34); and
forming a waveguide photo detector (PD) on the first optical waveguide and communicably coupled to the active device through the BEOL layers of the chip (Fig1a/PD 108).
With regards to claim 13, Li discloses the method of claim 12, in which the active device is coupled to the waveguide PD through the BEOL layers to integrate an electric signal path of the active device with the first optical waveguide and the second optical waveguide (Fig1a).
With regards to claim 14, Li discloses the method of claim 12, in which the second optical waveguide is in an active device layer of the substrate and the waveguide PD is directly on the first optical waveguide (Fig1a/Active layer [104-1).
With regards to claim 15, Li discloses the method of claim 14, in which the active device layer comprises a silicon-on-insulator (SOI) layer (Paragraph 59/Lines 14-20).
With regards to claim 18, Li discloses the method of claim 12, further comprising forming a metal communicably coupled between the first optical waveguide and the second optical waveguide (Fig1a/Metal 130; Paragraph 54/Lines 25-27 [interface indicated by the arrow below]).
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With regards to claim 19, Li discloses the method of claim 12, further comprising a fiber optic cable coupled to the second optical waveguide (Fig1a; Paragraph 55/Lines 9-15).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 6, 10-11, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Li (US 20230087809 A1).
With regards to claim 6, Li discloses the chip of claim 1. Li does not explicitly state that the chip further comprises an airgap communicably coupled between the first optical waveguide and the second optical waveguide, but does disclose that elements 137 and/or 140 can comprise “…any suitable optical structures for propagating optical signals…” (Paragraph 54/Lines 45-52), and airgaps are known to be suitable for propagating optical signals (See HIS US 20200319405 A1 as an example). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select as airgap as an optical structure since doing so would facilitate compatibility with wide spectral ranges and power handling.
With regards to claims 10 and 11, Li is silent regarding whether or not the waveguides both comprise silicon nitride. However, Li does disclose the second waveguide as comprising silicon nitride. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select silicon nitride as the waveguide material for the first waveguide since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of obvious design choice (In re Leshin, 125 USPQ 416).
With regards to claim 17, Li discloses the method of claim 12. Li does not explicitly state that the chip further comprises an airgap communicably coupled between the first optical waveguide and the second optical waveguide, but does disclose that elements 137 and/or 140 can comprise “…any suitable optical structures for propagating optical signals…” (Paragraph 54/Lines 45-52), and airgaps are known to be suitable for propagating optical signals (See HIS US 20200319405 A1 as an example). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select an airgap as an optical structure since doing so would facilitate compatibility with wide spectral ranges and power handling.
Claims 5 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Li (US 20230087809 A1) as applied to claims 1 and 12 above respectively, in view of Furuyama (US 20190123231 A1).
With regards to claim 5, Li discloses the chip of claim 1, but is silent regarding whether or not the waveguide PD comprises a multiple quantum well (MQW) PD. However, the practice of incorporating a MQW within a PD exists in the art as exemplified by Furuyama.
Li discloses an optoelectronic chip inclusive of a PD. Furuyama discloses an optoelectronic chip inclusive of a MQW PD (Furuyama/Paragraph 93/MQW 44). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include a MQW within the PD of Li as suggested by Furuyama since doing so would facilitate wavelength selection and access to superior operating speeds.
With regards to claim 16, Li discloses the method of claim 12, but is silent regarding whether or not the waveguide PD comprises a multiple quantum well (MQW) PD. However, the practice of incorporating a MQW within a PD exists in the art as exemplified by Furuyama.
Li discloses an optoelectronic chip inclusive of a PD. Furuyama discloses an optoelectronic chip inclusive of a MQW PD (Furuyama/Paragraph 93/MQW 44). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include a MQW within the PD of Li as suggested by Furuyama since doing so would facilitate wavelength selection and access to superior operating speeds.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Marc E Manheim whose telephone number is (703)756-1873. The examiner can normally be reached 6:30am - 5pm E.T., Monday - Tuesday and Thursday - Friday.
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/MARC E MANHEIM/Examiner, Art Unit 2874
/THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874