DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
Claims 1-3 and 17 are pending in the application and are currently being examined. Claims 4-1 have been withdrawn per the 8/3/2026 restriction election (see below).
Election/Restrictions
Claim 4-1 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 8/3/2026.
Examiner notes that Applicant indicated claims 1-3 and 17-19 in their election. However, claims 18 and 19 are dependent upon non-elected claim 13. Non-elected claim 13 appears to be drawn to non-elected Species K. To avoid issues related to new matter or issues related to the drawings, claims 18 and 19 are hereby also withdrawn from further consideration.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 2/12/2024 is being considered by the examiner.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-3 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Young et al. (KR 2019/0112523 A, hereafter Young) in view of Machuca (US 2018/0158672 A1).
Regarding claim 1, Fig. 1 of Young teaches a semiconductor device comprising:
a substrate (110, page 18 of provided translation);
a first gallium nitride layer (120, page 18 of provided translation) arranged above the [substrate (110)] and having a first conductive type (page 18 states layer 120 can be n-type);
a second gallium nitride layer (130, page 18 of provided translation) arranged above the first gallium nitride layer (120), connected to the first gallium nitride layer (they are in direct contact), having higher conductive property (as 130 can be p-type it has more p-type impurities than layer 120, a form of a conductive property) than the first gallium nitride layer (120), including a source-side (150, page 18 of provided translation) second gallium nitride layer (130 located below 150) and a drain-side (160, page 18 of provided translation) second gallium nitride layer (130 below 160) facing each other, and having a second conductive type (page 18 states 130 can be p-type);
a gate electrode (180, page 18 of provided translation) facing the first gallium nitride layer (120); and
a gate insulating layer (170, page 18 of provided translation) between the first gallium nitride layer (120) and the gate electrode (170),
wherein the gate insulating layer (170) is positioned between the source-side second gallium nitride layer (130 located below 150) and the drain-side second gallium nitride layer (130 located below 160) in a cross-sectional view.
Young is silent on the substrate being an amorphous glass substrate and an oriented metal layer arranged above the amorphous glass substrate and having a crystal orientation, also the first gallium nitride layer arranged above the oriented metal layer.
However, Machuca teaches a process of utilizing a glass isolation layer (103, [0024]) prior to applying a seed layer (105, [0024]) and crystal matching layer (107, [0024]) layer for growing the GaN semiconductor layer (111, [0030]). The glass isolation film is utilized to prevent undesired crystal growth in the upper layers [0023]. The seed layer and crystal matching layer can both comprise titanium, making them metal layers (105 has Ti in [0024], 107 comprises at least Ti in [0026]). The metal layers are used to enable film growth in the GaN layer 111 [0017]. Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Young by replacing the substrate of Young with the combination of the isolation layer, seed layer, and crystal match layer of Machuca to grow a GaN layer with less regard to the selection of lower layers, as Machuca teaches in the Abstract.
Regarding claim 2, Young in view of Machuca teach the semiconductor device according to claim 1,
wherein a distance from a top surface of the amorphous glass substrate (layer 103 of Machuca, [0024]) to a top surface of the gate insulating layer (170 of Young, page 18 of provided translation) is smaller than a distance from the top surface of the amorphous glass substrate (103 of Machuca) to a top surface of the second gallium nitride layer (130 of Young, page 18 of provided translation) in a cross-sectional view. (Please note the distance is taken in reference to substrate 110 of Young in annotated Fig. 1 of Young).
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Regarding claim 3, Young in view of Machuca teach the semiconductor device according to claim 1, wherein
the first gallium nitride layer (120 of Young, page 18 of provided translation) is in contact with the oriented metal layer (105 and 107 of Machuca, [0024], the first gallium nitride layer is grown on the metal layer), and
the second gallium nitride layer (130 of Young, page 18 of provided translation) and the gate insulating layer (170 of Young, page 18 of provided translation) are in contact with the first gallium nitride layer (120).
Regarding claim 17, Young in view of Machuca teach the semiconductor device according to claim 1, wherein
the oriented metal layer (105 and 107 of Machuca, [0024]) has a (0001) plane in a hexagonal close-packed structure or a (111) plane in a face-centered cubic structure. Machuca describes layer seed 105 is grown in the (0001) direction in [0024].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMMANTHA K SALAZ whose telephone number is (571)272-2484. The examiner can normally be reached Monday - Friday 8:00am-5:00pm.
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/SAMMANTHA K SALAZ/Examiner, Art Unit 2892
/ERIC W JONES/Primary Examiner, Art Unit 2892
