Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment
The amendments filed on 02/13/2026 have been fully considered and are made of record.
Claims 1-2, 10, 13 have been amended.
Response to Arguments
Regarding 101 rejection, applicant's arguments filed 02/13/2026 have been fully considered and are persuasive. Therefore the rejection sent on Office Action mailed on 11142025 is withdrawn.
Regarding 102 rejection, applicant argued with respect to claim(s) 1 “, Obaldia does not disclose wherein the sampling circuit is configured to produce a plurality of samples based on the first output signal; and a reference circuit coupled to the sampling circuit, wherein the reference circuit is configured to: determine whether to adjust the reference signal based on the plurality of samples, responsive to a determination to adjust the reference signal, determine an amount of adjustment based on the plurality of samples and adjust the reference signal based on the amount of adjustment”. Examiner respectfully disagrees.
Obaldia discloses sampling circuit 42/48, 50 produces plurality of samples at node 46, 52 and output node of 50. Reference circuit 40 determines based on these plurality of samples amount of adjustments. For example if output at 52 is pass or fail then controller controls the adjustments of reference circuit 40 in Fig. 2.
Therefore Obaldia discloses wherein the sampling circuit is configured to produce a plurality of samples based on the first output signal; and a reference circuit coupled to the sampling circuit, wherein the reference circuit is configured to: determine whether to adjust the reference signal based on the plurality of samples, responsive to a determination to adjust the reference signal, determine an amount of adjustment based on the plurality of samples and adjust the reference signal based on the amount of adjustment.
Therefore applicant’s arguments are not persuasive.
Therefore the rejection stands.
Applicant’s arguments filed on 02/13/2026 with respect to claim 13 have been fully considered but are moot because new ground(s) of ejection has been applied to amended limitations.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,933,823 B1. Although the claims at issue are not identical, they are not patentably distinct from each other because:
Claim 1 of instant application
Claim 1 of US Patent
A device comprising:
A device to compare voltages, the device comprising:
a comparator having a first input configured to receive an input signal,
analog comparator circuitry having a first input configured to couple to an input voltage
a second input configured to receive a reference signal, and
a second input configured to couple to a reference voltage,
an output configured to generate a first output signal based on a difference between the input signal and the reference signal;
the analog comparator circuitry configured to output a digital value corresponding to a difference between the input voltage and the reference voltage;
a sampling circuit coupled to the comparator, wherein the sampling circuit is configured to produce a plurality of samples based on the first output signal; and
output sampler circuitry configured to: produce a plurality of samples of the difference;
a reference circuit coupled to the sampling circuit, wherein the reference circuit is configured to:
reference adaption circuitry configured to:
determine whether to adjust the reference signal based on the plurality of samples, responsive to a determination to adjust the reference signal,
determine, based on the count, whether to adjust the reference voltage; responsive to a determination to adjust the reference voltage,
determine an amount of adjustment based on the plurality of samples,
determine, based on the count, an amount of adjustment;
and adjust the reference signal based on the amount of adjustment,
responsive to a determination to adjust the reference voltage,
and responsive to a determination to not adjust the reference signal, provide an indication of the reference signal.
responsive to a determination not to adjust the reference voltage, provide an indication of the reference voltage to processor circuitry.
Similarly Claims 2, 13 and 15 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 3, 10 and 12 of U.S. Patent No. 11,933,823 B1 respectively.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1 is rejected under 35 U.S.C. 102(a1) as being anticipated by Obaldia et al. (Pub NO. US 2004/0148121 A1; hereinafter Obaldia).
Regarding Claim 1, Obaldia teaches a device (device in Fig. 2 and Fig. below; See [0027]-[0038]) comprising:
a comparator (comparator 36 n Fig. 2 and Fig. below; See [0027]-[0038]) having a first input (first input is positive input of comparator 36 in Fig. 2 and Fig. below; See [0027]-[0038]) configured to receive an input signal (See Fig. 2 and Fig. below),
a second input (negative input of comparator 36 is second input in Fig. 2 and Fig. below; See [0027]-[0038]) configured to receive a reference signal (See Fig. 2 and Fig. below; See [0027]-[0038]), and
an output configured to generate a first output signal based on a difference between the input signal and the reference signal (comparator 36’s output is first output and is generated based in the difference between positive and negative input in Fig. 2 and Fig. below; See [0027]-[0038]);
a sampling circuit (42/52/50 in Fig. 2 and Fig. below; See [0027]-[0038]) coupled to the comparator, wherein the sampling circuit is configured to produce a plurality of samples based on the first output signal (sampling circuit 42/52/50 samples plurality of nodes at 46, 52 and 50 based on first output of 36 in Fig. 2 and Fig. below; See [0027]-[0038]); and
a reference circuit (40 in Fig. 2 and Fig. below; See [0027]-[0038]) coupled to the sampling circuit, wherein the reference circuit is configured to: determine whether to adjust the reference signal based on the plurality of samples (reference circuit 40 adjusts the reference based on samples of 42/52/50 in Fig. 2 and Fig. below; See [0027]-[0038]), responsive to a determination to adjust the reference signal, determine an amount of adjustment based on the plurality of samples (See [0027]-[0038]), and
adjust the reference signal based on the amount of adjustment (40 adjusts the signal based on determined amount of adjustment of 50 in Fig. 2 and Fig. below; See [0027]-[0038]), and responsive to a determination to not adjust the reference signal, provide an indication of the reference signal (threshold or reference voltage is adjusted based on the transition and therefore it is interpreted that not to adjust threshold/reference via software based on transition and indication of the reference signal is provided; See [0030]).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-3 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Obaldia in view of Vihriala et al. (Pub NO. US 2018/0309604 A1; hereinafter Vihriala).
Regarding Claim 2, Obaldia teaches the device of claim 1. Obaldia is silent about wherein to determine whether to adjust the reference signal, the reference circuit is configured to determine whether to adjust the reference signal based on a number of the plurality of samples corresponding to the input signal being greater than the reference signal.
Vihriala teaches wherein to determine whether to adjust the reference signal the reference circuit is configured to determine whether to adjust the reference signal based on a number of the plurality of samples corresponding to the input signal being greater than the reference signal (See [0072]).
Therefore it would have been obvious to one of ordinary skill n the art before the claimed invention was made to modify the system of Obaldia to determine whether to adjust the reference signal the reference circuit is configured to determine whether to adjust the reference signal based on a number of the plurality of samples corresponding to the input signal being greater than the reference signal, as taught by Vihriala in order to determine the number of samples (Vihriala; [0072]).
Regarding Claim 3, Obaldia teaches the device of claim 1, wherein the sampling circuit comprises: a digital sampler configured to produce the plurality of samples based on the first output signal ();
Obaldia is silent about a counter configured to count a number of samples of the plurality of samples being at a first state to generate a first count value.
Vihriala teaches a counter configured to count a number of samples of the plurality of samples being at a first state to generate a first count value (counting the number of samples and the number of samples being greater than given limit is first state and first count value; See [0072]).
Therefore it would have been obvious to one of ordinary skill n the art before the claimed invention was made to modify the system of Obaldia by using a counter configured to count a number of samples of the plurality of samples being at a first state to generate a first count value, as taught by Vihriala in order to determine the number of samples (Vihriala; [0072]).
Regarding Claim 5, Obaldia in view of Vihriala teaches the device of claim 3. Vihriala further teaches wherein to determine whether to adjust the reference signal, the reference circuit is configured to determine whether the first count value is greater than a first threshold (first count value greater than given limit is first threshold; See [0072]), or less than a second threshold.
Claim(s) 12 is rejected under 35 U.S.C. 103 as being unpatentable over Obaldia in view of NAKAJIMA et al. (Pub NO. US 2017/0310326 A1; hereinafter Nakajima).
Regarding Claim 12, Obaldia teaches the device of claim 1. Obaldia is silent about wherein providing the indication of the reference signal comprises providing the indication of the reference signal to a processor, and wherein the processor is configured to detect an anomaly associated with the input signal based on the indication.
Nakajima teaches wherein providing the indication of the reference signal comprises providing the indication of the reference signal to a processor, and wherein the processor is configured to detect an anomaly associated with the input signal based on the indication (See abstract).
Therefore it would have been obvious to one of ordinary skill in the art before the claimed invention was made to modify the system of Obaldia by providing the indication of the reference signal comprises providing the indication of the reference signal to a processor, and wherein the processor is configured to detect an anomaly associated with the input signal based on the indication, as taught by Nakajima in order to determine abnormality (Nakajima; abstract).
Claim(s) 13-19 are rejected under 35 U.S.C. 103 as being unpatentable over Obaldia in view of Hong et al. (Patent NO. US 7,852,028 B1; hereinafter Hong).
Regarding Claim 13, Obaldia teaches a device (device in Fig. 1) comprising:
a first circuit (first circuit 36 in Fig. 2; See [0023]-[0041]) configured to:
receive an input signal (36 receives input signal from 30 in Fig. 2; See [0023]-[0041]),
generate a first output signal based on the input signal and a reference signal (36 generates output signal based on input signal from 30 and reference signal from 40 in Fig. 2; See [0023]-[0041]),
update the reference signal based on the first output signal (40 updates reference signal changes based on output of first circuit 36 in Fig. 2; See page 3; See [0023]-[0041]), and
provide an indication of the reference signal to a processor (52 provides indication of reference signal to processor 50 in Fig. 2; See [0023]-[0041]); and
wherein the processor is configured to detect an anomaly associated with the input signal based on the indication and the counter value (processor determines change of reference based on indication 52 and indication at 52 depends on counter value at 46 in fig. 2; See [0023]-[0041]).
Obaldia is silent about a time to digital converter (TDC) coupled to the first circuit, wherein the TDC comprises a counter, wherein the counter is configured to increment a counter value responsive to a determination that the first output signal is at a first state.
Hong teaches a time to digital converter (TDC) (420 in Fig. 4; Col. 5, Lines 20-60) coupled to the first circuit, wherein the TDC comprises a counter, wherein the counter is configured to increment a counter value responsive to a determination that the first output signal is at a first state (based on comparator 125 output, counter 423’s value is incremented in Fig. 4; Col. 5, Lines 20-60).
Therefore it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the system of Obaldia by using a time to digital converter (TDC) coupled to the first circuit, wherein the TDC comprises a counter, wherein the counter is configured to increment a counter value responsive to a determination that the first output signal is at a first state, as taught by Hong in order to minimize size (Hong; Col. 5, Lines 20-25).
Regarding Claim 14, Obaldia in view of Hong teaches the device of claim 13. Obaldia further teaches wherein the first circuit comprises a comparator configured to cause the first output signal to be at the first state when the input signal is greater than the reference signal, and to be at a second state when the input signal is lower than the reference signal (See [0023]-[0041]).
Regarding Claim 15, Obaldia in view of Hong teaches the device of claim 13. Hong further teaches further comprising a switch (switch 126 in Fig. 4) having an input configured to receive the first output signal (input of switch 126 is coupled to comparator 125 in Fig. 4), and an output coupled to the TDC (output of switch 126 is coupled to TDC 423 in Fig. 4).
Regarding Claim 16, Obaldia in view of Hong teaches the device of claim 13. Obaldia further teaches further comprising a second circuit (44 in fig. 2) configured to: identify a range in which the counter value is contained (pass/fail generated by 48 based on range of 28 identified by 44 in Fig. 2; See [0023]-[0041]), wherein the processor is configured to detect the anomaly based on the identified range (anomaly is pass/fail is detected based on power range of 28 in fig. 2; See [0023]-[0041]).
Regarding Claim 17, Obaldia in view of Hong teaches the device of claim 16. Obaldia further teaches wherein the second circuit is configured to identify the range from a plurality of predetermined ranges, each of the plurality of predetermined ranges including an upper bound value and a lower bound value (See the upper and lower boundary of power amplifier 28 in fig. 2; See [0023]-[0041]).
Regarding Claim 18, Obaldia in view of Hong teaches the device of claim 17. Obaldia further teaches further teaches wherein to identify the range from the plurality of predetermined ranges, the second circuit is configured to compare the counter value to each of the plurality of predetermined ranges (in order to generate pass/fail 48 compares value to plurality of upper ranges and lower ranges in Fig. 2; See [0023]-[0041]).
Regarding Claim 19, Obaldia in view of Hong teaches the device of claim 15. Obaldia further teaches wherein the first circuit is configured to: sample the first output signal a plurality of times during a sample window to generate a plurality of samples (42, 48, 50 generate plurality of samples at plurality of times in Fig. 2; See [0023]-[0041]);
identify a first subset of the plurality of samples corresponding to the first output signal being in the first state (first state is high state in Fig. 1; See [0023]-[0041]); and responsive to a determination that a number of samples in the first subset is within a threshold range (See [0023]-[0041]),
Obaldia is silent about enable the switch.
Hong teaches enable the switch.
Therefore it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention was made to modify the system of Obaldia by enabling the switch, as taught by Hong in order to minimize size (Hong; Col. 5, Lines 20-25).
Allowable Subject Matter
Claims 4 and 6-9 stand rejected under 35 USC 101 as set forth above. No prior art rejection is provided as the prior art taken alone or in combination fails to teach.
Regarding Claim 4, none of the prior art fairly teaches or suggests the device of claim 3, wherein the first state corresponds to a high voltage state of the first output signal, and a second state corresponds to a low voltage state of the first output signal.
Regarding Claim 6, none of the prior art fairly teaches or suggests the device of claim 5, wherein to determine the amount of adjustment, the reference circuit is configured to: responsive to a determination that the first count value is greater than the first threshold, set the amount of adjustment to a first amount; and responsive to a determination that the first count value is lower than the second threshold, set the amount of adjustment to a second amount.
Claims 7-8 depend on claim 6, therefore claims 7-8 also have allowable subject matter.
Regarding Claim 9, none of the prior art fairly teaches or suggests the device of claim 5, wherein the reference circuit is configured to not adjust the reference signal responsive to the first count value being between the first and second thresholds.
Claims 10-11 and 20-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 10, none of the prior art fairly teaches or suggests the device of claim 3, further comprising first and second window comparators, wherein, responsive to a determination not to adjust the reference signal: the first window comparator is configured to determine whether the first count value is within a first window defined by a first threshold value and a second threshold value; and the second window comparator configured to determine whether the first count value is within a second window defined by a third threshold value and a fourth threshold value.
Claims 11 depend on claim 10, therefore claim 11 also have allowable subject matter.
Regarding Claim 20, none of the prior art fairly teaches or suggests the device of claim 13, wherein, to update the reference signal, the first circuit is configured to: sample the first output signal a plurality of times during a sample window to generate a plurality of samples; identify a first subset of the plurality of samples corresponding to the first output signal being in the first state; responsive to a determination that a number of samples in the first subset is above a first threshold, adjust the reference signal by a first amount; and responsive to a determination that the number of samples in the first subset is below a second threshold, adjust the reference signal by a second amount.
Claims 21 depend on claim 20, therefore claim 21 also have allowable subject matter.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ZANNATUL FERDOUS whose telephone number is (571)270-0399. The examiner can normally be reached Monday through Friday 8am to 5pm (PST).
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/ZANNATUL FERDOUS/Examiner, Art Unit 2858 /LEE E RODAK/Supervisory Patent Examiner, Art Unit 2858