DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant' s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “METHOD OF PROTECTING THE PERFORMING OF A CRYPTOGRAPHIC OPERATION AGAINST SIDE CHANNEL ATTACKS BY SELECTING A VALUE AMONGST TWO VALUES”
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked.
As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph:
(A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function;
(B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and
(C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function.
Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function.
Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function.
Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are:
A computer system for performing a cryptographic operation, as seen in claims 1 and 8, invokes 112(f). However, Examiner could not find sufficient structure for “computer system” in the specification or drawings. Examiner finds the function supported by the computer system, wherein the computer system comprises a processing circuit (e.g., [0094]). However, performing cryptographic operations is not a coextensive feature of a “processing circuit” (see MPEP 2181(II)(B)). Therefore, “processing circuit” cannot be used as sufficient structure to perform the recited function mentioned above. For the purposes of prior art examination, Examiner is interpreting the limitation as any circuit that performs the recited function. Examiner makes the recommendation of changing “computer system” to “cryptographic processor” to avoid the 112(f) interpretation of the limitation.
Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-11 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claims 1 and 8, As described below in the 112(b) rejection, the disclosure does not provide adequate structure to perform the claimed functions for the ”performing a cryptographic operation.” The application does not demonstrate that the applicant has made an invention that achieves the claimed functions because the invention is not described with sufficient detail such that one of ordinary skill in the art can reasonably conclude that the inventor had possession of the claimed invention.
Claims 2-7 and 9-11 are rejected for inheriting the rejection of claims 1 and 8, respectively.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-11 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 1 and 8, the claim limitation “computer system” invokes 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. However, the written description fails to disclose the corresponding structure, material, or acts for performing the entire claimed function and to clearly link the structure, material, or acts to the function. The specification is devoid of adequate structure to perform the claimed function. In particular, the specification states that the claimed function of “performing a cryptographic operation” is done by a “computer system.” The use of the term “computer system” is not adequate structure for performing the claimed functions mentioned previously because it does not describe a particular structure for performing the function. The specification does not provide sufficient details such that one of ordinary skill in the art would understand which structure would perform the claimed function. Therefore, the claims are indefinite and are rejected under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph.
Claims 2-7 and 9-11 are rejected for inheriting the rejection of claims 1 and 8, respectively.
Applicant may:
(a) Amend the claim so that the claim limitation will no longer be interpreted as a limitation under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph;
(b) Amend the written description of the specification such that it expressly recites what structure, material, or acts perform the entire claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(c) Amend the written description of the specification such that it clearly links the structure, material, or acts disclosed therein to the function recited in the claim, without introducing any new matter (35 U.S.C. 132(a)).
If applicant is of the opinion that the written description of the specification already implicitly or inherently discloses the corresponding structure, material, or acts and clearly links them to the function so that one of ordinary skill in the art would recognize what structure, material, or acts perform the claimed function, applicant should clarify the record by either:
(a) Amending the written description of the specification such that it expressly recites the corresponding structure, material, or acts for performing the claimed function and clearly links or associates the structure, material, or acts to the claimed function, without introducing any new matter (35 U.S.C. 132(a)); or
(b) Stating on the record what the corresponding structure, material, or acts, which are implicitly or inherently set forth in the written description of the specification, perform the claimed function. For more information, see 37 CFR 1.75(d) and MPEP §§ 608.01(o) and 2181.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-22 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Claims 1, 8, 12, and 19 recite a method, a non-transitory computer-readable medium, a system, and a device. Thus, each of the claims fall under one of the four statutory categories.
Under Prong One of Step 2A of the 2019 Revised Patent Subject Matter Eligibility Guidance (“2019 PEG”), claim 1 recites “performing a cryptographic operation… by selecting a value amongst two values based on a selection bit”, “concatenating the two values… to generate a concatenated word including the two values in two distinct portions of the concatenated word”, “rotating the concatenated word according to a value of the selection bit to position the selected value in a determined portion of the concatenated word… amongst said two portions”, “suppressing an unselected value of the two values in the concatenated word”, and “performing one or more processing operations based on a result of the cryptographic operation”. Such limitations cover mental processes that are concepts performed in the human mind or with pen and paper (including an observation, evaluation, judgement, or opinion). The process can be done mentally by concatenating two values together, rotating the concatenated values in a certain way depending on if the bit is “1” or “0”, then suppressing the unselected value by writing out the selected value as the result of the operation. Therefore, the claim includes limitations that fall within the “mental processes” grouping of abstract ideas. Accordingly, the claim recites an abstract idea.
Under Prong Two of Step 2A, this judicial exception is not integrated into a practical application. The elements “register” and “computer system” are recited at a high level of generality, i.e., reciting generic computer components, which amount to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The element “protecting the performing of the cryptographic operation against side channel attacks” does no more than generally link the use of the judicial exception to a particular technological environment or field of use (see MPEP 2106.05(h)). Thus, the elements fail to integrate the judicial exception into a practical application.
Under Step 2B, the claim does not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed previously with respect to Step 2A Prong Two, the elements amount to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)) or does no more than generally link the use of the judicial exception to a particular technological environment or field of use (see MPEP 2106.05(h)). Accordingly, this claim is not patent-eligible under 35 U.S.C. 101.
Regarding claim 2, the claim recites “suppressing of the unselected value of the two values in the concatenated word comprises shifting the concatenated word”. Such limitation further covers mental processes that are concepts performed in the human mind or with pen and paper (including an observation, evaluation, judgement, or opinion). The claim additionally recites “the register”, which amounts to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The claim fails to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claim is not patent-eligible.
Regarding claim 3, the claim recites “a first value of the two values is represented by a 16-bit word”, “a second value of the two values is represented by a 16-bit word”, “the concatenated word is a 32-bit word”. Such elements amount to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The claim additionally recites “a first value… stored in a first 32-bit register”, “a second value… stored in a second register”, and “the concatenated word… stored in the first register”. Such elements are considered to be an insignificant step of storing data in memory (see MPEP 2106.05(d)(II)(iv), Storing and retrieving information in memory), and is deemed to be considered well-understood, conventional, and routine by the courts (MPEP 2106.05(d); See Storing and retrieving information in memory, Versata Dev. Group, Inc. v. SAP Am., Inc., 793 F.3d 1306, 1334, 115 USPQ2d 1681, 1701 (Fed. Cir. 2015); OIP Techs., 788 F.3d at 1363, 115 USPQ2d at 1092-93). The claim fails to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claim is not patent-eligible.
Regarding claim 4, the claim recites “a first rotation of the concatenated word by a determined number M of bits, M being different from 0 and from a multiple of 16” and “a second rotation of the concatenated word by a number of bits based on the selection bit”. Such limitations further cover mental processes that are concepts performed in the human mind or with pen and paper (including an observation, evaluation, judgement, or opinion). The claim fails to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claim is not patent-eligible.
Regarding claim 5, the claim recites “performing an OR logic function between the value of the selection bit and a value equal to 0xN0000000 where N is between 1 and F in a hexadecimal system and is defined with respect to the determined number M of bits for the first rotation” and “rotating a result of the OR logic function by 28 bits”. Such limitations further covers mental processes that are concepts performed in the human mind or with pen and paper (including an observation, evaluation, judgement, or opinion). The claim fails to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claim is not patent-eligible.
Regarding claim 6, the claim recites “the one or more processing operations comprises generating one or more control signals based on the result of the cryptographic operation”. The element amounts to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). For example, after a completion of an operation, at least one control signal will be produced to indicate the completion. The claim fails to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claim is not patent-eligible.
Regarding claim 7, the claim recites “the one or more operations comprises an authentication operation”. Such limitation further covers mental processes that are concepts performed in the human mind or with pen and paper (including an observation, evaluation, judgement, or opinion). Given that the one or more operations are related to hiding a cryptographic key (see [003]), one of those operations would be to authenticate the given cryptographic key. The operation to authenticate can be seen as a mental process. The claim fails to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claim is not patent-eligible.
Regarding claim 8-10, the claims are mostly rejected for the same reasons as claims 1-3, respectively. Claim 8 additionally recites “a non-transitory computer-readable medium having contents which cause a computer system to perform a method”. Such element amounts to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The claims fail to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claims are not patent-eligible.
Regarding claim 11, the claim recites “the contents comprise instructions executable by the computer system”. Such element amounts to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The claim fails to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claim is not patent-eligible.
Regarding claims 12-17, the claims are mostly rejected for the same reasons as claims 1-6, respectively. The claims additionally recite “a system”, “a plurality of registers” and “processing circuitry coupled to the plurality of registers”. Such elements amount to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The claims fail to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claims are not patent-eligible.
Regarding claim 18, the claim recites “cryptographic circuitry, which, in operation, performs the cryptographic operation” and “control circuitry, which, in operation, generates one or more control signals based on a result of the cryptographic operation”. Such element amounts to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The claims fail to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claims are not patent-eligible.
Regarding claims 19-22, the claims are mostly rejected for the same reasons as claims 1-4, respectively. The claims additionally recite “a device”, “a plurality of registers” and “cryptographic circuitry coupled to the plurality of registers”. Such elements amount to no more than mere instructions to apply the exception using generic computer elements (see MPEP 2106.05(f)). The claims fail to provide an element that would integrate the judicial exception into a practical application under Step 2A Prong Two and does not amount to anything significantly more under Step 2B. Accordingly, the claims are not patent-eligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 6-9, 11-13, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Bocchi (US 20210306134 A1, see IDS filed February 12 2024) in view of Sebot et al. (US 20030131030 A1) and Felixcloutier (SAL/SAR/SHL/SHR — Shift).
Regarding claim 12, Bocchi teaches a system (Fig. 1 and [0010]: Processing circuitry 10), comprising:
a plurality of registers (Fig. 1 and [0010]: Controller 11 contains registers that stores data from RAM 13); and
processing circuitry coupled to the plurality of registers (Fig. 1 and [0011]: Processing circuitry 10 has controller 11, which has registers to store data), wherein the processing circuitry, in operation:
performs a cryptographic operation ([0051, 0091]: The processing circuitry is able to perform a cryptographic operation between a first operand and a second operand using the bits of a secret key by first generating a temporary variable), and
performs one or more processing operations based on a result of the cryptographic operation ([0094]: The performed operations are further included as part of a conditional copy procedure. The conditional copy procedure containing one or more processing operations done between two operands).
Bocchi does not teach protecting the performing of the cryptographic operation against side channel attacks by selecting a value amongst two values based on a selection bit, selecting the value including: concatenating the two values in a register of the plurality of registers, generating a concatenated word including the two values in two distinct portions of the concatenated word in the register, rotating the concatenated word according to the value of the selection bit to position the selected value in a determined portion of the concatenated word in the register amongst said two portions, and suppressing the unselected value in the concatenated word.
Note that the operations taught in Bocchi does not indicate how the operands (a and b in Fig. 2) are selected prior to the conditional copy operations. Therefore, a teaching of selecting a value amongst two values based on a selection bit for each operand would be protecting the cryptographic operations.
Sebot teaches to concatenate two values in a register, generating a concatenated word including the two values in two distinct portions of the concatenated word in the register (Fig. 16A and [0114]: Operands 1102 and 1104 are concatenated into one value and placed in a temp register, where operand 1102 is placed in the MSB portion and operand 1104 is placed in the LSB portion of the register).
It would have been obvious to one of ordinary skill in the art before the effective filing date to have combined the teachings of Bocchi with the teachings of Sebot to have concatenated two values into a concatenated word. During the process of selecting operands for later operations, one of ordinary skill would realize that obfuscating the selection of operations would provide better security against side-channel attacks, for instance. Therefore, by combining two different operands into a concatenated word prior to selecting, it provides an opportunity for one of ordinary skill to perform one or more operations to further obfuscate the values into something that may be incoherent to an adversary.
Bocchi, in view of Sebot, still does not teach to rotate the concatenated word according to the value of the selection bit to position the selected value in a determined portion of the concatenated word in the register amongst said two portions and suppress the unselected value in the concatenated word.
Note that the circuitry of Sebot teaches a concatenation followed by a shift (rotate) and have the result stored in an output register (see Fig. 16A and [0113-0115]).
Felixcloutier teaches to rotate a word according to a value of a selection bit to position a selected value in a determined portion of the word amongst said two portions and suppress an unselected value of the two values in the concatenated word (Felixcloutier: Both SHL and SHR share the same opcode, with the difference that the SHL instruction has the ModR/M byte as 0x4 (0100), whereas the SHR instruction has the ModR/M byte as 0x5 (0101). The LSB bit is the indicator on what direction of shift (a type of rotation) is to occur and is therefore a selection bit. A value may be suppressed by shifting towards the unselected value of the two values in the register, leaving the selected value in the register).
It would have been obvious to one of ordinary skill in the art before the effective filing date to have combined the teachings of Bocchi, in view of Sebot, with the teachings of Felixcloutier to have selected a value by rotating the word to suppress the unselected value. One of ordinary skill would recognize that selecting a value via masking the value provides an opportunity to an adversary to identify a potential pattern between the mask value and the value that is used to set the mask value. Therefore, one of ordinary skill would be motivated to find alternative methods to select a value, such as selecting a value from a register by shifting the values in a direction such that the suppressed value is “taken off” the concatenated word, leaving the unsuppressed value as the value left in the register. This method of selecting a value in a register does not provide a clear pattern and in turn, provides better security against an adversary.
Regarding claim 13, Bocchi, in view of Sebot and Felixcloutier, teaches the system according to claim 12, wherein the suppressing of the unselected value of the two values in the concatenated word comprises shifting the concatenated word in the register (see claim 12 rejection above).
Regarding claim 17, Bocchi, in view of Sebot and Felixcloutier, teaches the system according to claim 12, wherein the one or more processing operations comprises generating one or more control signals based on the result of the cryptographic operation (Bocchi, Fig. 2 and [0150-0166]: Once operands a and b have been selected (by our current embodiment), the operands are used to perform an operation (C1) and results in a “tmp” variable. The “tmp” variable as a control signal since it needs to indicate the circuitry to perform S3 that “tmp” is valid).
Regarding claim 18, Bocchi, in view of Sebot and Felixcloutier, teaches the system of claim 17, wherein the processing circuitry comprises:
cryptographic circuitry, which, in operation, performs the cryptographic operation (Bocchi, Figs. 1 and 2, [0150-0166]: The processing device 10 does the following operations as seen in Fig. 2, which are part of the cryptographic operation. Therefore, the processing device must have cryptographic circuitry); and
control circuitry, which, in operation, generates one or more control signals based on a result of the cryptographic operation (Bocchi, Figs. 1 and 2, [0150-0166]: The processing device 10 produces the “tmp” output. Therefore, the processing device must have control circuitry to produce the output).
Regarding claims 1-2 and 6, the claim recites a method similar to the system of claims 12 and 17, respectively. Therefore the claims are rejected on the same premises.
Regarding claim 7, Bocchi, in view of Sebot and Felixcloutier, teaches the method according to claim 1, wherein the one or more processing operations comprises an authentication operation (Bocchi, [0190-0192]: The conditional copy operation checks a flag to indicate that a copy is to occur. The check of the flag is an authentication operation as it authenticates that the flag is set before performing the copy, otherwise it does not perform the copy).
Regarding claim 8, Bocchi, in view of Sebot and Felixcloutier, teaches a non-transitory computer-readable medium having contents which cause a computer system to perform a method (Bocchi, see [0052, 0103]). The rest of the claim recites a non-transitory computer-readable medium similar to the system of claim 12. Therefore the claim is rejected on the same premises.
Regarding claim 9, the claim recites a non-transitory computer-readable medium similar to the system of claim 13. Therefore, the claim is rejected on the same premises.
Regarding claim 11, Bocchi, in view of Sebot and Felixcloutier, teaches the non-transitory computer-readable medium of claim 8, wherein the contents comprise instructions executable by the computer system (Bocchi, see [0052, 0103]).
Regarding claims 19-20, the claims recite a device similar to the system of claims 12-13. Therefore the claims are rejected on the same premises.
Claims 3, 10, 14, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Bocchi (US 20210306134 A1, see IDS filed February 12 2024) in view of Sebot et al. (US 20030131030 A1), Felixcloutier (SAL/SAR/SHL/SHR — Shift) and Ould-Ahmed-Vall et al. (US 20160188327 A1).
Regarding claim 14, Bocchi, in view of Sebot and Felixcloutier, teaches the system according to claim 12, wherein a first value of the two values is represented by a 16-bit word stored in a first 64-bit register of the plurality of registers (Sebot, Fig. 16A and [0114]: The first two elements of operand 1 1102 (J and I) is a 16-bit subset of the first value stored in a 64-bit register storing operand 1. The register storing operand 1 as the first register), a second value of the two values is represented by a 16-bit word stored in a second register of the plurality of registers (Sebot, Fig. 16A and [0114]: The last two elements of operand 2 1104 (H and G) is a 16-bit subset of the second value stored in a 64-bit register storing operand 2. The register storing operand 2 as the second register), and the concatenated word is a 128-bit word stored in a temp register (Fig. 16A and [0114]: The values of operands 1 and 2 are concatenated and stored in a temp register).
Bocchi, in view of Sebot and Felixcloutier, does not teach that the 16-bit word is stored in a first 32-bit register and that the concatenated word is a 32-bit word stored in the first register.
Note that the circuitry in Bocchi uses 32-bit registers (see Table 1 and [0150-0166], where the data stored in the registers are 32-bit long).
It would have been obvious to one of ordinary skill in the art before the effective filing date to have modified Bocchi, in view of Sebot and Felixcloutier, such that the first value is stored in a 32-bit register. One of ordinary skill in the art would appreciate using a smaller sized register as it provides a faster register access time and lower power consumption compared to a larger register size.
Bocchi, as modified and in view of Sebot and Felixcloutier, still does not teach that the concatenated word is a 32-bit word stored in the first register.
Note that the first value and second value have been indicated to be 16-bit values and the limitation indicates that the first register is both a source and destination register.
Ould-Ahmed-Vall teaches the use of a source register as a destination register after an operation ([0146]: “In some implementations, the storage location referenced by SRC1 is also used to store the result and is referred to as SRC1/DEST”).
It would have been obvious to one of ordinary skill in the art before the effective filing date to have combined the teachings of Bocchi, as modified and in view of Sebot and Felixcloutier, to have used the first register as a source register to store the first value and a destination register containing the concatenated value. Using a source register as a destination register would reduce register usage, which may be appreciated by one of ordinary skill in the art. This is especially true in cryptography as using less registers would make it harder for an adversary to identify what’s occurring within a computer.
Regarding claim 3, the claim recites a method similar to the system of claim 14. Therefore, the claim is rejected on the same premises.
Regarding claim 10, the claim recites a non-transitory computer-readable medium similar to the system of claim 14. Therefore, the claim is rejected on the same premises.
Regarding claim 21, the claim recites a device similar to the system of claim 14. Therefore, the claim is rejected on the same premises.
Response to Arguments/Amendments
Applicant’s amendments, filed February 5, 2026, with respect to the specification objections raised by the Examiner have been fully addressed. Therefore, the specification objections have been withdrawn.
Applicant’s amendments, filed February 5, 2026, with respect to the claim objections raised by the Examiner have been fully addressed. Therefore, the claim objections have been withdrawn.
Applicant’s amendments, filed February 5, 2026, with respect to the 112b rejections raised by the Examiner have been partially addressed. The rejection of claims 1-22 under 112(b) for antecedent basis issues have been withdrawn, but the 112(b) issues with respect to the written description issues will be maintained.
Applicant's arguments, on page 10, paragraph 6, to page 11, paragraph 1, filed February 5 2026, with respect to the 112(f) interpretation have been fully considered but they are not persuasive.
Regarding arguments on page 10, paragraph 1, to page 11, paragraph 1, Applicant argues that the amended claims now recite “computer system”, which does not invoke 112(f).
Examiner respectfully disagrees with this argument. The term “computer system” is a nonce term, similar to “processing device”. The term itself does not provide sufficient structure such that one of ordinary skill would understand its structure without looking into the specification. Therefore, invocation of 112(f) is appropriate. Examiner has provided a recommendation in the “Claim Interpretation” section to avoid invoking 112(f). Therefore, the argument regarding that the claim element does not invoke 112(f) is considered not persuasive.
Applicant's arguments, on page 11, paragraph 3, to page 15, paragraph 1, filed February 5 2026, with respect to claims 1-22 rejected under 35 U.S.C. 101 have been fully considered but they are not persuasive.
Regarding arguments on page 14, second-to-last paragraph, Applicant argues that the claims are directed to an improvement to the technical field of protecting cryptographic operation rounds against side-channel attacks and do not merely recite a desired output.
Examiner respectfully disagrees with this argument. For reference, MPEP 2106.05(a) states that "It is important to note, the judicial exception alone cannot provide the improvement. The improvement can be provided by one or more additional elements." and "it is important to keep in mind that an improvement in the abstract idea itself (e.g. a recited fundamental economic concept) is not an improvement in technology". The “improvement” in which Applicant cites is not provided by any additional elements, both alone and in combination, as the additional elements amount to no more than mere instructions to apply the exception using generic computer elements (MPEP 2106.05(f)) or generally link the exception to a particular technological environment or field of use (MPEP 2106.05(h)). As it stands, only the abstract idea provides the improvement. Therefore, the argument regarding that the claims are directed to an improvement is considered not persuasive.
Regarding arguments on page 14, last paragraph, Applicant argues that the claimed subject matter does not correspond to a monopoly on the concept of protecting cryptographic operations because there are other ways to protect rounds of cryptographic operations.
Examiner notes that the purpose of patent subject matter eligibility is to prevent the monopolization of abstract ideas (see MPEP 2106(I), third paragraph), not the monopolization of the concept of protecting cryptographic operations or other technological fields.
The rejection of claims 1-22 under 35 U.S.C. 101 will be maintained.
Applicant's arguments, on page 15, paragraph 2, to page 16, last paragraph, filed February 5 2026, with respect to claims 1-3, 6-14, and 17-21 rejected under 35 U.S.C. 103 have been fully considered but they are not persuasive.
Regarding arguments on page 16, paragraph 1, Applicant argues that Felixcloutier merely indicates a direction of shift, and does not indicate how to perform the rotation to place a selected value in a determined portion of a register.
Examiner respectfully disagrees with this argument. In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., how to perform the rotation) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Applicant does not indicate in the claims how the data is rotated other than indicating that the rotation is to be performed based on a value. Examiner will note that claim 4 (and related claims) does provide further details of the rotation and therefore would support Applicant’s argument if the limitations in those claims were added to the independent claims. Therefore, the argument regarding that the prior art does not indicate how to perform the rotation is considered not persuasive.
Regarding arguments on page 16, paragraph 2, Applicant argues that the use of Sebot and Felixcloutier are directed to obtaining a desired output and not directed to selecting one of the two concatenated values based on a selection bit for use in a cryptographic operation.
Examiner respectfully disagrees with this argument. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). In this instance, Bocchi is used as the main reference to describe a cryptographic operation and both Sebot and Felixcloutier are used to describe a concatenation, rotation, and suppression of the values used in the operation. Therefore, the argument regarding that Sebot and Felixcloutier are directed to obtaining a desired output and not directed to selecting one of the two concatenated values based on a selection bit for use in a cryptographic operation is considered not persuasive.
Regarding arguments on page 16, paragraph 2, Applicant further argues that the references combined would require further modifications which would not have been obvious to one of ordinary skill in the art.
Examiner respectfully disagrees with this argument. In response to applicant’s argument that there is no teaching, suggestion, or motivation to combine the references, the Examiner recognizes that obviousness may be established by combining or modifying the teachings of the prior art to produce the claimed invention where there is some teaching, suggestion, or motivation to do so found either in the references themselves or in the knowledge generally available to one of ordinary skill in the art. See In re Fine, 837 F.2d 1071, 5 USPQ2d 1596 (Fed. Cir. 1988), In re Jones, 958 F.2d 347, 21 USPQ2d 1941 (Fed. Cir. 1992), and KSR International Co. v. Teleflex, Inc., 550 U.S. 398, 82 USPQ2d 1385 (2007). In this case, the motivation to combine both Sebot and Felixcloutier can be found in the knowledge available to one of ordinary skill in the art where obfuscating data/operations (also known as steganography) is sought after in the field of cryptography to prevent adversaries to analyze cryptographic data and/or operations. Therefore, the argument regarding that references combined would require further modifications which would not have been obvious to one of ordinary skill in the art is considered not persuasive.
The rejection of claims 1-3, 6-10, 11-14, and 17-21 under 35 U.S.C. 103 will be maintained.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/E.A./Examiner, Art Unit 2183
/David J. Huisman/Primary Examiner, Art Unit 2183
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