Prosecution Insights
Last updated: July 17, 2026
Application No. 18/439,321

EFFICIENT PACKET DELIMITER (EPD) CONFIGURATION IDENTIFIER FOR MOBILE INDUSTRY PROCESSOR INTERFACE (MIPI) CAMERA SERIAL INTERFACE 2 (CSI-2)

Non-Final OA §103
Filed
Feb 12, 2024
Examiner
BARKER, TODD L
Art Unit
2449
Tech Center
2400 — Computer Networks
Assignee
Qualcomm Incorporated
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
291 granted / 385 resolved
+17.6% vs TC avg
Strong +23% interview lift
Without
With
+23.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
33 currently pending
Career history
432
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
83.3%
+43.3% vs TC avg
§102
3.9%
-36.1% vs TC avg
§112
5.8%
-34.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 385 resolved cases

Office Action

§103
CTNF 18/439,321 CTNF 91741 Detailed Action 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. The Office Action is in response to claims filed on 4/e30/2026 where claim 1-7 are pending and ready for examination. Claims 8-30 have been withdrawn based on a Restriction/Election requirement provided on 3/2/2026. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim 1 is rejected under 35 USC 103 as being unpatentable over Kannan (US 2024/0236011) in view of Leabman (US 20230355113) Regarding claim 1, Kannan discloses an apparatus comprising: an interpacket gap (IPG) calculator configured to compute a plurality of IPG running average values (Kannan; se e.g. [0058] “Referring to FIG. 6, at operation 601, GW1 classifies the received packet into a traffic class c. For example, traffic class c could be class 1 for batch processing or class 2 for latency sensitive, depicted in FIG. 5. At operation 602, GW1 calculates an average inter-packet gap g.sub.c in the traffic class c. The inter-packet gap g.sub.c can be predefined in advance, or determined based on historical data for the traffic class c. The inter-packet gap g.sub.c can be determined using the exponential weighted moving average (EWMA). The inter-packet gap g.sub.c is how long to wait to receive the next packet in the same traffic class c before GW1 forwards the sub-aggregated packet to the final gateway GW3” ) ; and an interpacket gap (IPG) configuration parameter calculator unit coupled to the IPC calculator, the IPG configuration parameter calculator unit configured to use the plurality of IPG running average values to calculate one or more IPG statistics (Kannan; Per Kannan’s teachings, one of ordinary skill in the art tasked with network traffic and management would recognize that a dynamically calculated running average (such as the EWMA) is not computed merely as a static data point or stored passively within a network monitoring architecture. Rather, in the field of network engineering, a running average servers as a foundation al baseline intentionally generated to enable further mathematical characterization of the data stream. Specifically, one of ordinary skill in the art would be motivated to configure the processing unit to calculate additional statistical properties (e.g. standard deviation, variance, or threshold boundaries ) from the running average to identify traffic volatility, packet bursts, and/or network jitter. Deriving secondary statistical metrics from an established running average dataset represents the application of standard mathematical methodologies to achieve completely predictable results. As such, the claimed configuration parameter calculator unit represents nothing more than a routine design choice within the ordinary skill of a practitioner in the art.) As evidence of the rationale above, Leabman discloses: running average values to calculate statistics (Leabman; Leabman teaches a processing engine naturally derives statistics from running average values; see e.g. [0202] “... derive a statistic or statistics from the raw data such as a standard deviation, a moving average, and a moving mean ...”) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Leabman’s statistic scheme, the motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies for determining inter-packet gap processing. Moreover, one of ordinary skill in the art would be motivated to configure the processing unit to realize a reduction in data overhead, dynamic resource allocation, and enhanced predictive traffic shaping. Combining a historical moving average with active statistical variance profiling gives the system predictive foresight into incoming traffic patterns, allowing the hardware to optimize inter-packet spacing proactively rather than reactively . 07-21-aia AIA Claim 2 i s re jected under 35 USC 103 as being unpatentable over Ka nnan in view of Leabman and in further view of Cam (US 6,671,758) Re garding claim 2. Kannan in view of Leabman disclose the apparatus of claim 1, Kannan does not expressly disclose further comprising a PHY protocol interface (PPI) monitor databus coupled to the interpacket gap (IPG) configuration parameter calculator unit, the PPI monitor databus configured to relay the plurality of IPG running average values and the one or more IPG statistics. Cam discloses: databus configured to relay data ( Cam; Cam teaches a databus configured to exchange data; Claim 25. A method of exchanging data blocks between a link layer device and a PHY across a bus interface having a transmit interface and a receive interface, comprising: a) causing said link layer device to poll said PHY; b) causing said PHY to respond to said link layer device; c) causing said link layer device to select said PHY; d) causing data blocks to be exchanged between said link layer device and said PHY; ) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Cam’s databus. The motivation being the combined solution provides for incorporating a known technique resulting in increased efficiencies in delivering network traffic. Kannan in view of Leabman and in further view of Cam disclose: further comprising a PHY protocol interface (PPI) monitor databus coupled to the interpacket gap (IPG) configuration parameter calculator unit, the PPI monitor databus configured to relay the plurality of IPG running average values and the one or more IPG statistics (The combined solution as one of ordinary skill in the art would provide a hardware path to route metrics to downstream execution elements. Utilizing CAM’s conventional databus architecture—which explicitly exchanges data blocks across a bus to a PHY—to route the data blocks containing the calculated running averages and statistics to the PHY interface represents the predictable deployment of a standard hardware communication path to convey said metrics, achieving entirely expected results) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Leabman’s statistic scheme, the motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies for determining inter-packet gap processing. Moreover, one of ordinary skill in the art would be motivated to configure the processing unit to realize a reduction in data overhead, dynamic resource allocation, and enhanced predictive traffic shaping. Combining a historical moving average with active statistical variance profiling gives the system predictive foresight into incoming traffic patterns, allowing the hardware to optimize inter-packet spacing proactively rather than reactively . 07-21-aia AIA Claim 3 is rejected under 35 USC 103 as being unpatentable over Kannan in view of Leabman and in further view of Cam and in further view of Tummula (US 20220283972) Regarding claim 3 , Kannan in view of Leabman and in further view of Cam disclosed the apparatus of claim 2, further comprising a data transport protocol controller coupled to the PPI monitor databus, the data transport protocol controller configured to receive the plurality of IPG running average values and the one or more IPG statistics (The combined solution incorporates Cam’s architecture, which explicitly utilizes a “link layer device” to exchange data blocks across a bus interface. Under the Broadest Reasonable Interpretation (BRI), Cam’s link layer device is the structural and function equivalent of the claimed “data transport protocol controller”) As evidence of the rationale above Tummala discloses: the data transport protocol controller (Tummala; Under BRI, Tummala’s protocol dependent data link layer circuitry is the data transport protocol controller . Because a data link layer inherently governs the protocols dictating local network data transport, Tummala’s explicit disclosure of protocol dependent link layer circuitry completely satisfies the structural and functional requirements of the claimed data transport protocol; see e.g. [0056] The selected layer may vary dependent on implementation, but in the examples envisaged herein the selected layer is the data link layer, and the gateway component 45 includes upper link layer (ULL) circuitry 47 to implement a first portion of functionality of the data link layer, that first portion comprising at least any protocol dependent functionality of the data link layer. Within the controller 50, lower link layer (LLL) circuitry 52 is then provided that implements the remaining portion of the functionality of the data link layer, where that remaining portion comprises only protocol independent functionality of the selected layer, and hence implements only functionality of the data link layer that is independent of the second communication protocol used within the gateway component 45) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Tummala’s scheme. The motivation being the combined solution provides for one of ordinary skill in the art to implement a known technique resulting in increased efficiencies of managing network traffic. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Leabman’s statistic scheme, the motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies for determining inter-packet gap processing. Moreover, one of ordinary skill in the art would be motivated to configure the processing unit to realize a reduction in data overhead, dynamic resource allocation, and enhanced predictive traffic shaping. Combining a historical moving average with active statistical variance profiling gives the system predictive foresight into incoming traffic patterns, allowing the hardware to optimize inter-packet spacing proactively rather than reactively. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Cam’s databus. The motivation being the combined solution provides for incorporating a known technique resulting in increased efficiencies in delivering network traffic . 07-21-aia AIA Claim s 4 – 6 are rejected under 35 USC 103 as being unpatentable over Kannan in view of Leabman and in further view of Cam and in further view of Tummula (US 20220283972) and in further view of Aweya (US US 20100080248) Regarding claim 4 , Kannan in view of Leabman and in further view of Cam and in further view of Tummula disclose the apparatus of claim 3, Kannan does not expressly disclose wherein the data transport protocol controller is further configured to calculate an efficient packet delimiter (EPD) configuration based on the plurality of IPG running average values and the one or more IPG statistics. However in analogous art Aweya iscloses: an efficient packet delimiter (EPD) configuration (Aweya; [0155] A receiver may consider a MAC inter-packet gap (IPG) to have begun two bytes prior to transmission of the first /I/ ordered-set after the EPD (see FIG. 11. For example, when a packet is terminated by EPD , the /T/R/ code-groups portion of the EPD may occupy part of a region considered to be a MAC IPG.) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Aweya’s EPD configuration. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of managing network traffic. Kannan in view of Leabman and in further view of Cam and in further view of Tummula and in further view of Aweya disclose: the data transport protocol controller is further configured to calculate an efficient packet delimiter (EPD) configuration based on the plurality of IPG running average values and the one or more IPG statistics (The combined solution as it would have been obvious to one of ordinary skill in the art as the design optimization for doing so is explicitly driven by the traffic shaping goals established by Kannan (see e.g. [0058), which monitors the average IPG to handle latency sensitive traffic. Because Aweya establishes that the EPD terminates the packet and directly defines the boundary where the IPG begins, calculating the EPD configuration based on the calculated IPG statistics represents a predicable optimization of network framing metrics to dynamically manage latency) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Tummala’s scheme. The motivation being the combined solution provides for one of ordinary skill in the art to implement a known technique resulting in increased efficiencies of managing network traffic. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Leabman’s statistic scheme, the motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies for determining inter-packet gap processing. Moreover, one of ordinary skill in the art would be motivated to configure the processing unit to realize a reduction in data overhead, dynamic resource allocation, and enhanced predictive traffic shaping. Combining a historical moving average with active statistical variance profiling gives the system predictive foresight into incoming traffic patterns, allowing the hardware to optimize inter-packet spacing proactively rather than reactively. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Cam’s databus. The motivation being the combined solution provides for incorporating a known technique resulting in increased efficiencies in delivering network traffic . Regarding claim 5 , Kannan in view of Leabman and in further view of Cam and in further view of Tummula and in further view of Aweya disclose the apparatus of claim 4, wherein data transport protocol controller is further configured to use the EPD configuration to specify a data transport protocol (The combined solution per Tummula, as Tummula (see e.g. Abstract) explicitly teaches protocol conversion circuitry that divides a layer into protocol independent functionality (lower selected layer circuitry) and protocol dependent functionality (upper selected layer circuitry) to convet messages between “first protocol and a second communication protocol” It would have been obvious to one of ordinary skill in the art to utilize the calculated EPD configuration to specify the data transport protocol within this architecture. Because packet framing boundaries represent protocol independent metrics , the lower selected layer circuitry processes the calculated EFD configuration. This configuration structurally dictates the requirements for the upper layer, which utilizes its protocol-dependent features functionality to select and specify the corresponding first or second protocol Utilizing the formatting constraints of an EPD configuration to specify the data transport protocol represents a predictable application of Tummula’s multi-layered protocol conversion circuitry to automate protocol assignment based on standard structural framing boundaries.) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Tummala’s scheme. The motivation being the combined solution provides for one of ordinary skill in the art to implement a known technique resulting in increased efficiencies of managing network traffic. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Leabman’s statistic scheme, the motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies for determining inter-packet gap processing. Moreover, one of ordinary skill in the art would be motivated to configure the processing unit to realize a reduction in data overhead, dynamic resource allocation, and enhanced predictive traffic shaping. Combining a historical moving average with active statistical variance profiling gives the system predictive foresight into incoming traffic patterns, allowing the hardware to optimize inter-packet spacing proactively rather than reactively. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Cam’s databus. The motivation being the combined solution provides for incorporating a known technique resulting in increased efficiencies in delivering network traffic . Regarding claim 6 , Kannan in view of Leabman and in further view of Cam and in further view of Tummula and in further view of Aweya disclose the apparatus of claim 5, wherein the data transport protocol controller is further configured to generate a high-speed packet data stream using the data transport protocol (The combined solution as generating a high-speed packet data stream using the specified data transport protocol represents a routine design choice and predictable optimization under KSR. One of ordinary skill in the art would understand to configure Tummula’s protocol conversion controller to output the data stream at high speeds to maximize network throughput. Doing so merely requires the system to perform its inherent operational function at standard, optimized performance parameters to satisfy design criteria) The Examiner notes that the phrase “high speed” is a relative functional term of degree that does not introduce a distinct structural limitation or a new patentable mechanism to the controller. Rather, it merely describes the system operating efficiently at standard, optimized performance parameters to maximize network throughput. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Tummala’s scheme. The motivation being the combined solution provides for one of ordinary skill in the art to implement a known technique resulting in increased efficiencies of managing network traffic. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Leabman’s statistic scheme, the motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies for determining inter-packet gap processing. Moreover, one of ordinary skill in the art would be motivated to configure the processing unit to realize a reduction in data overhead, dynamic resource allocation, and enhanced predictive traffic shaping. Combining a historical moving average with active statistical variance profiling gives the system predictive foresight into incoming traffic patterns, allowing the hardware to optimize inter-packet spacing proactively rather than reactively. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Cam’s databus. The motivation being the combined solution provides for incorporating a known technique resulting in increased efficiencies in delivering network traffic . 07-21-aia AIA Claim 7 is rejected under 35 USC 103 as being unpatentable over Kannan in view of Leabman and in further view of Cam and in further view of Tummula and in further view of Aweya and in further view of Takla (US 20180052752) Regarding claim 7 , Kannan in view of Leabman and in further view of Cam and in further view of Tummula and in further view of Aweya disclose The apparatus of claim 6, further comprising an output PHY protocol interface (PPI), the output PPI configured to transport the high-speed packet data stream (The combined solution provides the output PHY protocol interface (PPI) via the interface boundaries of the data transport protocol controller configuration. The combined solution structure this output PPI to connect the data generating circuitry to downstream components , which establishes the physical path required to move data. It would have been obvious to configure this output PPI to transport the high-speed packet data stream because the combined solution already positions the controller to generate the high speed packet data stream, routing that generated stream through the controller’s physical interface represents a predictable design chose to enabled physical layer data transmission) As evidence of the rationale above Takla discloses: Output PHY protocol interface (Takla; Takla confirms that standard physical layer protocol interfaces (D-PHY interface) are structured and configured as a high speed serial interface precisely to interconnect hardware components and transport packet data streams. Therefore, utilizing the output PPI of the combined solution to transport the high speed packet data stream merely represents operating a standard for its intended function to achieve a predictable transmission result. See e.g. [0018] The MIPI differential physical (D-PHY) specification dictates the signaling supported by a MIPI-compliant device. According to the MIPI specification, a MIPI D-PHY interface alternately supports two different modes of operation over a single wire pair: a high-speed (HS) mode involving unidirectional (i.e., transmit (TX) or receive (RX)) differential signaling and a low-power (LP) mode involving bidirectional CMOS signaling. Depending on the particular application, a MIPI-compliant device may use a MIPI D-PHY interface, where a D-PHY interface consists of one clock lane and anywhere from one to four data lanes configured to communicate with another MIPI-compliant device using the same number of lanes.) Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Takla’s element. The motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies of managing network traffic. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Tummala’s scheme. The motivation being the combined solution provides for one of ordinary skill in the art to implement a known technique resulting in increased efficiencies of managing network traffic. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Leabman’s statistic scheme, the motivation being the combined solution provides for implementing a known technique resulting in increased efficiencies for determining inter-packet gap processing. Moreover, one of ordinary skill in the art would be motivated to configure the processing unit to realize a reduction in data overhead, dynamic resource allocation, and enhanced predictive traffic shaping. Combining a historical moving average with active statistical variance profiling gives the system predictive foresight into incoming traffic patterns, allowing the hardware to optimize inter-packet spacing proactively rather than reactively. Therefore it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Cam’s databus. The motivation being the combined solution provides for incorporating a known technique resulting in increased efficiencies in delivering network traffic . Any inquiry concerning this communication or earlier communications from the Examiner should be directed to TODD L. BARKER whose telephone number is (571) 270 0257. The Examiner can normally be reached on Monday through Friday, 7:30am to 5:00pm. If attempts to reach the Examiner by telephone are unsuccessful, the Examiner's supervisor Vivek Srivastava can be reached on (571) 272 7304. /TODD L BARKER/Primary Examiner, Art Unit 2449 Application/Control Number: 18/439,321 Page 2 Art Unit: 2449 Application/Control Number: 18/439,321 Page 3 Art Unit: 2449 Application/Control Number: 18/439,321 Page 4 Art Unit: 2449 Application/Control Number: 18/439,321 Page 5 Art Unit: 2449 Application/Control Number: 18/439,321 Page 6 Art Unit: 2449 Application/Control Number: 18/439,321 Page 7 Art Unit: 2449 Application/Control Number: 18/439,321 Page 8 Art Unit: 2449 Application/Control Number: 18/439,321 Page 9 Art Unit: 2449 Application/Control Number: 18/439,321 Page 10 Art Unit: 2449 Application/Control Number: 18/439,321 Page 11 Art Unit: 2449 Application/Control Number: 18/439,321 Page 12 Art Unit: 2449 Application/Control Number: 18/439,321 Page 13 Art Unit: 2449
Read full office action

Prosecution Timeline

Feb 12, 2024
Application Filed
Nov 12, 2025
Response Filed
Jun 16, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
99%
With Interview (+23.2%)
2y 4m (~0m remaining)
Median Time to Grant
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