Prosecution Insights
Last updated: July 17, 2026
Application No. 18/440,057

IMAGE SENSOR, CONTROL METHOD, CONTROL APPARATUS, ELECTRONIC DEVICE, AND STORAGE MEDIUM

Non-Final OA §112
Filed
Feb 13, 2024
Priority
Aug 25, 2021 — CN 202110983304.4 +1 more
Examiner
CUTLER, ALBERT H
Art Unit
2637
Tech Center
2600 — Communications
Assignee
Vivo Mobile Communication Co., Ltd.
OA Round
3 (Non-Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
826 granted / 1040 resolved
+17.4% vs TC avg
Strong +21% interview lift
Without
With
+21.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
18 currently pending
Career history
1066
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
76.6%
+36.6% vs TC avg
§102
10.7%
-29.3% vs TC avg
§112
4.5%
-35.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1040 resolved cases

Office Action

§112
DETAILED ACTION This office action is responsive to communication filed on March 11, 2026. Claims 1-20 are pending in the application and have been examined by the Examiner. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on February 16, 2026 has been entered. Response to Arguments Applicant’s arguments with respect to claim(s) 1, 8 and 13 have been considered but are moot in view of the new grounds of rejection. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 1 recites a combination of elements. The first element is a pixel array comprising a plurality of pixel circuit groups, wherein each pixel circuit group comprises “one pixel circuit of white pixel and a plurality of pixel circuits of color pixels”, and “the pixel circuit of white pixel is surrounded by the plurality of pixel circuits of color pixel”. This is illustrated in figure 5, which shows a pixel circuit group (702) comprising one white pixel (W) surrounded by a plurality of pixel circuits of color pixels (i.e. R, G, G, and B pixels). Applicant provides an alternate pixel array in figure 10. However, in the pixel array of figure 10, each pixel circuit group (702) comprises multiple white pixels (W), and not “one white pixel” as is required by claim 1. Therefore, claim 1 must be directed toward the embodiment of figure 5 and not the embodiment of figure 10. Claim 1 goes on to recite that “each pixel circuit row of the pixel circuit array shares one control signal line, and each pixel circuit column of the pixel circuit array shares one output signal line”. This is also supported by figure 5, which shows individual rows of pixels having shared control signal lines coming from the pixel control signal generation module (800) and individual columns of pixels having shared output signal lines leading to the pixel output signal processing module (900). Finally, claim 1 recites that “the pixel circuit array comprises at least two pixel circuit rows and at least two pixel circuit columns, the pixel circuit row comprises the pixel circuit of white pixel and the plurality of pixel circuits of color pixels, and the pixel circuit column comprises the pixel circuit of white pixel and the plurality of pixel circuits of color pixels”. Once again, figure 5 shows at least two pixel circuit rows and at least two pixel circuit columns. However, each pixel circuit row only includes one of color pixels (e.g. R and B pixels or R and G pixels) or white pixels (W), and each pixel circuit column only includes one of color pixels (e.g. R and B pixels or R and G pixels) or white pixels (W). There are no pixel rows comprising both white pixels and color pixels, and there are no pixel columns including both white pixels and color pixels. Therefore, claim 1 contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Based upon the combination of elements found therein, claim 1 would require that the pixels (W, R, G, G, B) of each pixel circuit group (702) of figure 5 be found in a same row and in a same column, and that all of these pixels (W, R, G, G, B) share one control signal line and output signal line. Figure 5 does not support this, and the Examiner has been unable to find support for this elsewhere in the original disclosure. For instance, figure 10 shows columns of pixels having both white (W) and color (R or G or B) pixel circuits. However, figure 10 does not provide support for all of the pixels of the group (702) being in a same row and a same column and sharing one column signal line and one output signal line, as is required by claim 1. As such, claim 1 contains new matter for these additional reasons. Claims 2-7 depend from claim 1 and thus contain the same new matter as claim 1. Claims 8 and 13 are each similar in scope and content to claim 1, and are thus rejected for the same reasons provided with respect to claim 1. Claims 9-12 depend from claim 8 and thus contain the same new matter as claim 8. Claims 14-20 depend from other otherwise require all of the limitations of claim 13, and are thus rejected for the same reasons provided with respect to claim 13. Prior Art Consider claims 1, 8 and 13, the prior art of record does not teach nor reasonably suggest an image sensor comprising the combination of: (a) a pixel circuit array, wherein the pixel circuit array comprises a plurality of pixel circuit groups, each pixel circuit group comprises one pixel circuit of white pixel and a plurality of pixel circuits of color pixels, and the pixel circuit of white pixel is surrounded by the plurality of pixel circuits of color pixels, (b) each pixel circuit row of the pixel circuit array shares one control signal line, and each pixel circuit column of the pixel circuit array shares one output signal line, and (c) the pixel circuit array comprises at least two pixel circuit rows and at least two pixel circuit columns, the pixel circuit row comprises the pixel circuit of white pixel and the plurality of pixel circuits of color pixels, and the pixel circuit column comprises the pixel circuit of white pixel and the plurality of pixel circuits of color pixels. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Natori (US 2016/0197108) teaches a pixel array having white pixels surrounded by color pixels (see figure 11). Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALBERT H CUTLER whose telephone number is (571)270-1460. The examiner can normally be reached approximately Mon - Fri 8:00-4:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sinh Tran can be reached at (571)272-7564. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALBERT H CUTLER/Primary Examiner, Art Unit 2637
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Prosecution Timeline

Feb 13, 2024
Application Filed
Sep 08, 2025
Non-Final Rejection mailed — §112
Dec 05, 2025
Response Filed
Dec 18, 2025
Final Rejection mailed — §112
Feb 16, 2026
Response after Non-Final Action
Mar 11, 2026
Request for Continued Examination
Mar 13, 2026
Response after Non-Final Action
May 28, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684208
IMAGING APPARATUS
1y 9m to grant Granted Jul 14, 2026
Patent 12659616
SENSING CIRCUIT COMPENSATION
2y 0m to grant Granted Jun 16, 2026
Patent 12659604
ELECTRONIC DEVICE AND METHOD FOR CONVERTING MEASUREMENT DATA OF MULTISPECTRAL IMAGE SENSOR INTO COLOR SPACE UNDER ARBITRARY CORRELATED COLOR TEMPERATURE
1y 9m to grant Granted Jun 16, 2026
Patent 12647696
PIXEL CIRCUIT SELECTING TO OUTPUT TIME DIFFERENCE DATA OR IMAGE DATA
1y 8m to grant Granted Jun 02, 2026
Patent 12641349
SOLID-STATE IMAGING DEVICE, PACKAGE, AND IMAGING SYSTEM
2y 4m to grant Granted May 26, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+21.0%)
2y 7m (~2m remaining)
Median Time to Grant
High
PTA Risk
Based on 1040 resolved cases by this examiner. Grant probability derived from career allowance rate.

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