Prosecution Insights
Last updated: October 02, 2026
Application No. 18/440,777

INTERCONNECT DEVICE LOAD BALANCING

Final Rejection §103
Filed
Feb 13, 2024
Examiner
MENDAYE, KIDEST H
Art Unit
2457
Tech Center
2400 — Computer Networks
Assignee
Mellanox Technologies Ltd.
OA Round
4 (Final)
81%
Grant Probability
Favorable
5-6
OA Rounds
1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 81% — above average
81%
Career Allowance Rate
299 granted / 369 resolved
+23.0% vs TC avg
Strong +33% interview lift
Without
With
+32.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
13 currently pending
Career history
392
Total Applications
across all art units

Statute-Specific Performance

§101
11.9%
-28.1% vs TC avg
§103
64.9%
+24.9% vs TC avg
§102
7.2%
-32.8% vs TC avg
§112
7.7%
-32.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 369 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detailed Action 2. Claims 1-20 are pending. Response to Argument 3. Applicant's arguments/ amendment filed on 06/16/2026 have been fully considered but are moot in view of new ground(s) of rejection. Claim Rejections - 35 USC § 103 4. In the event the determination of the status of the application as subject to AlA 35 U.S.C. 102 and 103 (or as subject to pre-AlA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 5. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 6. Claim 1,5-6, 10-11, 14 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Gupta (US 20120163175 A1) Gupta et al in view of Matthews et al. (US 12231354 B1) hereinafter Matthews. Regarding claims 1, 11 and 16, Gupta discloses a switch comprising one or more circuits to (see Figs 2-4): determine a rate of change in a number of entries in an ingress queue of the switch exceeds a first threshold rate of change (par. [0033] a detecting operation 604 detects a rate of incoming data flow during communications, monitoring the ingress port for incoming data frames. The controller may measure a quantity of the data frames over time to determine the rate of incoming data frames. [0014] the rate limiting network controller 104 may monitor packet traffic incoming from the network 100 to each of the virtual machines 110 via the ingress port 106 and apply a rate limiting function when the rate at which the ingress port receives data traffic for a particular virtual machine exceeds that virtual machine's maximum incoming frame rate (e.g., exceeds a threshold)); Gupta, discloses based on determining the rate of change in the number of entries in the ingress queue exceeds the first threshold (para. [0020] when the controller 304 detects that the rate of incoming data packets to any one of the virtual machines 309, 310 exceeds the preset maximum frame rate (e.g., an allocated or pre-determined rate threshold) of that virtual machine, the controller 304 may send the unicast congestion message to the source device that is contributing to the overload of the overloaded virtual machine. The unicast congestion message may be sent back through the switches 316, 318, 320 to the source device 314 or any other route through the network 300 that reaches the source device 314. The unicast congestion message instructs the contributing source device 314 to reduce or stop its data packet transmission rate so that the rate of incoming data packets to the overloaded virtual machine decreases). Gupta may not explicitly disclose dynamically adjust a rate at which packets in an egress queue of the switch are processed for egress to limit a rate of change in power consumed by the switch the switch an egress queue are processed for egress. However, Matthews discloses dynamically adjust a rate at which packets in an egress queue of the switch are processed for egress to limit a rate of change in power consumed by the switch the switch an egress queue are processed for egress (col. 2 lines 43-60, the electronic device includes one or more egress packet processors with traffic shapers. Each egress packet processor receives packet data from the traffic managers at a particular traffic rate. Depending on the traffic rate, the corresponding traffic shaper generates a bucket of tokens that are allocated to manage the data rate of the group of egress ports connected to the egress packet processor…. Col 28 lines 35-43, adjustments to the packet processing rate of the electronic device 200, due to a change in the operating state of the device from one ORE to a different ORE, is performed by egress logic, e.g., egress packet processors 208a, 208b and 208c. In some cases, a suitable combination of the traffic shapers 210a, 210b and 210c, and the egress packet processors 208a, 208b and 208c, are configured to adjust the packet processing rate of the electronic device 200 based on the operating state of the device. Col 14 lines 43-67, col 15 lines 1-29, a traffic shaper is dynamically tuned based on one or more parameters. These parameters include, for example, monitored power usage of the electronic device 200, the number of cell drops observed in the electronic device 200 to regulate power consumption by the electronic device 200, total buffer (or buffer partition) usage of the electronic device 200, length of a queue (e.g., in bytes or cells) corresponding to an egress port, maximum delay (e.g., instantaneous or average delay) across a queue or across a subset of queues, or a suitable combination of these parameters. As an example, if the switching activity of the electronic device increases due to receiving data at high rates, thereby leading to increased power consumption, then the number of tokens that are generated by a traffic shaper for admitting cells is dynamically adjusted to limit the increase in power consumption by the device) Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the teaching of Gupta and include dynamically adjust a rate at which packets in an egress queue of the switch are processed for egress to limit a rate of change in power consumed by the switch the switch an egress queue are processed for egress using the teaching of Matthews. The motivation for doing so would have been to reduce packet and cell processing rates, the electronic device limits data transit, thereby lowering its maximum current. Regarding claims 5, 14 and 17, claim 1 is incorporated. Gupta may not explicitly disclose wherein dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress comprises controlling an increase in an amount of power consumed by the switch. However, Matthews discloses wherein dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress comprises controlling an increase in an amount of power consumed by the switch (col.14 lines 43-67, a traffic shaper is dynamically tuned based on one or more parameters. These parameters include, for example, monitored power usage of the electronic device 200, the number of cell drops observed in the electronic device 200 to regulate power consumption by the electronic device 200, total buffer (or buffer partition) usage of the electronic device 200, length of a queue (e.g., in bytes or cells) corresponding to an egress port, maximum delay (e.g., instantaneous or average delay) across a queue or across a subset of queues, or a suitable combination of these parameters. As an example, if the switching activity of the electronic device increases due to receiving data at high rates, thereby leading to increased power consumption, then the number of tokens that are generated by a traffic shaper for admitting cells is dynamically adjusted to limit the increase in power consumption by the device. In some implementations, the token generation rate by a traffic shaper, e.g. traffic shaper 210a, is reduced. This results in limiting the number of cells that are admitted for switching by the corresponding ingress arbiter, e.g., ingress arbiter 203a, leading to a reduction in power consumption). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the teaching of Gupta and include wherein dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress comprises controlling an increase in an amount of power consumed by the switch using the teaching of Matthews. The motivation for doing so would have been in order to avoid situations where the packet processing rate and/or the cell processing rate of a large number of electronic devices are adjusted at the same time, or nearly the same time. By lowering the packet processing rate and/or cell processing rate, the electronic device limits the amount of data transiting the device, which reduces the maximum device current. Regarding claim 6, claim 5 is incorporated. Matthews further discloses wherein the increase in the amount of power consumed by the switch is delayed (col. 11 lines 36-45, each traffic manager independently determines whether to delay reading of the state information received from the crossbar 104, such that all traffic managers read the information at the same time and thereby compute the total amount of data in synchronization. As described above, different traffic managers may delay reading the information by different time periods. In the example above, traffic manager 106a delays reading the information by a longer time period compared to the traffic manager 106b, since traffic manager 106a receives the information from the crossbar 104 earlier compared to traffic manager 106b. Col. 14 lines 43-67, if the switching activity of the electronic device increases due to receiving data at high rates, thereby leading to increased power consumption, then the number of tokens that are generated by a traffic shaper for admitting cells is dynamically adjusted to limit the increase in power consumption by the device. In some implementations, the token generation rate by a traffic shaper, e.g. traffic shaper 210a, is reduced. This results in limiting the number of cells that are admitted for switching by the corresponding ingress arbiter, e.g., ingress arbiter 203a, leading to a reduction in power consumption. Dynamically managing the token generation by a traffic shaper can be achieved by adjusting the refresh time interval for the traffic shaper to refill its bucket. The refresh time interval can be increased so that the traffic shaper refills its bucket of tokens at a slower rate and thus decreasing the rate at which its tokens are available for admitting cells). Regarding claim 10, claim 1 is incorporated. Gupta further discloses wherein each entry in the ingress queue represents a respective packet of a plurality of packets to be transmitted from the switch (para. [0015] figs 2-4, data packets inbound to the destination device 212 from the source devices 208 are routed through switches 216, 218 before arriving at the ingress 206 of the destination device 212. 7. Claim 2,12 and 19 are rejected under 35 U.S.C. 103 as being unpatentable Gupta in view of Matthews et al. (US 12231354 B1) hereinafter Matthews and further in view of Walrand et al. (US 7046665 B1) hereinafter Walrand. Regarding claims 2, 12 and 19, claim 1 is incorporated. Gupta in view of Matthews disclose threshold of rate change below and above threshold, Matthews (para. [0047]-[0051] and Fig. 6) . Gupta in view of Matthews may not explicitly disclose after dynamically adjusting the rate at which the packets to be transmitted from the egress queue are processed for egress, determine the rate of change in the number of entries in the ingress queue of the switch is below the first threshold rate of change; and in response to determining the rate of change in the number of entries in the ingress queue of the switch is below the first threshold rate of change, cease dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress. However, Walrand discloses after dynamically adjusting the rate at which the packets to be transmitted from the egress queue are processed for egress, determine the rate of change in the number of entries in the ingress queue of the switch is below the first threshold rate of change; and in response to determining the rate of change in the number of entries in the ingress queue of the switch is below the first threshold rate of change, cease dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress (col. 11, lines 9-17, a modified switch monitors the occupancy of its queues. When the queue of a specific data stream is at or exceeds some high threshold, it is marked as congested. The status is reset to "non-congested" when the occupancy of the queue corresponding to the queue falls below low threshold. The modified switch notifies the upstream node of that stream that the upstream node should slow down or stop the transmissions of packets of that stream). Therefore it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the teaching of Gupta in view of Matthews and include after dynamically adjusting the rate at which the packets to be transmitted from the egress queue are processed for egress, determine the rate of change in the number of entries in the ingress queue of the switch is below the first threshold rate of change; and in response to determining the rate of change in the number of entries in the ingress queue of the switch is below the first threshold rate of change, cease dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress using the teaching of Walrand. The motivation for doing so would have been in order to provide data transmission services with guaranteed quality of service (QoS). 8. Claims 3-4, 13 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Gupta et al. in view of Matthews et al. and further in view of Kwan et al. (US 12231342 B1) hereinafter Kwan. Regarding claims 3, 13 and 20, claim 1 is incorporated. Gupta in view of Matthews may not explicitly disclose wherein dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress comprises increasing the rate at which the packets from the egress queue of the switch are processed for egress from a first rate to a second rate over time. However, Kwan discloses dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress comprises increasing the rate at which the packets from the egress queue of the switch are processed for egress from a first rate to a second rate over time (col 21 lines 26-62, in response to determining that the egress buffer memory 252 has transitioned from congested to not congested, the rate control circuitry 236 controls the ingress portion 204-xa to begin transferring data units corresponding to the ingress source from an ingress queue 228 corresponding to the ingress source to the egress portion 204-xb (via the interconnect 216) at a transfer rate r1, which is approximately ⅓ of a maximum transfer rate that the ingress portion 204-xa and the interconnect 216 are capable of transferring data units to the egress portion 204-1b. Accordingly, at time t1, the ingress portion 204-xa begins transferring data units corresponding to the ingress source from the ingress queue 228 to the egress portion 204-xb (via the interconnect 216) at the transfer rate r1… Next, at a time t3, the rate control circuitry 236 controls the ingress portion 204-xa to begin transferring data units corresponding to the ingress source from the ingress queue 228 to the egress portion 204-xb (via the interconnect 216) at the maximum transfer rate that the ingress portion 204-xa and the interconnect 216 are capable of transferring data units to the egress portion 204-1b. Accordingly, at time t3, the ingress portion 204-xa begins transferring data units corresponding to the ingress source from the ingress queue 228 to the egress portion 204-xb (via the interconnect 216) at the maximum transfer rate). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the teaching of Gupta in view of Matthews and include dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress comprises increasing the rate at which the packets from the egress queue of the switch are processed for egress from a first rate to a second rate over time using the teaching of Kwan. The motivation for doing so would have been in order to efficiently use buffer memory. Regarding claim 4, claim 3 is incorporated. Kwan further discloses wherein the second rate is a maximum rate (col 21 lines 26-62 , at a time t3, the rate control circuitry 236 controls the ingress portion 204-xa to begin transferring data units corresponding to the ingress source from the ingress queue 228 to the egress portion 204-xb (via the interconnect 216) at the maximum transfer rate that the ingress portion 204-xa and the interconnect 216 are capable of transferring data units to the egress portion 204-1b. Accordingly, at time t3, the ingress portion 204-xa begins transferring data units corresponding to the ingress source from the ingress queue 228 to the egress portion 204-xb (via the interconnect 216) at the maximum transfer rate). 9. Claim 7,15 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Gupta (US 20120163175 A1) Gupta et al in view of Matthews et al. (US 12231354 B1) hereinafter Matthews and further in view Kwan et al. (US 20090003212 A1) hereinafter Kwan. Regarding claims 7, 14 and 18, claim 1 is incorporated. Gupta may not explicitly disclose wherein dynamically adjusting the rate at which the packets to be transmitted from the egress queue are processed for egress comprises delaying a scheduling of the packets the egress queues. However, Kwan discloses wherein dynamically adjusting the rate at which the packets to be transmitted from the egress queue are processed for egress comprises delaying a scheduling of the packets the egress queues (para. [0046] [0056] If the fabric egress queue 414 becomes congested, as indicated by the cross-hatched area indicating data occupancy, the fabric element 400 may communicate a flow control message to the ingress module 300 indicating that the data flow being communicated from VOQ 312 is causing congestion in the fabric egress queue 414. In response to the flow control message, the ingress module (e.g., using the scheduler 318) may stop or slow transmission of the data flow from the VOQ 312. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the teaching of Gupta and include wherein dynamically adjusting the rate at which the packets to be transmitted from the egress queue are processed for egress comprises delaying a scheduling of the packets the egress queues using the teaching of Kwan. The motivation for doing so would have been in order to prevent data loss in the fabric elements, hence the data transmission efficiency of the data switch is improved by reducing the head-of-line blocking. 10. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Gupta et al. in view of Matthews et al. and further in view of Singh et al. (US 20240243996 A1) hereinafter Singh. Regarding claim 8, claim 1 is incorporated. Gupta in view of Matthews may not explicitly disclose wherein dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress affects a first one or more flows of a plurality of flows traversing the switch and a second one or more flows of the plurality of flows continue unaffected by the adjusting of the rate at which the packets from the egress queue of the witch are processed for egress. However, Singh discloses dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress affects a first one or more flows of a plurality of flows traversing the switch and a second one or more flows of the plurality of flows continue unaffected by the adjusting of the rate at which the packets from the egress queue of the witch are processed for egress (para [0004] identify an InCoS-Q corresponding to that particular class of service and associated with that particular host; and block that InCoS-Q, while allowing routing of the network traffic from one or more InCoS-Qs corresponding to that particular class of service). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the teaching of Gupta in view of Matthews and include dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress affects a first one or more flows of a plurality of flows traversing the switch and a second one or more flows of the plurality of flows continue unaffected by the adjusting of the rate at which the packets from the egress queue of the witch are processed for egress using the teaching of Singh. The motivation for doing so would have been in order to block particular class of service without affecting any data transmission. 11. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Gupta et al. in view of Matthews et al. and further in view of Lee et al. (US 20040109477 A1) hereinafter Lee Regarding claim 9, claim 1 is incorporated. Gupta in view of Matthews discloses the one or more circuits are further to determine a rate of change in a number of packets ingressing the switch, and dynamically adjusting the rate at which the packets from the egress queue of the switch are processed for egress is further in response to determining the rate of change in the number of packets ingressing the switch exceeds threshold rate of change (see Gupta (see Gupta, para. [0014] [0018] [0032]-[0033]). However, Gupta in view of Matthews may not explicitly disclose the switch exceeds a second threshold. However, Lee discloses the switch exceeds a second threshold (para. [0046] the congestion status refers to an occasion that data packets stored in the buffer are over a first threshold, and the congestion prediction status refers to an occasion that data packets stored in the buffer are over a second threshold. If data packets stored in the buffer is over a certain setting value, that is, over a second threshold, the congestion control adjuster 43b predicts that network congestion will occur with a response signal transmitted to the transmitter 41 from the receivers 45, 47, and 49). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the teaching of Gupta in view of Matthews and include the switch exceeds a second threshold using the teaching of Lee. The motivation for doing so would have been in order to improve TCP data transmission efficiency in asymmetric environments. Conclusion 12. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. 13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kidest Mendaye whose telephone number is (571)272-2603. The examiner can normally be reached on Monday through Friday 7:00 am-5:00pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ario Etienne can be reached on (571) 272-4001. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. 08/27/2026 /KIDEST MENDAYE/ Examiner, Art Unit 2457 /MOUSTAFA M MEKY/Primary Examiner, Art Unit 2457
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Prosecution Timeline

Show 5 earlier events
Nov 14, 2025
Response after Non-Final Action
Dec 19, 2025
Request for Continued Examination
Jan 06, 2026
Response after Non-Final Action
Mar 27, 2026
Non-Final Rejection mailed — §103
Jun 09, 2026
Applicant Interview (Telephonic)
Jun 10, 2026
Examiner Interview Summary
Jun 16, 2026
Response Filed
Sep 11, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

5-6
Expected OA Rounds
81%
Grant Probability
99%
With Interview (+32.8%)
2y 9m (~1m remaining)
Median Time to Grant
High
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