DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group I in the reply filed on 7/13/2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-6 and 15-18 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The term “highly” conductive region in claims 1-6 and 15-18 is a relative term which renders the claim indefinite. The term “highly” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. As there is no clear basis for determining a threshold where a level of conductivity becomes “highly conductive”, any non-insulating material will be considered to satisfy the limitation for purposes of examination on the merits.
Additionally, the term “a current path… in parallel with the channel zone” is unclear in what it is trying to convey. It appears to either be referring to a parallel direction, or parallel in the sense of circuitry. Clarification from the applicant is respectfully requested. For purposes of examination on the merits, the interpretation of forming a current path in electrical parallel will be considered acceptable.
Each of the cited claims is rejected on these bases.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3 and 15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US patent publication US 20240274710 A1 (Yang et al hereinafter Yang).
Regarding claim 1, Yang discloses a vertical field-effect transistor structure, comprising: a semiconductor body (FIG. 4, semiconductor body elements SiC semiconductor substrate 10, drift layer 11, fin shaped channel layer 12, and source region 13 collectively form a semiconductor body ¶ [0041]) having a first terminal zone (FIG. 4, being near drain electrode 19, substrate 10 may be considered a first terminal zone ¶ [0041]), a drift zone (FIG. 4, drift layer 11 ¶ [0041]), and a second terminal zone (FIG. 4, source region 13 ¶ [0041]) of a first conductivity type (FIG. 4, substrate 10, layer 11, and region 13 all have N-type conductivity ¶ [0043]); a channel zone (FIG. 4, fin shaped channel layer 12 is between substrate 10 and source region 13 ¶ [0041]), arranged between the first terminal zone and the second terminal zone, the channel zone being of the first conductivity type or of a second conductivity type complementary to the first conductivity type (fin shaped channel layer 12 has P-type conductivity ¶ [0043]); a plurality of first trenches (FIG. 4, non-labeled trenches are present in the semiconductor body between instances of channel 12 and region 13) extending into the semiconductor body, which extend from the second terminal zone into the drift zone and form fins of the channel zone and of the second terminal zone (FIG. 4, the non-labeled trenches are configured such that channel 12 and region 13 are formed in fin structures ¶ [0042]);
a control electrode (FIG. 4, gate electrode 14 is arranged in the trenches ¶ [0041]) arranged in the first trenches, the control electrode being arranged adjacent to the channel zone and insulated from the semiconductor body (FIG. 4, gate oxide layer 15, first insulated isolating layer 16, and second insulated isolating layer 17 insulate gate 14 from the semiconductor body ¶ [0041]); and a current path connected between the first terminal zone and the second terminal zone and in parallel with the channel zone, the current path having at least one Schottky junction (FIG. 4, a Schottky barrier diode is included to improve reverse conduction and switching characteristics ¶ [0053]) and is configured to conduct when a reverse voltage between the first terminal zone and the second terminal zone is reached (FIG. 4, floating region 20 and Schottky contact portion 22 may serve this intended-use function ¶ [0015, 0052-0053]); wherein the Schottky junction is arranged in the drift zone and is formed between a highly conductive region (FIG. 4, floating region 20 and the segment of Schottky contact portion located below isolating layer 16 are highly conductive and are used to form a Schottky barrier diode ¶ [0015, 0120]; a threshold to meet the limitation ‘highly conductive’ was not explicitly stated in the claim) buried in the drift zone and the drift zone; and wherein the highly conductive region is electrically connected to the second terminal zone (FIG. 4, floating region 20 and the lower portion of Schottky contact 22 electrically connects to source region 13 through the upper Schottky contact portion 22 level with isolating layer 16 and source electrode 18 ¶ [0041, 0053]).
Regarding claim 2, Yang discloses the limitations of claim 1 and further discloses a terminal contact (FIG. 4, portion of Schottky contact portion 22 level with isolating layer 16 is provided on floating region 20 and the lower portion of contact 22 ¶ [0053]) is provided on the highly conductive region and a contact metallization (FIG. 4, source electrode 18 extends into the trenches ¶ [0041]) extends into the first trenches, which electrically connects the terminal contact and the second terminal zone (FIG. 4, source electrode 18 provide an electrical connection from Schottky contact 22 to source region 13).
Regarding claim 3, Yang discloses the limitations of claim 1 and further discloses that the highly conductive region extends up to below the control electrode (FIG. 4, floating regions 20 and Schottky contact portion 22 each extend up to vertical levels that are below the lowest extensions of gate electrodes 14).
Regarding claim 15, Yang discloses the limitations of claim 1 and further discloses that the semiconductor body defines a plurality of second trenches (FIG. 4, non-labeled second trenches in drift layer 11 which are filled by floating regions 20 ¶ [0047]) in or extending into the drift zone, and wherein the highly conductive region comprises respective highly conductive portions filling the plurality of second trenches (FIG. 4, the instances of floating regions 20 fill the second trenches).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 4, 6, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over US patent publication US 20240274710 A1 (Yang et al hereinafter Yang) as applied to claim 1 above, and further in view of US patent publication US 20160104702 A1 (Hsieh).
Regarding claim 4, Yang discloses the limitations of claim 1 as detailed above, but does not further disclose that in the drift zone between the highly conductive region and the first terminal zone there is arranged a region of the second conductivity type which electrically connects the highly conductive region to the first terminal zone.
However, Hsieh discloses a vertical field-effect transistor structure (FIG. 4 unit cell 700, which includes many elements of unit cell 200) wherein in a drift zone (FIGS. 2A and 4, N first doped column region 207 functions as a drift zone ¶ [0021]) between a highly conductive region (FIGS. 2A and 4, trenched source-body contacts 211 are highly conductive ¶ [0021]) and a first terminal zone (FIGS. 2A and 4, N+ substrate 202 and back metal 203 function as a first terminal zone ¶ [0021]) there is arranged a region of a second conductivity type (FIG. 4, P second doped column regions 701, which have a second P-conductivity type ¶ [0026]) which electrically connects the highly conductive region to the first terminal zone. Hsieh also teaches that super-junction MOSFETs include several beneficial features such as higher breakdown voltage, lower specific Rds (drain-source resistance), minimized influence of charge imbalance, and better UIS (unclamped inductive switching) capability (¶ [0002]).
Yang and Hsieh both pertain to the field of vertical field-effect transistor structures, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Yang in view of Hsieh by including a superjunction structure, such that in the drift zone between the highly conductive region and the first terminal zone there is arranged a region of the second conductivity type which electrically connects the highly conductive region to the first terminal zone, in order to implement beneficial properties of the superjunction structure taught by Yang.
Regarding claim 6, Yang discloses the limitations of claim 1 as detailed above but does not further disclose that in the drift zone between the highly conductive region and the first terminal zone there is arranged a superjunction region of the second conductivity type which electrically connects the highly conductive region to the first terminal zone.
However, Hsieh discloses a vertical field-effect transistor structure (FIG. 4 unit cell 700, which includes many elements of unit cell 200) wherein in a drift zone (FIGS. 2A and 4, N first doped column region 207 functions as a drift zone ¶ [0021]) between a highly conductive region (FIGS. 2A and 4, trenched source-body contacts 211 are highly conductive ¶ [0021]) and a first terminal zone (FIGS. 2A and 4, N+ substrate 202 and back metal 203 function as a first terminal zone ¶ [0021]) there is arranged a superjunction region of the second conductivity type (FIG. 4, P second doped column regions 701, which have a second P-conductivity type and function in the capacity of a superjunction ¶ [0026]) which electrically connects the highly conductive region to the first terminal zone. Hsieh also teaches that super-junction MOSFETs include several beneficial features such as higher breakdown voltage, lower specific Rds (drain-source resistance), minimized influence of charge imbalance, and better UIS (unclamped inductive switching) capability (¶ [0002]).
Yang and Hsieh both pertain to the field of vertical field-effect transistor structures, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Yang in view of Hsieh by including a superjunction structure, such that in the drift zone between the highly conductive region and the first terminal zone there is arranged a superjunction region of the second conductivity type which electrically connects the highly conductive region to the first terminal zone, in order to implement beneficial properties of the superjunction structure taught by Yang.
Regarding claim 18, Yang in view of Hsieh discloses the limitations of claim 6 as detailed above, and they further disclose that the semiconductor body defines a plurality of second trenches in the drift zone (Yang FIG. 4, non-labeled second trenches in drift layer 11 which are filled by floating regions 20 ¶ [0047]); respective portions of the highly conductive region fill the plurality of second trenches (non-labeled second trenches in drift layer 11 are filled by floating regions 20 and Schottky contact portion 22, Yang ¶ [0047]); and the superjunction region comprises a plurality of superjunction portions (Hsieh FIG. 4, P second doped column regions 701 are portions of the overall superjunction structure ¶ [0026]), each superjunction portion extending from a bottom of a respective one of the second trenches to the first terminal zone (Hsieh FIG. 4, P second doped column regions 701 extend from the bottom of the trench where the highly conductive source-body contacts are located down to the N+ substrate and back metal that serve as the first terminal zone; an analogous structure is present when the superjunction structure of Hsieh is implemented in the device of Yang).
Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Yang as applied to claim 1 above, and further in view of US patent publication US 20200312979 A1 (Siemieniec et al hereinafter Siemieniec).
Yang discloses the limitations of claim 1 as detailed above and further discloses that the drift region is formed of silicon carbide (drift layer 11 is formed by performing ion doping on an epitaxially-grown SiC material ¶ [0058]), but does not explicitly teach that the highly conductive region is formed of polysilicon.
However, Siemieniec teaches that a Schottky contact can be formed between silicon carbide and polycrystalline silicon (¶ [0020]). Yang also does not particularly limit the selection of materials for the Schottky contact portion, so long as it can form a Schottky contact with the SiC-based drift layer (Yang ¶ [0054]).
Yang and Siemieniec both pertain to the field of vertical field-effect transistor structures, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Yang in view of Siemieniec such that the highly conductive region is formed of polysilicon by having the Schottky contact portion of Yang be made of polysilicon, in order to provide a suitable material to implement the Schottky contact which may be found beneficial after consideration of materials costs and changing market conditions.
Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Yang as applied to claim 15 above, and further in view of Hsieh.
Regarding claim 16, Yang discloses the limitations of claim 15 as detailed above but does not further disclose a plurality of regions of the second conductivity type, each region of the second conductivity type extending from a bottom of a respective one of the second trenches through the drift zone to the first terminal zone and electrically connecting the portion of the highly conductive region filling the respective second trench to the first terminal zone.
However, Hsieh discloses a vertical field-effect transistor structure (FIG. 4 unit cell 700, which includes many elements of unit cell 200) including a plurality of regions (FIG. 4, P second doped column regions 701, which have a second P-conductivity type ¶ [0026]) of a second conductivity type, each region of the second conductivity type extending from a bottom of a respective one of second trenches (FIGS. 2A and 4, non-labeled trenches are present and filled by source-body contacts 211, which column regions 701 extend through) through a drift zone (FIGS. 2A and 4, N first doped column region 207 functions as a drift zone ¶ [0021]; column regions 701 extend through it) to a first terminal zone (FIGS. 2A and 4, N+ substrate 202 and back metal 203 function as a first terminal zone ¶ [0021]; column regions 701 extend to N+ substrate) and electrically connecting the portion of the highly conductive region (FIGS. 2A and 4, the source-body contacts 211 are highly conductive ¶ [0021]) filling the respective second trench to the first terminal zone (column regions 701 form an electrical connection between N+ substrate 202 and source-body contacts 211). Hsieh also teaches that super-junction MOSFETs include several beneficial features such as higher breakdown voltage, lower specific Rds (drain-source resistance), minimized influence of charge imbalance, and better UIS (unclamped inductive switching) capability (¶ [0002]).
Yang and Hsieh both pertain to the field of vertical field-effect transistor structures, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Yang in view of Hsieh by including a superjunction structure, such that it includes a plurality of regions of the second conductivity type, each region of the second conductivity type extending from a bottom of a respective one of the second trenches through the drift zone to the first terminal zone and electrically connecting the portion of the highly conductive region filling the respective second trench to the first terminal zone, in order to implement beneficial properties of the superjunction structure taught by Yang.
Regarding claim 17, Yang discloses the limitations of claim 15 as detailed above but does not further disclose a plurality of regions of the second conductivity type that electrically connect the highly conductive region to the first terminal zone, each of the regions of the second conductivity type being aligned, in a depth direction of the semiconductor body, with a respective one of the second trenches.
However, Hsieh discloses a vertical field-effect transistor structure (FIG. 4 unit cell 700, which includes many elements of unit cell 200) including a plurality of regions (FIG. 4, P second doped column regions 701, which have a second P-conductivity type ¶ [0026]) of a second conductivity type that electrically connect a highly conductive region (FIGS. 2A and 4, the source-body contacts 211 are highly conductive ¶ [0021]) to a first terminal zone (FIGS. 2A and 4, N+ substrate 202 and back metal 203 function as a first terminal zone ¶ [0021]; column regions 701 form an electrical connection between N+ substrate 202 and source-body contacts 211), each of the regions of the second conductivity type being aligned, in a depth direction of a semiconductor body (FIG. 4, this is a vertical direction down the heights of column regions 701, parallel to the longest extension directions of the source-body contacts), with a respective one of the second trenches (FIGS. 2A and 4, column regions 701 are aligned such that they overlap and are nested into by source-body contacts 211). Hsieh also teaches that super-junction MOSFETs include several beneficial features such as higher breakdown voltage, lower specific Rds (drain-source resistance), minimized influence of charge imbalance, and better UIS (unclamped inductive switching) capability (¶ [0002]).
Yang and Hsieh both pertain to the field of vertical field-effect transistor structures, placing them in the same field of endeavor as the claimed invention. Therefore, a person of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to modify the device of Yang in view of Hsieh by including a superjunction structure, such that it includes a plurality of regions of the second conductivity type that electrically connect the highly conductive region to the first terminal zone, each of the regions of the second conductivity type being aligned, in a depth direction of the semiconductor body, with a respective one of the second trenches, in order to implement beneficial properties of the superjunction structure taught by Yang.
Cited Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US patent publications US 20230290874 A1, US 20230215942 A1, US 20220037473 A1, US 20210320202 A1, US 20200357918 A1, US 20190237576 A1, US 20190097042 A1, US 20120273916 A1, US 20120061754 A1, US 20080277695 A1, US 20080135925 A1, and US 20080029812 A1.
Conclusion
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/E.R.C./Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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