DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 7/19/2024 was filed and is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, and 12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bangari et al (Digital Electronics and Analog Photonics for Convolutional Neural Networks).
In regard to claim 1 and 2, Bangari et al disclose an analog computing platform operative to implement at least one layer of a neural network, the analog computing platform comprising:
an interface operative to receive elements of a first matrix and elements of a second matrix in the analog domain; and
a layered neural network including at least one optical processing chip operative to optically perform multiply-and-accumulate (MAC) operations with the matrix elements in the analog domain, and
as recited in claim 2,
wherein the interface comprises at least one digital-to-analog converter (DAC) for converting elements of the first matrix elements and elements of the second matrix into the analog domain; and
wherein the analog computing platform comprises:
at least one analog-to-digital converter (ADC) operative to output a result of the MAC operations in a digital format.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3-11 and 13-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bangari et al (Digital Electronics and Analog Photonics for Convolutional Neural Networks).
In regard to claim 3 and 14, Bangari et al fail to explicitly disclose a summation unit operative to add bias values over the results of MAC operations, and wherein at least one layer of a neural network is a convolutional layer, the matrix elements include elements of a kernel matrix.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to provide biases and a convolution layer in order to provide model flexibility and to work with spatial data.
In regard to claim 4 and 15, Bangari et al fail to explicitly disclose a summation unit operative to add bias values over the results of MAC operations, and wherein at least one layer of a neural network is a fully connected layer, the matrix elements include elements of a kernel matrix.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to use connected layers in order to combine features and to improve decision making.
In regard to claim 5 and 16, Bangari et al fail to explicitly disclose at least one layer of a neural network is a batch normalization layer, the matrix elements include learned parameters, and the results of the MAC operations are biased by a learned parameter.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to use batch normalization in order to rescale data.
In regard to claim 6 and 17, Bangari et al fail to explicitly disclose a CMOS circuit, wherein at least one layer of a neural network is a max pooling layer, and the CMOS circuit includes one or more comparators configured to identify in a matrix the matrix element having the maximum value.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to use a comparator and pooling layer in order to reduce dimensionality.
In regard to claim 7 and 18, Bangari et al fail to explicitly disclose at least one layer of a neural network is an average pooling layer, the first matrix includes a number k2 of elements, the second matrix is constructed such that each of its elements is 1/k2, and the MAC operation between the elements of the first matrix and the elements of the second matrix results in an average value for the elements in the first matrix.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to use average pooling in order to reduce computation and smooth noise.
In regard to claim 8, 9, and 19, Bangari et al fail to explicitly disclose a CMOS circuit, wherein at least one layer of a neural network includes a rectified linear unit (ReLU) non-linear function, and the CMOS circuit is configured to perform a ReLU non-linear function over one or more matrix elements, or as recited in claim 9, a CMOS circuit, wherein at least one layer of a neural network includes a sigmoid function, and the CMOS circuit is configured to perform a sigmoid function over one or more matrix elements.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to use ReLU or a sigmoid in order to model non-linear features.
In regard to claim 10, Bangari et al fail to explicitly disclose at least two different layers of a neural network, implemented in concatenation.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to use concatenation in order connect layers.
In regard to claim 11, Bangari et al fail to explicitly disclose matrix elements include point coordinates from a point cloud.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to use point coordinates in order to model spatial data.
In regard to claim 13, Bangari et al fail to explicitly disclose the MAC operations with the matrix elements is optically performed in series.
However, it would have been obvious to one of ordinary skill in the art at the time of filing to perform calculations in series in order to limit hardware requirements. (Things can only be performed in series or in parallel. This choice is at least obvious to try.)
Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Bangari et al (Digital Electronics and Analog Photonics for Convolutional Neural Networks) in view of Casas et al (US 10,997,502 B1).
In regard to claim 20, Bangari et al disclose a system in which the processing of data is performed with a layered neural network implemented on an analog computing platform operative to optically perform at least one multiply-and-accumulate (MAC) operation with matrix elements received via an interface, the matrix elements including point cloud data from the system.
Bangari et al fail to disclose a LiDAR system.
Casas et al teaches a LiDAR system in which the processing of data is performed with a layered neural network to perform at least one multiply-and-accumulate (MAC) operation with matrix elements received via an interface, the matrix elements including point cloud data from the LiDAR system.
It would have been obvious to one of ordinary skill in the art at the time of filing to apply the optical system of Bangari et al to the LiDAR system of Casas et al in order to optimize the LiDAR system.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Casas et al (US 11,132,619 B1) disclose a trainable network.
Kim et al (US 2026/0127439 A1) disclose a model.
Hamerly et al (US 2021/0357737 A1) disclose an optical neural net.
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/CHRISTOPHER E DUNAY/Primary Examiner, Art Unit 2875
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