DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 9 is objected to because of the following informalities: claim 9 appears to be missing a closing parenthesis and period at the end of the claim. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (US Pat. App. Pub. No. 2020/0275580).
With respect to claim 1, Wang discloses a capacitor (see abstract) comprising a surface electrode (see FIG. 9, element 82) and a further surface electrode (see FIG. 9, element 96), wherein a first capacitor structure (see FIG. 11, elements 38) is arranged between a first region (see FIG. 9, element 84 and paragraph [0032]) of the surface electrode and a further first region (see FIG. 10, element 100 and paragraph [0033]) of the further surface electrode, wherein the first capacitor structure (see FIG. 11) is connected in an electrically conductive manner to the first region of the surface electrode and to the further first region of the further surface electrode (see FIG. 11), wherein the first region of the surface electrode is arranged on a base side of the capacitor and the further first region of the further surface electrode is arranged on an upper side of the capacitor facing away from the base side (see FIG. 11), wherein a second capacitor structure (see FIG. 11, the center row of elements 38) is arranged between a second region of the surface electrode and a further second region of the further surface electrode (see FIG. 9, element 86 and FIG. 10, element 98), wherein the second capacitor structure is connected in an electrically conductive manner to the second region of the surface electrode and the further second region of the further surface electrode (see FIG. 11), wherein the further second region of the further surface electrode is arranged on the base side of the capacitor and the second region of the surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11 and paragraphs [0032]-[0034]), wherein a third capacitor structure (see FIG. 11, the rightmost row of elements 38) is arranged between a third region of the surface electrode and a further third region of the further surface electrode (see FIGS. 9-11, rightmost elements 84 and 100, and paragraphs [0032]-[0034]), wherein the third capacitor structure is connected in an electrically conductive manner to the third region of the surface electrode and to the further third region of the further surface electrode (see FIG. 11), wherein the third region of the surface electrode is arranged on a base side of the capacitor and the further third region of the further surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11).
With respect to claim 2, Wang discloses that the second region of the surface electrode is arranged between the further first region of the further surface electrode and the further third region of the further surface electrode (see FIGS. 9-11), and the further second region of the further surface electrode is arranged between the first region of the surface electrode and the third region of the surface electrode (see FIGS. 9-11).
With respect to claim 3, Wang discloses that the first region of the surface electrode and the further second region of the further surface electrode and the third region of the surface electrode are arranged in a common ground level on the base side of the capacitor. See FIG. 11, noting the common ground level.
With respect to claim 4, Wang discloses that a first intermediate region of the surface electrode connects the first region of the surface electrode to the second region of the surface electrode and a further first intermediate region of the further surface electrode connects the further first region of the further surface electrode to the further second region of the further surface electrode (see FIG. 9, element 88 and FIG. 10, element 102, and paragraphs [0032] and [0033])), wherein the first intermediate region of the surface electrode and the further first intermediate region of the further surface electrode are arranged between the first capacitor structure and the second capacitor structure (see FIGS. 9-11).
With respect to claim 5, Wang discloses that the first intermediate region and/or the further first intermediate region extend in a planar manner perpendicular to the first region of the surface electrode and to the further second region of the further surface electrode. See FIGS. 9-11, noting that elements 88 and 102 extend perpendicular to elements 84 and 100, respectively.
With respect to claim 6, Wang discloses that a second intermediate region of the surface electrode connects the second region of the surface electrode to the third region of the surface electrode, and a further second intermediate region of the further surface electrode connects the further second region of the further surface electrode to the further third region of the further surface electrode, wherein the second intermediate region of the surface electrode and the further second intermediate region of the further surface electrode are arranged between the second capacitor structure and the third capacitor structure. See FIGS. 9-11, the rightmost elements 88 and 102, which are disposed between the second capacitor structure and the third capacitor structure.
With respect to claim 7, Wang discloses that the second intermediate region and/or the further second intermediate region extend in a planar manner perpendicular to the further second region of the further surface electrode and to the third region of the surface electrode. See FIGS. 9-11, noting that elements 88 and 102 extend perpendicular to elements 84 and 100, respectively.
With respect to claim 8, Wang discloses that the capacitor is designed to be symmetrically identical. See FIGS. 9-11.
With respect to claim 9, Wang discloses an assembly comprising a capacitor (see abstract) that includes a surface electrode (see FIG. 9, element 82) and a further surface electrode (see FIG. 9, element 96), wherein a first capacitor structure (see FIG. 11, elements 38) is arranged between a first region (see FIG. 9, element 84 and paragraph [0032]) of the surface electrode and a further first region (see FIG. 10, element 100 and paragraph [0033]) of the further surface electrode, wherein the first capacitor structure (see FIG. 11) is connected in an electrically conductive manner to the first region of the surface electrode and to the further first region of the further surface electrode (see FIG. 11), wherein the first region of the surface electrode is arranged on a base side of the capacitor and the further first region of the further surface electrode is arranged on an upper side of the capacitor facing away from the base side (see FIG. 11), wherein a second capacitor structure (see FIG. 11, the center row of elements 38) is arranged between a second region of the surface electrode and a further second region of the further surface electrode (see FIG. 9, element 86 and FIG. 10, element 98), wherein the second capacitor structure is connected in an electrically conductive manner to the second region of the surface electrode and the further second region of the further surface electrode (see FIG. 11), wherein the further second region of the further surface electrode is arranged on the base side of the capacitor and the second region of the surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11 and paragraphs [0032]-[0034]), wherein a third capacitor structure (see FIG. 11, the rightmost row of elements 38) is arranged between a third region of the surface electrode and a further third region of the further surface electrode (see FIGS. 9-11, rightmost elements 84 and 100, and paragraphs [0032]-[0034]), wherein the third capacitor structure is connected in an electrically conductive manner to the third region of the surface electrode and to the further third region of the further surface electrode (see FIG. 11), wherein the third region of the surface electrode is arranged on a base side of the capacitor and the further third region of the further surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11), and a heat sink (see FIG. 8, element 34), wherein the base side of the capacitor rests flat on the heat sink (see FIG. 8) (while heat sink 34 isn’t shown in FIGS. 9-11, paragraph [0032] notes that FIGS. 9-11 are merely an alternate embodiment having 3 linear arrays of capacitor cells which corresponds to the embodiment shown in FIGS. 1-8, and thus, would include heat sink 34).
With respect to claim 10, Wang discloses that the assembly further comprises at least one electrical and/or electronic unit, wherein the electrical and/or electronic unit is arranged on the heat sink for cooling. See FIG. 1, power module 14, which connects to heat sink 34. While power module 14 isn’t shown in FIGS. 9-11, paragraph [0032] notes that FIGS. 9-11 are merely an alternate embodiment having 3 linear arrays of capacitor cells which corresponds to the embodiment shown in FIGS. 1-8, and thus, would include power module 14).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Urano et al. (US 2022/0013298), Song et al. (US 2019/0335608), Kessler (US 2017/0338040), among others cited and not applied, disclose capacitor arrays including bus bars, but each fails to teach that the first bus bar connects to different capacitors in different planar locations (i.e., the first and third capacitor connect to the first bus bar on one plane, while the second capacitor connects to the first bus bar on a different plane).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DION R FERGUSON whose telephone number is (571)270-7566. The examiner can normally be reached Monday-Friday, 5:30 a.m. - 4:00 p.m..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DION R. FERGUSON/Primary Examiner, Art Unit 2848
Prosecution Insights