Prosecution Insights
Last updated: August 17, 2026
Application No. 18/443,294

CAPACITOR, IN PARTICULAR DC LINK CAPACITOR FOR A MULTI-PHASE SYSTEM

Final Rejection §102§103
Filed
Feb 16, 2024
Priority
Feb 17, 2023 — DE 10 2023 201 394.0
Examiner
FERGUSON, DION
Art Unit
2848
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Robert Bosch GmbH
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
882 granted / 1015 resolved
+18.9% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
14 currently pending
Career history
1034
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
51.1%
+11.1% vs TC avg
§102
29.5%
-10.5% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1015 resolved cases

Office Action

§102 §103
DETAILED ACTION Response to Arguments Applicant's arguments filed 09 March 2026 have been fully considered but they are not persuasive. In particular, Applicant submits that the bus bars disclosed in Wang cannot anticipate the surface electrodes recited in claim 1. The Office respectfully disagrees as follows. In arguing that Wang fails to disclose the recited surface electrodes, Applicant submits that the term “surface electrode” requires a specific definition that includes the storing of charge, arguing that paragraph [0024] of the instant specification requires that the surface electrodes, together with the capacitor structures, form the capacitor. Applicant further submits that the bus bars in Wang merely conduct a charge, and do not participate in the storing of charge in any way. In further support of their assertion, Applicant submits, on page 8 of the response, that “[a] surface electrode is commonly defined as a conductive plate (e.g., anode or cathode) that stores electric charge by collecting electrons or ions at the boundary interface with a dielectric material. On the other hand, a busbar is commonly defined as a rigid metal strip or bar that acts as a central junction point to efficiently conduct and distribute electrical currents from a single source to multiple circuits.” The Office submits that Applicant is defining the term “surface electrode” too narrowly based on both their own specification. First, while Applicant’s specification does indicate that surface electrodes 10 and 20 can form a capacitor with capacitor structures 31, 32, and 33, paragraph [0024] of the published application (i.e., US 2024/0282527) further notes that the surface electrodes 10 and 20 can be welded to capacitor structures 31, 32, and 33 to connect the capacitors in parallel or series. In this embodiment, the capacitor structures can comprise one or more capacitors chosen from stack, cylindrical, or flat-pack capacitors, which are in electrical conductive contact with the surface electrodes. See paragraph [0024]. In this embodiment, the individual capacitor structures would have their own internal electrodes and dielectric, meaning the surface electrodes would be used to provide a current path for when the individual capacitor structures are charged or discharged. The Office further notes that the definitions provided in Applicant’s response are not supported by any objective evidence. The argument merely sets forth Applicant’s desired definition for the terms “electrode” and “bus bar” without any further support for why one of ordinary skill in the art would limit the terms “electrode” and “bus bar” to those definitions. As noted above, Applicant’s own specification provides a second definition for the “surface electrode” which would not require the storing of charge at the boundary interface. In response to Applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., requiring the surface electrodes store a charge) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). With respect to claim 9, Applicant argues that the capacitor cells 38 in Wang do not have a “base side” that rests flat on the cold plate 34, but rather, the cold plate supports a housing 40 and it’s base plate 38, with the capacitors mounted inside the housing. However, in FIG. 8, and paragraph [0030], Wang discloses that the bus bars 46 and 60 are disposed such that a “base side” of the capacitors 38 are disposed flat upon cold plate 34. Therefore, this argument is not persuasive. For the reasons set forth above, Applicant’s arguments are not persuasive and the rejection of claims 1-10 is hereby maintained. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (US Pat. App. Pub. No. 2020/0275580). With respect to claim 1, Wang discloses a capacitor (see abstract) comprising a surface electrode (see FIG. 9, element 82) and a further surface electrode (see FIG. 9, element 96), wherein a first capacitor structure (see FIG. 11, elements 38) is arranged between a first region (see FIG. 9, element 84 and paragraph [0032]) of the surface electrode and a further first region (see FIG. 10, element 100 and paragraph [0033]) of the further surface electrode, wherein the first capacitor structure (see FIG. 11) is connected in an electrically conductive manner to the first region of the surface electrode and to the further first region of the further surface electrode (see FIG. 11), wherein the first region of the surface electrode is arranged on a base side of the capacitor and the further first region of the further surface electrode is arranged on an upper side of the capacitor facing away from the base side (see FIG. 11), wherein a second capacitor structure (see FIG. 11, the center row of elements 38) is arranged between a second region of the surface electrode and a further second region of the further surface electrode (see FIG. 9, element 86 and FIG. 10, element 98), wherein the second capacitor structure is connected in an electrically conductive manner to the second region of the surface electrode and the further second region of the further surface electrode (see FIG. 11), wherein the further second region of the further surface electrode is arranged on the base side of the capacitor and the second region of the surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11 and paragraphs [0032]-[0034]), wherein a third capacitor structure (see FIG. 11, the rightmost row of elements 38) is arranged between a third region of the surface electrode and a further third region of the further surface electrode (see FIGS. 9-11, rightmost elements 84 and 100, and paragraphs [0032]-[0034]), wherein the third capacitor structure is connected in an electrically conductive manner to the third region of the surface electrode and to the further third region of the further surface electrode (see FIG. 11), wherein the third region of the surface electrode is arranged on a base side of the capacitor and the further third region of the further surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11). With respect to claim 2, Wang discloses that the second region of the surface electrode is arranged between the further first region of the further surface electrode and the further third region of the further surface electrode (see FIGS. 9-11), and the further second region of the further surface electrode is arranged between the first region of the surface electrode and the third region of the surface electrode (see FIGS. 9-11). With respect to claim 3, Wang discloses that the first region of the surface electrode and the further second region of the further surface electrode and the third region of the surface electrode are arranged in a common ground level on the base side of the capacitor. See FIG. 11, noting the common ground level. With respect to claim 4, Wang discloses that a first intermediate region of the surface electrode connects the first region of the surface electrode to the second region of the surface electrode and a further first intermediate region of the further surface electrode connects the further first region of the further surface electrode to the further second region of the further surface electrode (see FIG. 9, element 88 and FIG. 10, element 102, and paragraphs [0032] and [0033])), wherein the first intermediate region of the surface electrode and the further first intermediate region of the further surface electrode are arranged between the first capacitor structure and the second capacitor structure (see FIGS. 9-11). With respect to claim 5, Wang discloses that the first intermediate region and/or the further first intermediate region extend in a planar manner perpendicular to the first region of the surface electrode and to the further second region of the further surface electrode. See FIGS. 9-11, noting that elements 88 and 102 extend perpendicular to elements 84 and 100, respectively. With respect to claim 6, Wang discloses that a second intermediate region of the surface electrode connects the second region of the surface electrode to the third region of the surface electrode, and a further second intermediate region of the further surface electrode connects the further second region of the further surface electrode to the further third region of the further surface electrode, wherein the second intermediate region of the surface electrode and the further second intermediate region of the further surface electrode are arranged between the second capacitor structure and the third capacitor structure. See FIGS. 9-11, the rightmost elements 88 and 102, which are disposed between the second capacitor structure and the third capacitor structure. With respect to claim 7, Wang discloses that the second intermediate region and/or the further second intermediate region extend in a planar manner perpendicular to the further second region of the further surface electrode and to the third region of the surface electrode. See FIGS. 9-11, noting that elements 88 and 102 extend perpendicular to elements 84 and 100, respectively. With respect to claim 8, Wang discloses that the capacitor is designed to be symmetrically identical. See FIGS. 9-11. With respect to claim 9, Wang discloses an assembly comprising a capacitor (see abstract) that includes a surface electrode (see FIG. 9, element 82) and a further surface electrode (see FIG. 9, element 96), wherein a first capacitor structure (see FIG. 11, elements 38) is arranged between a first region (see FIG. 9, element 84 and paragraph [0032]) of the surface electrode and a further first region (see FIG. 10, element 100 and paragraph [0033]) of the further surface electrode, wherein the first capacitor structure (see FIG. 11) is connected in an electrically conductive manner to the first region of the surface electrode and to the further first region of the further surface electrode (see FIG. 11), wherein the first region of the surface electrode is arranged on a base side of the capacitor and the further first region of the further surface electrode is arranged on an upper side of the capacitor facing away from the base side (see FIG. 11), wherein a second capacitor structure (see FIG. 11, the center row of elements 38) is arranged between a second region of the surface electrode and a further second region of the further surface electrode (see FIG. 9, element 86 and FIG. 10, element 98), wherein the second capacitor structure is connected in an electrically conductive manner to the second region of the surface electrode and the further second region of the further surface electrode (see FIG. 11), wherein the further second region of the further surface electrode is arranged on the base side of the capacitor and the second region of the surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11 and paragraphs [0032]-[0034]), wherein a third capacitor structure (see FIG. 11, the rightmost row of elements 38) is arranged between a third region of the surface electrode and a further third region of the further surface electrode (see FIGS. 9-11, rightmost elements 84 and 100, and paragraphs [0032]-[0034]), wherein the third capacitor structure is connected in an electrically conductive manner to the third region of the surface electrode and to the further third region of the further surface electrode (see FIG. 11), wherein the third region of the surface electrode is arranged on a base side of the capacitor and the further third region of the further surface electrode is arranged on the upper side of the capacitor (see FIGS. 9-11), and a heat sink (see FIG. 8, element 34), wherein the base side of the capacitor rests flat on the heat sink (see FIG. 8) (while heat sink 34 isn’t shown in FIGS. 9-11, paragraph [0032] notes that FIGS. 9-11 are merely an alternate embodiment having 3 linear arrays of capacitor cells which corresponds to the embodiment shown in FIGS. 1-8, and thus, would include heat sink 34). With respect to claim 10, Wang discloses that the assembly further comprises at least one electrical and/or electronic unit, wherein the electrical and/or electronic unit is arranged on the heat sink for cooling. See FIG. 1, power module 14, which connects to heat sink 34. While power module 14 isn’t shown in FIGS. 9-11, paragraph [0032] notes that FIGS. 9-11 are merely an alternate embodiment having 3 linear arrays of capacitor cells which corresponds to the embodiment shown in FIGS. 1-8, and thus, would include power module 14). With respect to claim 11, Wang discloses: a pole connection for making electrical contact with the surface electrode (see FIG. 9, element 94), and a further pole connection for making electrical contact with the further surface electrode (see FIG. 10, element 106), wherein the pole connection and the further pole connection are each integral with the respective surface electrode (See FIGS. 9 and 10). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (US Pat. App. Pub. No. 2020/0275580) in view of Kessler (US Pat. App. Pub. No. 2017/0338040). With respect to claim 12, Wang fails to teach that the pole connection is arranged above the further pole connection. Kessler, on the other hand, teaches that the pole connections are arranged at different heights. See FIG. 1, elements 12 and 22, which are arranged at different heights; see also, paragraph [0024]. Such an arrangement results in the magnetic interactions being as effective as possible. See paragraph [0026]. Accordingly, it would have been obvious to one of ordinary skill in the art, at the effective filing date of the invention, to modify Wang, as taught by Kessler, in order to make the magnetic interactions as effective as possible. Allowable Subject Matter Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. With respect to claim 13, the prior art fails to teach, or fairly suggest that the first capacitor structure, the second capacitor structure, and the third capacitor structure, together with the surface electrode and the further surface electrode, form the capacitor, when taken in conjunction with the limitations of base claim 1. Claim 14 is allowed. The following is an examiner’s statement of reasons for allowance: with respect to claim 14, the prior art fails to teach, or fairly suggest, that the first capacitor structure, the second capacitor structure, and the third capacitor structure, together with the surface electrode and the further surface electrode, form the capacitor, when taken in conjunction with the remaining limitations of claim 14. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DION R FERGUSON whose telephone number is (571)270-7566. The examiner can normally be reached Monday-Friday, 5:30 a.m. - 4:00 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole, can be reached at 571-292-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DION R. FERGUSON/Primary Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Feb 16, 2024
Application Filed
Dec 18, 2025
Non-Final Rejection mailed — §102, §103
Feb 25, 2026
Interview Requested
Mar 09, 2026
Response Filed
Mar 09, 2026
Examiner Interview Summary
Mar 09, 2026
Applicant Interview (Telephonic)
May 26, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12700549
DEVICE AND PROCESS ELECTRICAL CONNECTIONS FOR MANUFACTURE OF CAPACITOR DEVICES
2y 10m to grant Granted Aug 04, 2026
Patent 12701723
METAL SPACER 3D-MIM CAPACITOR
2y 10m to grant Granted Aug 04, 2026
Patent 12695032
MULTILAYER ELECTRONIC COMPONENT
2y 1m to grant Granted Jul 28, 2026
Patent 12688971
MULTILAYER ELECTRONIC COMPONENT
2y 1m to grant Granted Jul 21, 2026
Patent 12688981
SUPERCAPACITOR BATTERY WITH POLYACRYLIC ACID HYDROGEL ELECTROLYTE
1y 10m to grant Granted Jul 21, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
87%
Grant Probability
95%
With Interview (+8.3%)
2y 1m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1015 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month