DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 27th, 2026 has been entered.
Claim Status
Claims 1 and 10 have been amended. Claim 16 remains cancelled. Claims 1-15 and 17-20 remain pending and are ready for examination.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1, 10 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al. (US Publication No. 2023/0236737 – “Kang”) in view of Kavirayani et al. (US Publication No. 2024/0094903 – “Kavirayani”) in further view of Esaka et al. (US Publication No. 2021/0223962 – “Esaka”) in further view of Grimsrud (US Publication No. 2016/0162205 – “Grimsrud”).
Regarding claim 1, Kang teaches A storage device comprising: a memory; and a memory controller configured to: (Kang paragraph [0027], The storage device 100 may include a storage controller 110 and/or a non-volatile memory device 120. The non-volatile memory device 120 may store data. The storage controller 110 may store data in the non-volatile memory device 120 and/or may read data stored in the non-volatile memory device 120) divide the memory into a plurality of zones, assign at least one unit zone to each of the plurality of zones, (Kang paragraph [0028], In some example embodiments, the storage device 100 may assign corresponding memory blocks to a zone depending on a request of the host 11 and may sequentially store data in the assigned memory blocks. The zone may be conceptually referred to as some memory blocks physically continuous to each other from among a plurality of memory blocks. The memory can be divided into a plurality of zones which can each be assigned at least one memory block) store data received from an external device in a first zone among the plurality of zones, (Kang paragraph [0006], receiving a first request indicating a first zone of a plurality of zones from the host, setting a state of the first zone to an active state in response to the first request, assigning a first memory block of a plurality of memory blocks of the non-volatile memory device to the first zone updated to the active state, and storing user data corresponding to the first request in the first memory block. Data from a host may be stored in a first of the plurality of zones) store the data in a first unit zone when the first unit zone is in a zone open state and is included in the first zone and the data is able to be stored in the first unit zone, (Kang paragraph [0008], receiving a first request indicating a first zone of a plurality of zones from the host, setting a state of the first zone to an active state in response to the first request, assigning a first memory block of a plurality of memory blocks of a non-volatile memory device to the first zone updated to the active state, and storing user data corresponding to the first request in the first memory block. If the first zone is available and in an active state, the data will be stored in the first block of the first zone) when the data is not able to be stored in the first unit zone, change a state of the first unit zone to a zone finish state, (Kang paragraph [0064], The ZSC state may indicate a closed state. The transition to the ZSC state may be made 1) when, in the ZSE state, usable active resources are present and a set zone descriptor extension command is received. When the data is unable to be stored in the first zone, the zone may be set to a ZSC state, corresponding to a zone closed state) assign a second unit zone in the zone open state to the first zone, and store the data in the second unit zone, (Kang paragraph [0107], When it is determined that the available capacity is absent from the first-type memory block T1_BLK assigned to the target zone, the block assignment unit 113 may assign the second-type memory block T2_BLK to the target zone. The block assignment unit 113 may request the buffer memory 114a to move the target data stored in the first-type memory block T1_BLK to the second-type memory block T2_BLK. When the first unit zone (i.e., block) is not able to store the data, the data is stored in the second block. The first zone may be closed, as seen above, and store the data in a second zone assigned to an open state, see Kang paragraph [0060], The ZSE state and the ZSF state may be classified as a non-active state. The ZSIO state, the ZSEO state, and the ZSC state may be classified as an active state. Zones of the active state may be limited by a maximum active resources field. The ZSIO state and the ZSEO state may be classified as an open state. Zones of the open state may be limited by a maximum open resources field).
Kang does not teach determine remaining blocks which are empty blocks in the unit zones in the zone finish state, and set the determined remaining blocks as an over-provisioning area which is used during a background operation of the memory controller.
However, Kavirayani teaches determine remaining blocks which are empty blocks in the unit zones in the zone finish state, and set the determined remaining blocks as an over-provisioning area (Kavirayani paragraph [0121], Furthermore, the reduction in size of the L2P mapping table may result in a reduced backup of the L2P mapping table from volatile to non-volatile memory, thus increasing the amount of overprovisioning (OP) available in the storage device and thereby reducing the write amplification factor (WAF). For example, the controller may periodically return or flushs the L2P mapping table to the NVM and generally allocate a large number of physical blocks specifically for writing this L2P mapping table. Here, with the significantly reduced L2P mapping table size as a result of removing L2P entries for inactive zones, the controller may allocate less blocks for the L2P mapping table and may instead utilize these blocks for host data by adding them to a pool of OP blocks. With this increase in available OP blocks, the WAF of the storage device may be reduced and performance increased. When a zone is in a zone finished state, but still has empty blocks, they may be assigned as overprovisioning blocks).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang with those of Kavirayani. Kavirayani teaches using spare/unused blocks in the zone assigned a finished state as overprovisioning blocks, which may improve the performance of the system by enabling those blocks to still be used, also reducing write amplification (see Kavirayani paragraph [0121], Here, with the significantly reduced L2P mapping table size as a result of removing L2P entries for inactive zones, the controller may allocate less blocks for the L2P mapping table and may instead utilize these blocks for host data by adding them to a pool of OP blocks. With this increase in available OP blocks, the WAF of the storage device may be reduced and performance increased).
Kang in view of Kavirayani does not teach determine remaining blocks which are empty blocks in the unit zones in the zone finish state, and set the determined remaining blocks as an over-provisioning area which is used during a background operation of the memory controller.
However, Esaka teaches determine remaining blocks which are empty blocks in the unit zones in the zone finish state, and set the determined remaining blocks as an over-provisioning area (Esaka paragraph [0228], When the number of available SLC blocks in the static SLC buffer is less than threshold Th1 (i.e., wear out), each time a new write destination SLC block needs to be allocated, in other words, each time the write destination SLC block is entirely filled with data, the flash management unit 21 selects a QLC block from the free QLC blocks managed by the empty zone list 104, and allocates the selected QLC block as a new write destination SLC block (open SLC block #1) for the SLC buffer 401. The QLC block may be allocated as a new write destination SLC block (open SLC block #2) for GC. The empty blocks in a particular write zone destination may be stored in a zone list, which can be utilized as an over-provisioned area for specific operations, such as those in Esaka paragraph [0277], When a new write destination block for the dynamic SLC buffer 401B needs to be allocated (YES in step S40), in other words, when the current write destination block for the dynamic SLC buffer 401B is entirely filled with data, the controller 4 performs the process of step S38 again. Specifically, the controller 4 selects another block from a set of blocks in the empty state (free QLC blocks) managed by the empty zone list 104, and allocates the selected block as a new write destination block for the dynamic SLC buffer 401B).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang and Kavirayani with those of Esaka. Esaka teaches using empty blocks as part of a zone in a zone empty list which can be used to provision blocks for specific operations, improving overall reliability and performance (i.e., see Esaka paragraph [0232], In this case, the flash management unit 21 selects the SLC block which has reached the exit of the FIFO list as a copy source block for GC. When valid data is not stored in the selected SLC block, the flash management unit 21 adds the selected SLC block to the empty zone list 104 for the QLC region 202, thereby returning the selected SLC block to the QLC region 202 and Esaka paragraph [0030], The write operation of the second operation includes an operation for writing, in response to receiving a first request from the host, first write data to the second block, the first write data being data among write data associated with one or more write requests received from the host for one first block of the plurality of first blocks and having not been transferred to the buffer, the first request being a request for causing a state of the one first block to transition from a first state of being allocated as a write destination block in which writing of data is possible to a second state in which writing of data is suspended).
Kang in view of Kavirayani in further view of Esaka does not teach an over-provisioning area which is used during a background operation of the memory controller.
However, Grimsrud teaches an over-provisioning area which is used during a background operation of the memory controller (Grimsrud paragraph [0027], The controller 104 includes a an Input/output (I/O) manager 118 to manage read and write requests from the host 100, a flash translation layer 120 to translate logical addresses used by the host operating system 112 to physical locations in the storage array 106; spare block information 122 indicating spare blocks of pages that comprise overprovisioned storage unavailable to the user and for use in garbage collection to consolidate pages in blocks in the user space; free block information 124 indicating blocks of pages that do not have storage and are available to the user; and consumption profile information of the storage device 102. The controller 104 may further include a spare space adjustment module 128 to adjust the spare space or amount of blocks provisioned in the spare space list 124 depending on write activity (i.e., wear level) in the storage device 102. The spare space adjustment module 128 includes a write amplification function 300 that indicates an amount of spare space that should be provisioned for different measured write amplifications. Grimsrud explicitly teaches using an overprovision area comprised of remaining/spare blocks for background controller operations such as garbage collection).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang and Kavirayani and Esaka with those of Grimsrud. Grimsrud explicitly teaches using an overprovision area comprised of remaining/spare blocks for background controller operations such as garbage collection, which ensures that space is always available for background operations to minimize negative effects such as write amplification (i.e., see Grimsrud paragraph [0004], The over-provisioned spare space helps lower write amplification by using the blocks in the spare space for garbage collection to free up blocks to be available for write operations. The amount of spare space impacts the efficiency of the garbage collection by impacting the expected amount of valid and stale data in the block being recycled. For instance, a drive that has greater spare capacity will have more invalid data in a block it selects for garbage collection, since the spare space corresponds to how much total invalid blocks there are in the blocks being garbage collected. Garbage collection ensures that there are always free space blocks available for the write operation so that garbage collection does not need to be used during the write operation to make space available for a write of new data to the non-volatile memory. Manufacturers may configure spare space in the non-volatile memory in the SSD that is unavailable for the user and used for garbage collection, wear leveling and other management operations).
Claim 10 is the corresponding method claim to device claim 1. It is rejected with the same references and rationale.
Regarding claim 20, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud teaches The storage device of claim 1, wherein the empty blocks have no data written therein (Kang paragraph [0061], The ZSE state may indicate an empty state. In the ZSE state, data may not be yet stored in memory blocks, and the write pointer may indicate the lowest logical block address (e.g., a logical block address having the lowest number from among logical block addresses managed by a zone). The write pointer of the ZSE state may be valid. The ZSE state may transition to one of the ZSIO state, the ZSEO state, the ZSC state, and the ZSF state. Data blocks in a zone empty state are considered to be blocks without any data stored in them).
Claim(s) 2-3 and 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud as applied to claim 1 above, and further in view of Helmick et al. (US Publication No. 2024/0160372 – “Helmick”).
Regarding claim 2, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud and further in view of Helmick teaches The storage device of claim 1, wherein the memory controller is configured to: receive scatter gather list activation information from the external device, and maintain a scatter gather list activation state according to the scatter gather list activation information (Helmick paragraph [0054], As will be discussed in further detail below with reference to the figures, a live migration controller (e.g., a source live migration controller) may assist a live migration server (e.g., a source live migration server) in management of a live migration operation by creating the tracking metadata. For example, generating the tracking metadata may include the creation of data structures (e.g., bitmaps or scatter-gather lists), which are temporary communication mechanisms, used to identify locations of user data writes that are written within the source storage during a time period in which a first iteration of an instance of copying data from the source storage to the target storage occurs. The scatter-gather list is generated based on the user data write command).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang and Kavirayani and Esaka and Grimsrud with those of Helmick. Helmick teaches generating a scatter-gather list in response to a command from an external device (i.e., user data write request) and may provide a more efficient means of providing and updating location metadata for stored data (see Helmick paragraph [0053], Data structures, such as bitmaps and/or scatter-gather lists (e.g., a list of vectors, each of which gives the location and length of one segment in the overall read or write request), may be used to track locations of data within the source storage to be copied to the target storage. For example, an entire source storage drive, which may have a large storage capacity (e.g., 8 terabytes (TB)), may have each logical block address/LBA (e.g., 4 kilobytes (KB)) represented by a significantly smaller size of tracking metadata, in one or more data structures, to indicate whether a corresponding LBA includes data that should be copied from the source storage to the target storage).
Regarding claim 3, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud and further in view of Helmick teaches The storage device of claim 2, wherein the memory controller is configured to: receive a scatter gather list generation on command from the external device, (Helmick paragraph [0021], The storage device may be configured to generate a scatter-gather list or a bitmap based on a user data write received in the source storage. A scatter-gather may be generated in response to a command from an external device (i.e., user data write request)) and generate a scatter gather list based on the scatter gather list generation on command (Helmick paragraph [0054], As will be discussed in further detail below with reference to the figures, a live migration controller (e.g., a source live migration controller) may assist a live migration server (e.g., a source live migration server) in management of a live migration operation by creating the tracking metadata. For example, generating the tracking metadata may include the creation of data structures (e.g., bitmaps or scatter-gather lists), which are temporary communication mechanisms, used to identify locations of user data writes that are written within the source storage during a time period in which a first iteration of an instance of copying data from the source storage to the target storage occurs. The scatter-gather list is generated based on the user data write command).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang and Kavirayani and Esaka and Grimsrud with those of Helmick. Helmick teaches generating a scatter-gather list in response to a command from an external device (i.e., user data write request) and may provide a more efficient means of providing and updating location metadata for stored data (see Helmick paragraph [0053], Data structures, such as bitmaps and/or scatter-gather lists (e.g., a list of vectors, each of which gives the location and length of one segment in the overall read or write request), may be used to track locations of data within the source storage to be copied to the target storage. For example, an entire source storage drive, which may have a large storage capacity (e.g., 8 terabytes (TB)), may have each logical block address/LBA (e.g., 4 kilobytes (KB)) represented by a significantly smaller size of tracking metadata, in one or more data structures, to indicate whether a corresponding LBA includes data that should be copied from the source storage to the target storage).
Regarding claim 5, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud and further in view of Helmick teaches The storage device of claim 3, wherein the memory controller is configured to transmit a number of the remaining blocks to the external device (Kavirayani paragraph [0121], Furthermore, the reduction in size of the L2P mapping table may result in a reduced backup of the L2P mapping table from volatile to non-volatile memory, thus increasing the amount of overprovisioning (OP) available in the storage device and thereby reducing the write amplification factor (WAF). For example, the controller may periodically return or flushs the L2P mapping table to the NVM and generally allocate a large number of physical blocks specifically for writing this L2P mapping table. Here, with the significantly reduced L2P mapping table size as a result of removing L2P entries for inactive zones, the controller may allocate less blocks for the L2P mapping table and may instead utilize these blocks for host data by adding them to a pool of OP blocks. With this increase in available OP blocks, the WAF of the storage device may be reduced and performance increased. When a zone is in a zone finished state, but still has empty blocks, they may be assigned as overprovisioning blocks).
Claim(s) 4 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud in further view of Helmick as applied to claim 4 above, and further in view of Shinde et al. (US Publication No. 2023/0027307 – “Shinde”).
Regarding claim 4, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud in further view of Helmick and further in view of Shinde teaches The storage device of claim 3, wherein the memory controller is configured to: extract physical addresses of the remaining blocks based on the scatter gather list generation on command, generate the scatter gather list by collecting the extracted physical addresses, and set areas corresponding to the physical addresses (Shinde paragraph [0030], At step 404, transient cache manager 136 creates TC 152 by aggregating unused space in process code sections as identified by unused space metadata received in step 402. Transient cache manager 136 creates TC metadata used to access TC 136. For example, at step 406, transient cache manager 136 can generate a scatter-gather list (SGL) of elements, each having address information and length of unused space that is part of TC 136. The address information can include a mapping of a guest physical page number to a machine page number and an offset into the page. The SGL effectively coalesces the disparate unused spaces into a block of memory in a linear address space. The scatter-gather list data can be generated and extracted for unused (i.e., remaining) blocks, and use address mapping information to allocate it to physical memory) as the over provisioning area (Kavirayani paragraph [0121], Furthermore, the reduction in size of the L2P mapping table may result in a reduced backup of the L2P mapping table from volatile to non-volatile memory, thus increasing the amount of overprovisioning (OP) available in the storage device and thereby reducing the write amplification factor (WAF). For example, the controller may periodically return or flushs the L2P mapping table to the NVM and generally allocate a large number of physical blocks specifically for writing this L2P mapping table. Here, with the significantly reduced L2P mapping table size as a result of removing L2P entries for inactive zones, the controller may allocate less blocks for the L2P mapping table and may instead utilize these blocks for host data by adding them to a pool of OP blocks. With this increase in available OP blocks, the WAF of the storage device may be reduced and performance increased. When a zone is in a zone finished state, but still has empty blocks, they may be assigned as overprovisioning blocks).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang, Kavirayani, Esaka, Grimsrud and Helmick with those of Shinde. Shinde teaches using a scatter-gather list generation to detect unused memory spaces and allocate them with corresponding physical address locations, which can improve memory functioning by minimizing unused memory space (see Shinde paragraph [0022], Transient cache manager 136 passes information about TC 152 to transient cache driver 128 in the selected VM 120. Transient cache driver 128 hooks into memory manager 125 and monitors for PAGE_IN and PAGE_OUT swap operations. If possible, transient cache driver 128 can page in/out from TC 152, which avoids use of page file 150 and increases performance).
Regarding claim 6, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud in further view of Helmick and further in view of Shinde teaches The storage device of claim 4, wherein the memory controller is configured to: divide the plurality of zones into a first type zone including a unit zone including single-level cells (SLC), and a second type zone including a unit zone including X-level cells (XLC), where X is an integer greater than or equal to two, (Kang paragraph [0080], In some example embodiments, the number of memory blocks assigned to one zone may change depending on a type of a memory block. For example, when a memory block is an SLC memory block, 4 SLC memory blocks may be assigned to one zone. When a memory block is an MLC memory block, 2 MLC memory blocks may be assigned to one zone. When a memory block is a QLC memory block, one QLC memory block may be assigned to one zone. The zones may be assigned a different characteristic (i.e., SLC or QLC blocks used) for each of the plurality of zones) and generate the scatter gather list for the first type zone and the second type zone (Helmick paragraph [0054], As will be discussed in further detail below with reference to the figures, a live migration controller (e.g., a source live migration controller) may assist a live migration server (e.g., a source live migration server) in management of a live migration operation by creating the tracking metadata. For example, generating the tracking metadata may include the creation of data structures (e.g., bitmaps or scatter-gather lists), which are temporary communication mechanisms, used to identify locations of user data writes that are written within the source storage during a time period in which a first iteration of an instance of copying data from the source storage to the target storage occurs. The scatter-gather list is generated based on the user data write command).
Claim(s) 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud Helmick and further in view of Shinde as applied to claim 6 above, and further in view of Leonard et al. (US Publication No. 2023/0297279 – “Leonard”).
Regarding claim 7, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud in further view of Helmick and further in view of Shinde and further in view of Leonard teaches The storage device of claim 6, wherein the memory controller is configured to: receive, from the external device, type configuration information of the scatter gather list, and maintain the scatter gather list activation state (For the mapping information stored in a scatter-gather list, see (Helmick paragraph [0054], As will be discussed in further detail below with reference to the figures, a live migration controller (e.g., a source live migration controller) may assist a live migration server (e.g., a source live migration server) in management of a live migration operation by creating the tracking metadata. For example, generating the tracking metadata may include the creation of data structures (e.g., bitmaps or scatter-gather lists), which are temporary communication mechanisms, used to identify locations of user data writes that are written within the source storage during a time period in which a first iteration of an instance of copying data from the source storage to the target storage occurs. The scatter-gather list is generated based on the user data write command) for the unit zone included in a zone specified by the received type configuration information (Leonard paragraph [0051], The processing logic can operate in a particular operating mode for managing data storage between SLC cache and XLC storage. For example, the operating mode can be a default mode or an enhanced data retention mode. The operating mode can be determined based on metadata indicating the mode that is maintained by the memory sub-system (e.g., in the SLC cache behavior profile. The mapping metadata may be maintained and updated for zones of a particular storage type (i.e., SLC cache)).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang, Kavirayani, Esaka, Grimsrud and Helmick and Shinde with those of Leonard. Leonard explicitly teaches maintaining and updating mapping metadata for memory regions of a particular determined characteristic, in this case SLC configuration memory, which can be used to minimize the amount of data that needs to be transferred between different memory types (see Leonard paragraph [0020], The enhanced maximum size is greater than the default maximum size, and less than or equal to the theoretical maximum size described above. For example, the enhanced maximum size can be selected to be less than the theoretical maximum size to maintain desired memory sub-system performance by limiting the impact of moving data from SLC cache to XLC storage. In some embodiments, the enhanced maximum size is 20% of the memory sub-system storage capacity. However such an example should not be considered limiting. The enhanced maximum size can be predetermined by the manufacturer at the time of manufacture, and stored in the SLC cache behavior profile maintained by the memory sub-system).
Regarding claim 8, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud in further view of Helmick and further in view of Shinde and further in view of Leonard teaches The storage device of claim 7, wherein, when the type configuration information of the scatter gather list supports both the first type zone and the second type zone, the memory controller is configured to maintain the scatter gather list activation state for both the first type zone and the second type zone (Leonard paragraph [0051], The processing logic can operate in a particular operating mode for managing data storage between SLC cache and XLC storage. For example, the operating mode can be a default mode or an enhanced data retention mode. The operating mode can be determined based on metadata indicating the mode that is maintained by the memory sub-system (e.g., in the SLC cache behavior profile. The mapping metadata may be maintained and updated for both SLC and XLC zones).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang, Kavirayani, Esaka, Grimsrud and Helmick and Shinde with those of Leonard. Leonard explicitly teaches maintaining and updating mapping metadata for memory regions of a particular determined characteristic, in this case SLC configuration memory, which can be used to minimize the amount of data that needs to be transferred between different memory types (see Leonard paragraph [0020], The enhanced maximum size is greater than the default maximum size, and less than or equal to the theoretical maximum size described above. For example, the enhanced maximum size can be selected to be less than the theoretical maximum size to maintain desired memory sub-system performance by limiting the impact of moving data from SLC cache to XLC storage. In some embodiments, the enhanced maximum size is 20% of the memory sub-system storage capacity. However such an example should not be considered limiting. The enhanced maximum size can be predetermined by the manufacturer at the time of manufacture, and stored in the SLC cache behavior profile maintained by the memory sub-system).
Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud in further view of Helmick and further in view of Shinde as applied to claim 4 above, and further in view of Schauer et al. (US Publication No. 2021/0103445 – “Schauer”).
Regarding claim 9, Kang in view of Kavirayani in further view of Esaka in further view of Grimsrud in further view of Helmick and further in view of Shinde and further in view of Schauer teaches The storage device of claim 4, wherein the memory controller is configured to: receive, from the external device, a scatter gather list generation off command, and stop generating the scatter gather list according to the scatter gather list generation off command (Schauer paragraph [0045], At block 306, prefetch processor 204 processes SGL descriptor 512, in one embodiment comprising a descriptor of 30h, indicating that SGL descriptor 512 is a pointer to the last SGL descriptor needed to execute the command, i.e., SGL descriptor 520 (which may be a contiguous SGL segment with SGL segment 512, or discontinuous as shown in FIG. 5). Prefetch processor 204 does not copy the information in SGL descriptor 512 into pointer list 506. Rather, it reads the information in SGL descriptor 520 and creates pointer 518 in pointer list 506. Then, prefetch processor stops creating any further pointers in pointer list 506, because prefetch processor knows that SGL descriptor 520 was the last SGL descriptor needed to transfer all of the data associated with the command. SGL commands may be paused or stopped in response to a host command, and further pointers may stop being generated/updated).
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to combine the teachings of Kang, Kavirayani, Esaka, Grimsrud and Helmick and Shinde with those of Schauer. Schauer teaches stopping generating/updating SGL data, which can avoid creating unnecessary pointers when data cannot be written to the targeted section of memory (i.e., see Schauer paragraph [0046], In another embodiment, descriptor 30h is not used to indicate a last SGL descriptor. In this embodiment, prefetch processor 204 determines the last SGL descriptor by calculating the total length of the transfer (based on the command information of the total number of sectors, or in the event that the command is not a Read or Write command, the data length format specific to the command, such as the number of DWords or Bytes), and then adding the data length indicated by each processed SGL descriptor to track a cumulative data transfer length. When the cumulative data transfer length equals the total length of the transfer, as indicated by the command, prefetch processor 204 stops processing further SGL descriptors associated with the command).
Allowable Subject Matter
Claims 11-15 and 17-19 allowed.
The following is a statement of reasons for the indication of allowable subject matter: Independent claim 11 has been amended to recite the previous subject matter of now cancelled dependent claim 16. The claim limitation recites further details regarding the unit zones comprising the zone memory region, wherein a unit zone comprises both a unit zone in a finish zone state and a unit zone in a zone open state. The memory controller is further configured to compress data stored in the unit zone in the zone finish, among the unit zones of the characteristic zone in which the zone compression activation is set. This process of compressing data in a unit zone containing data of a particular characteristic type while also being in a zone finish state is not taught in the technological field and novel over the existing prior art. Dependent claims 12-15 and 17-19 are indicated as allowable due to dependence upon an allowable independent claim.
Response to Arguments
Applicant’s arguments, see pages 1-6 (numbered pages 9-14), filed February 9th, 2026, with respect to the rejection(s) of claim(s) 1-10 and 20 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Kang et al. (US Publication No. 2023/0236737 – “Kang”) in view of Kavirayani et al. (US Publication No. 2024/0094903 – “Kavirayani”) in further view of Esaka et al. (US Publication No. 2021/0223962 – “Esaka”) in further view of Grimsrud (US Publication No. 2016/0162205 – “Grimsrud”).
The Grimsrud reference has been added to disclose amended independent claims 1 and 10, to further recite that the overprovisioning area comprised of remaining blocks is used by the memory controller to perform background operations (i.e., garbage collection), as described in further detail above. In light of the newly added reference and rationale, the 35 USC 103 Rejection is maintained.
Conclusion
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/J.C.K./ Examiner, Art Unit 2133
/ROCIO DEL MAR PEREZ-VELEZ/Supervisory Patent Examiner, Art Unit 2133
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