DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. Claims 1 – 20 are currently pending in this application.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Parla et al. (Pre-Grant Publication No. US 2025/0294081 A1), hereinafter Parla, in view of Yamamichi et al. (Pre-Grant Publication No. US 2002/0116612 A1), hereinafter Yama.
2. With respect to claim 1, Parla taught a hardware component for acceleration of quick UDP internet connections data packets (0032 and figure 17, where the acceleration is the intended results of the system), the hardware component comprising: a data store on which is stored a table, wherein the table stores information corresponding to a direction in which the QUIC data packets are to flow through a network (0056); and a plurality of logic elements to: receive information for a QUIC connection (0046); determine a direction of initiation of the QUIC connection (0046 & 0090, where the directions is determined by the CID length and can be further seen in figures 8A & 8B); and cause the received information to be stored in table depending upon the determined direction of the QUIC connection initiation (0063).
However, Parla did not explicitly state that the datastore table comprised a first table based on traffic in a first direction and a second table based on traffic in a second direction. On the other hand, Yama did teach that the datastore table comprised a first table based on traffic in a first direction and a second table based on traffic in a second direction (claim 11). Both of the systems of Parla and Yama are directed towards managing data storage for directional traffic and therefore, it would have been obvious to a person having ordinary skill in the art, at the time of the effective filing of the invention, to modify the teachings of Parla, to utilize separate directional tables, as taught by Yama, in order to more efficiently lookup table information by being able to go directly to the required information without having to navigate through incorrect directional data.
3. With respect to claim 10, Parla taught a system for hardware acceleration of quick UDP internet connections data packet processing (0032 and figure 17, where the acceleration is the intended results of the system), the system comprising: a hardware component comprising a data store on which is a stored table (0056); and a virtual machine (0086) to: communicate information for a QUIC connection to the hardware component, wherein the hardware component is to: receive the information for the QUIC connection (0046); determine whether initiation of the QUIC connection is from a client or a server (0090, where the direction is determined); select the table entry based on whether the QUIC connection initiation is from the client or the server (0052, the determined direction); identify an entry in the selected one of the first table or the second table corresponding to the data packet (0046 & 0090, where the directions is determined by the CID length and can be further seen in figures 8A & 8B); and store the information for the QUIC connection in the identified entry of the selected one of the first table or the second table (0063).
However, Parla did not explicitly state that the datastore table comprised a first table based on traffic in a first direction and a second table based on traffic in a second direction. On the other hand, Yama did teach that the datastore table comprised a first table based on traffic in a first direction and a second table based on traffic in a second direction (claim 11). Both of the systems of Parla and Yama are directed towards managing data storage for directional traffic and therefore, it would have been obvious to a person having ordinary skill in the art, at the time of the effective filing of the invention, to modify the teachings of Parla, to utilize separate directional tables, as taught by Yama, in order to more efficiently lookup table information by being able to go directly to the required information without having to navigate through incorrect directional data.
4. With respect to claim 17, Parla taught a method for offloading processing of quick UDP internet connections data packets to a hardware component (0032 and figure 17, where the acceleration is the intended results of the system), the method comprising: receiving, by the hardware component, information for initiation of a QUIC connection (0056), determining, by the hardware component, a direction of the QUIC connection initiation (0046 & 0090, where the directions is determined by the CID length and can be further seen in figures 8A & 8B); based on the QUIC connection being initiated in a first direction, performing, by the hardware component, and causing, by the hardware component, the information to be stored in a table according to a storage location (0063); and causing, by the hardware component, the information to be stored in a table according to the storage location (0063).
However, Parla did not explicitly state that a hashing operation of the information to obtain a hash value, wherein according to the hash value; or based on the QUIC connection being initiated in a second direction, performing, by the hardware component, a hashing operation of the information to obtain a hash value, and the storage location being according to the hash value. On the other hand, Yama did teach that a hashing operation of the information to obtain a hash value, wherein according to the hash value; or based on the QUIC connection being initiated in a second direction, performing, by the hardware component, a hashing operation of the information to obtain a hash value (0024), and the storage location being according to the hash value (0024). Both of the systems of Parla and Yama are directed towards managing data storage for directional traffic and therefore, it would have been obvious to a person having ordinary skill in the art, at the time of the effective filing of the invention, to modify the teachings of Parla, to utilize separate directional tables, as taught by Yama, in order to more efficiently lookup table information by being able to go directly to the required information without having to navigate through incorrect directional data.
5. As for claims 2, 11, and 18, they are rejected on the same basis as claims 1, 10, and 17 (respectively). In addition, Parla taught wherein the plurality of logic elements are to: determine a connection identification length identified in the information (0090 & figures 8A, &B); determine a user datagram protocol port identified in the information (0040); and determine the direction of the QUIC connection initiation based on the determined CID length and the determined UDP (0062 & 0090).
6. As for claim 3, it is rejected on the same basis as claim 2. In addition, Parla taught wherein the first table is addressable using the CID of the QUIC connection and the second table is addressable without using the CID of the QUIC connection (0046, the short DCID).
7. As for claims 4 and 12, they are rejected on the same basis as claims 1 and 10 (respectively). In addition, Yama taught wherein the plurality of logic elements are to: perform a hashing operation on the information to obtain a hash value (0068); and use the hash value as a row number in the first table or the second table into which the information is stored (0024).
8. As for claim 5, it is rejected on the same basis as claim 1. In addition, Parla taught wherein the information for the QUIC connection comprises a connection identification of the QUIC connection, a destination port, a destination address, an encryption key, and a decryption key (0063, where the encryption/decryption can be seen in 0157).
9. As for claims 6, 14, and 19, they are rejected on the same basis as claims 1, 10, and 17 (respectively). In addition, Parla taught wherein the plurality of logic elements are to: receive a data packet (0034); obtain header information about the data packet (0033); determine a direction in which the data packet is being communicated through the network (0046); select one of the first table or the second table depending upon the determined direction of the data packet communication (Yama: claim 11); identify an entry in the selected one of the first table or the second table corresponding to the data packet (Yama: Claim 11); and use information contained in the identified entry to process the data packet (0046).
10. As for claims 7, 15, and 20, they are rejected on the same basis as claims 6, 14, and 19 (respectively). In addition, Yama taught wherein the plurality of logic elements are to: perform a hashing operation on the header information to obtain a hash number (0068); and identify a row number in the selected one of the first table or the second table corresponding to the hash number to identify the entry (0024); access information contained in the identified row number (claim 11); and use the accessed information to process the data packet (0024).
11. As for claim 8, it is rejected on the same basis as claim 7. In addition, Parla taught wherein the plurality of logic elements are further to: perform the hashing operation on the header information using a connection identification included in the header information based on the determined direction being from a client to a server (0063, where storing data via hashing was previously shown by Yama: 0024); or perform the hashing operation on the header information without using the CID based on the determined direction being from the server to the client (0046, the shortened header).
12. As for claims 9 and 16, they are rejected on the same basis as claims 6 and 14 (respectively). In addition, Yama taught wherein the information contained in the selected one of the first table and the second table includes crypto information (claim 11 & 0025, where the cryptography can be seen), and wherein the plurality of logic elements are further to: encrypt or decrypt the data packet using crypto information contained in the identified entry to process the data packet (0006).
13. As for claim 13, it is rejected on the same basis as claim 10. In addition, Yama taught wherein each entry in the first table and each entry in the second table contains information and a valid bit that indicates a validity of the entry, and wherein the valid bit is to be changed after valid information for the entry has been entered into the first table or the second table (claim 11 & abstract, where systems flip bits as part of the logic. In other words, if validity is determined, then a bit is flipped to allow the system to understand that the transaction is valid under broadest reasonable interpretation).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
(a) Geffen et al. (Patent No. US 12,166,684 B2), columns 1-2.
(b) Mestery et al. (Pre-Grant Publication No. US 2023/0085513 A1), 0090-0094.
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/JOSEPH L GREENE/Primary Examiner, Art Unit 2443
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