Prosecution Insights
Last updated: July 17, 2026
Application No. 18/447,671

QUANTUM LOGIC GATE OPERATION DEVICE, QUANTUM LOGIC GATE OPERATION METHOD AND A NON-TRANSITORY COMPUTER-READABLE MEDIUM

Final Rejection §103
Filed
Aug 10, 2023
Priority
Aug 10, 2022 — JP 2022-127743
Examiner
LUDWIG, PETER L
Art Unit
3627
Tech Center
3600 — Transportation & Electronic Commerce
Assignee
Riken
OA Round
2 (Final)
35%
Grant Probability
At Risk
3-4
OA Rounds
8m
Est. Remaining
58%
With Interview

Examiner Intelligence

Grants only 35% of cases
35%
Career Allowance Rate
193 granted / 549 resolved
-16.8% vs TC avg
Strong +23% interview lift
Without
With
+23.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 8m
Avg Prosecution
48 currently pending
Career history
607
Total Applications
across all art units

Statute-Specific Performance

§101
11.1%
-28.9% vs TC avg
§103
71.0%
+31.0% vs TC avg
§102
9.9%
-30.1% vs TC avg
§112
7.9%
-32.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 549 resolved cases

Office Action

§103
DETAILED ACTION This Final Office action is in response to Applicant’s Amendment filed on 06/01/2026. Claims 1-14 are pending. The effective filing date of the claimed invention is 08/10/2022. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1, 5, 6, 8-14 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pat. Pub. No. 2018/0225586 to Chow et al. (“Chow”) in view of U.S. Pat. Pub. No. 2021/0258079 to Lauer et al. (“Lauer”). With regard to claims 1, 13, 14, Chow discloses the claimed quantum logic gate operation device (Chow e.g. [0048], abstract), comprising: two-qubit system in which a control qubit and a target qubit are coupled (Chow e.g. [0004] The system can further comprise a target qubit coupled to the control qubit; Lauer further teaches a pair of coupled target/control qubits e.g. [0021]); a cross resonance drive pulse irradiator that irradiates the control qubit with a cross resonance drive pulse having an eigen frequency of the target qubit (Chow e.g. [0009] The method also includes generating cross-resonance pulses at a second frequency on resonance with the target qubit and applying the cross-resonance pulses to the control qubit; Lauer at e.g. [0021] the cross-resonance gate is achieved on a pair of coupled qubits by driving one (e.g., driving the control qubit) at the fundamental frequency of the other (e.g., the target qubit)); an echo pulse irradiation unit that irradiates the control qubit with an echo pulse to invert the quantum state of the control qubit (Chow e.g. [0009] generating echo pulses and directing the echo pulses to the control qubit on resonance with the control qubit; Chow at [0048] discusses uses π echo that implies inversion, but Chow does not use the words inverted state; Lauer at [0006] teaches a state inversion pulse component that applies a pulse to the control qubit for creating an inverted state relative to a current state of the control qubit); and a control unit (Chow e.g. [0010] The apparatus further comprises system controller circuitry comprising one or more processors and one or memories having computer readable code.), wherein the control unit controls the echo pulse irradiation unit such that the echo pulse irradiation unit (Chow e.g. [0010] system controller circuitry comprising one or more processors and memories having code that causes/controls pulse operations (echo pulses and CR pulses, etc.)); irradiates the cross resonance drive pulse of the first phase during the first period of the quantum logic gate operation (Chow e.g. [0009] CR pulses are generated/applied, but Chow does not break operation into “first period” with specified “first phase”; Lauer teaches e.g. [0022] ac echoed CR gate splits the operation in two . . . then the second half is performed with the opposite phase, this supplies an explicit first portion with one phase concept in echoed CR operation), irradiates the cross resonance drive pulse with continuously changing the phase of the cross resonance drive pulse from the first phase to the second phase while maintaining the intensity of the cross resonance drive pulse during the second period of the quantum logic gate operation (Chow teaches [0011] Hamiltonian tomography measurements where “cross-resonance pulses . . . are swept from a beginning phase to an ending phase at a specific amplitude.” This is explicit teaching of a continuous phase sweep (begin to end) while holding amplitude (intensity) fixed at specific amplitude. Chow does not explicitly teach where the phase sweep is performed at the second period of the quantum logic gate operation. Chow presents it as part of a tomography/tuneup/configuration. Lauer teaches at e.g. [0022], [0006], [0065-68] the gate operation sequencing period structure and phase endpoints, where echoed CR operation is implemented as two halves with opposite phase, giving the first/second phase endpoints for the CR operation in a gate context. Lauer also teaches use of a phase-inverted cross resonance pulse (i.e. second phase/opposite phase) and describes 180 degrees phase difference between the earlier and later signals.), irradiates the cross resonance drive pulse of the second phase during the third period of the quantum logic gate operation (Chow teaches CR pulses and phase as a parameter, but not a clearly labelled third period having second phase; Again, Lauer teaches [0022] [0006] [0065-68] later phase-inverted cross-resonance pulse (i.e. second phase/opposite phase) including substantially 180 degrees phase difference relative to earlier signals) and irradiates an echo pulse during the second period of the quantum logic gate operation (Chow [0009] echo pulses directed to the control qubit; the temporal placement of the second period is not taught in Chow; See Lauer [0022] the echoed CR sequence includes inverting the control qubit sate between the two halves, Lauer [0006] state inversion pulse component applies the inversion pulse to the control qubit (echo/inversion) as part of the system components). In other words, Chow [0011] teaches supplying the phase sweep at specific amplitude (continuous phase change and constant intensity); Lauer teaches [0022], [0006], [0065-68] supplying the echoed CR gate operation sequencing and the opposite/phase inverted CR pulse endpoints. It would have been obvious to one of ordinary skill in the quantum logic gate art before the effective foiling date of the claimed invention to modify Chow’s CR gate control/tuneup framework, with Lauer’s echoed-CR decoupling/echo sequencing techniques, as the combination reduces coherent error sources and improves gate fidelity. Lauer [0022] explains that undesired couplings in CR/echoed-CR gates lead to coherent error and motivates improvements specifically in the context of echoed cross resonance gates. The references are in the same narrow technical space (superconducting echoed-CR gate operation) and they both frame their contributions as reducing coherent errors that otherwise limit gate performance/fidelity. Lauer, [0023] [0076]. With regard to claim 5, Chow [0049] further discloses chaging the CR phase by shifting sideband phase on an AWG and tuning the CR phase for desired Hamoltonian terms. Chow does not explicitly teach limit phases to 0 and pie. Lauer teaches opposite phase/180 degree phase difference between pulse portions, which corresponds directly to a ppie phase inversion concept. Lauer [0022] [0065]. See combination above. With regard to claim 6, Chow further discloses characterized in that the quantum logic gate operation device is a CNOT gate (Chow e.g. [0049] [0073]). With regard to claim 8, Chow further discloses in that the control qubit and the target qubit are superconducting qubits (Chow e.g. [0009-11]). With regard to claim 9, Chow further discloses in that the control unit includes an arbitrary waveform generator (Chow e.g. [0031]). With regard to claim 10-11, Chow further discloses the cross resonance drive pulse irradiation unit and the echo pulse irradiation unit are integrated/separate (see Fig. 1A). With regard to claim 12, Chow further discloses the control unit controls the cross resonance drive pulse irradiation unit and the echo pulse irradiation unit to repeatedly perform a set of phase changes of the cross resonance drive pulses and irradiation of the echo pulses (Chow at [0011] [0015] calibrating/operating the echoed CR gate using repeated application/tune-up sweeps, and then using the results to configure subsequent operations, benchmark/calibration context consistent with repeated applications). Claims 2-3 are rejected under 35 U.S.C. 103 as being unpatentable over Chow, Lauer, and U.S. Pat. Pub. No. 2019/0007051 to Sete et al. (“Sete”). With regard to claim 2-3, Chow discloses echo pulses directed to the control qubit (echo pulse generation/routing) as part of the CR gate system. Chow, [0009-10]. Chow does not explicitly teach that the echo pulse is frequency modulated. Lauer teaches a state inversion pulse at the control qubit (echo-type inversion concept) but does not expressly state frequency modulated. Lauer, [0023]. Sete teaches at e.g. abstract [0109] using a control signal configured to modulate a transition frequency of a qubit device at a modulation frequency, with the transition frequency shown as modulated over time. For claim 3, see Sete [0109] explicity teaches a qubit transition frequency that is modulated over time (“transition frequency . . . is modulated at the modulation frequency.”) Therefore, it would have been obvious to one of ordinary skill in the quantum logic gates art before the effective filing date of the claimed invention to modify Chow, Lauer to include the frequency modulation of Sete, where the advantage is to supply the general quantum-control concept of frequency modulation of qubit-related control (transition frequency) at a modulation frequency. Further, see Sete at [0040] “control signals that include a modulation frequency (e.g., a microwave tone) can be more robust to, or even immune to, certain control imperfections (e.g., errors associated with fast dc pulses, etc.). As another example, parametrically activated two-qubit gates may be produced by an interaction having an effective interaction strength that is first order in the bare frequency coupling strength, which may provide an advantage over gates where the interaction strength scales inversely to the detuning (and the detuning can be quite large).” Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Chow, Lauer, Sete, and Schutjens et al. (2013). Single qubit gates in frequency-crowded transmon systems, arXiv:1306.2279 (referred to as “Schutjens”). With regard to claim 4, Chow does not teach claim 4. Schutjens teaches at e.g. page 2, shown here: PNG media_image1.png 294 375 media_image1.png Greyscale Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination to include such a change in the anharmonicity, as this is used in the detuning process. See Schutjens, page 2. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Chow, Lauer, in view of Muradian, Rudolph et al. (2019) Generators and roots of the quantum logic gates. arXiv:quant-ph/0511250 (referred to as “Rudolph”). With regard to claim 7, Chow does not teach claim 7. Rudolph teaches that it would have been obvious to one of ordinary skill in the quantum logic gates art to modify Chow to include such square root of CNOT, for instance, Rudolph throughout teaches that the quantum gate logic can be a square root of CNOT, e.g. page 5-9, where the advantage is shown in Rudolph, page 9, “We have derived some useful relations for a series of quantum logic gates which can be assembled into circuits to perform more complicated quantum operations. For example, the Controlled-square-root of-NOT gate √ CNOT and square root of SWAP gate √ SW AP are frequently used in synthesis of quantum circuits.” Response to Arguments Applicant's arguments filed 06/01/2026 have been fully considered but they are not persuasive. At first Applicant provides a large explanation of their own invention. The first argument found is at page 10/11, PNG media_image2.png 168 673 media_image2.png Greyscale The examiner recommends putting that in the claim language. The examiner notes that Applicant has not mentioned the prior art references in the argument section, except when restating the rejection. It is unclear what is being argued, or what is not being argued, based on not arguing the references at all, just explaining and arguing claim language. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Peter Ludwig whose telephone number is (571)270-5599. The examiner can normally be reached Mon-Fri 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fahd Obeid can be reached at 571-270-3324. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PETER LUDWIG/Primary Examiner, Art Unit 3627
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Prosecution Timeline

Aug 10, 2023
Application Filed
Mar 02, 2026
Non-Final Rejection mailed — §103
Jun 01, 2026
Response Filed
Jun 22, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
35%
Grant Probability
58%
With Interview (+23.3%)
3y 8m (~8m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 549 resolved cases by this examiner. Grant probability derived from career allowance rate.

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