DETAILED ACTION This Non-Final Office action is in response to Applicant’s filing on 09/28/2023. Claims 1-14 are pending. The effective filing date of the claimed invention is 08/10/2022. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “ a cross resonance drive pulse irradiator ” in claim 1, line 4; see also claim 13-14, recited as “ a cross resonance drive pulse irradiating step of .” “ an echo pulse irradiation unit ” in claim 1, line 7; see also claim 13-14, recited as “ an echo pulse irradiating step of .” “ a control unit ” in claim 1, line 10. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.— The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “the first phase” (line 13); “the first period” (line 14); “the second phase” (line 17); “the second period” in line 18; “the third period” in line 21. Each of these recitations there is a lack of proper antecedent basis, thereby rendering the claim indefinite. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim s 1, 5, 6, 8-14 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Pat. Pub. No. 2018/0225586 to Chow et al. (“Chow”) in view of U.S. Pat. Pub. No. 2021/0258079 to Lauer et al. (“Lauer”) . With regard to claims 1, 13, 14 , Chow discloses the claimed quantum logic gate operation device ( Chow e.g. [0048], abstract) , comprising: two-qubit system in which a control qubit and a target qubit are coupled ( Chow e.g. [0004] The system can further comprise a target qubit coupled to the control qubit; Lauer further teaches a pair of coupled target/control qubits e.g. [0021] ) ; a cross resonance drive pulse irradiator that irradiates the control qubit with a cross resonance drive pulse having a eigen frequency of the target qubit ( Chow e.g. [0009] The method also includes generating cross-resonance pulses at a second frequency on resonance with the target qubit and applying the cross-resonance pulses to the control qubit; Lauer at e.g. [0021] the cross-resonance gate is achieved on a pair of coupled qubits by driving one (e.g., driving the control qubit) at the fundamental frequency of the other (e.g., the target qubit) ) ; an echo pulse irradiation unit that irradiates the control qubit with an echo pulse to invert the quantum state of the control qubit ( Chow e.g. [0009] generating echo pulses and directing the echo pulses to the control qubit on resonance with the control qubit; Chow at [0048] discusses uses π echo that implies inversion, but Chow does not use the words inverted state; Lauer at [0006] teaches a state inversion pulse component that applies a pulse to the control qubit for creating an inverted state relative to a current state of the control qubit ) ; and a control unit ( Chow e.g. [0010] The apparatus further comprises system controller circuitry comprising one or more processors and one or memories having computer readable code. ) , wherein the control unit controls the echo pulse irradiation unit such that the echo pulse irradiation unit ( Chow e.g. [0010] system controller circuitry comprising one or more processors and memories having code that causes/controls pulse operations (echo pulses and CR pulses, etc.) ); irradiates the cross resonance drive pulse of the first phase during the first period of the quantum logic gate operation ( Chow e.g. [0009] CR pulses are generated/applied, but Chow does not break operation into “first period” with specified “first phase”; Lauer teaches e.g. [0022] ac echoed CR gate splits the operation in two . . . then the second half is performed with the opposite phase, this supplies an explicit first portion with one phase concept in echoed CR operation ) , irradiates the cross resonance drive pulse with continuously changing the phase of the cross resonance drive pulse from the first phase to the second phase while maintaining the intensity of the cross resonance drive pulse during the second period of the quantum logic gate operation ( Chow teaches [0011] Hamiltonian tomography measurements where “cross-resonance pulses . . . are swept from a beginning phase to an ending phase at a specific amplitude.” This is explicit teaching of a continuous phase sweep (begin to end) while holding amplitude (intensity) fixed at specific amplitude . Chow does not explicitly teach where the phase sweep is performed at the second period of the quantum logic gate operation. Chow presents it as part of a tomography/ tuneup /configuration. Lauer teaches at e.g. [0022], [0006], [0065-68] the gate operation sequencing period structure and phase endpoints, where echoed CR operation is implemented as two halves with opposite phase, giving the first/second phase endpoints for the CR operation in a gate context. Lauer also teaches use of a phase-inverted cross resonance pulse (i.e. second phase/opposite phase) and describes 180 degrees phase difference between the earlier and later signals. ) , irradiates the cross resonance drive pulse of the second phase during the third period of the quantum logic gate operation ( Chow teaches CR pulses and phase as a parameter, but not a clearly labelled third period having second phase; Again, Lauer teaches [0022] [0006] [0065-68] later phase-inverted cross-resonance pulse (i.e. second phase/opposite phase) including substantially 180 degrees phase difference relative to earlier signals ) and irradiates an echo pulse during the second period of the quantum logic gate operation ( Chow [0009] echo pulses directed to the control qubit; the temporal placement of the second period is not taught in Chow; See Lauer [0022] the echoed CR sequence includes inverting the control qubit sate between the two halves, Lauer [0006] state inversion pulse component applies the inversion pulse to the control qubit (echo/inversion) as part of the system components ) . In other words, Chow [0011] teaches supplying the phase sweep at specific amplitude (continuous phase change and constant intensity) ; Lauer teaches [0022], [0006], [0065-68] supplying the echoed CR gate operation sequencing and the opposite/phase inverted CR pulse endpoints. It would have been obvious to one of ordinary skill in the quantum logic gate art before the effective foiling date of the claimed invention to modify Chow’s CR gate control/ tuneup framework, with Lauer’s echoed-CR decoupling/echo sequencing techniques, as the combination reduces coherent error sources and improves gate fidelity. Lauer [0022] explains that undesired couplings in CR/echoed-CR gates lead to coherent error and motivates improvements specifically in the context of echoed cross resonance gates. The references are in the same narrow technical space (superconducting echoed-CR gate operation) and they both frame their contributions as reducing coherent errors that otherwise limit gate performance/fidelity. Lauer, [0023] [0076]. With regard to claim 5 , Chow [0049] further discloses chaging the CR phase by shifting sideband phase on an AWG and tuning the CR phase for desired Hamoltonian terms. Chow does not explicitly teach limit phases to 0 and pie. Lauer teaches opposite phase/ 180 degree phase difference between pulse portions, which corresponds directly to a ppie phase inversion concept. Lauer [0022] [0065]. See combination above. With regard to claim 6 , Chow further discloses characterized in that the quantum logic gate operation device is a CNOT gate (Chow e.g. [0049] [0073]) . With regard to claim 8 , Chow further discloses in that the control qubit and the target qubit are superconducting qubits (Chow e.g. [0009-11]) . With regard to claim 9 , Chow further discloses in that the control unit includes an arbitrary waveform generator (Chow e.g. [0031]) . With regard to claim 10 -11 , Chow further discloses the cross resonance drive pulse irradiation unit and the echo pulse irradiation unit are integrated /separate (see Fig. 1A) . With regard to claim 12 , Chow further discloses the control unit controls the cross resonance drive pulse irradiation unit and the echo pulse irradiation unit to repeatedly perform a set of phase changes of the cross resonance drive pulses and irradiation of the echo pulses (Chow at [0011] [0015] calibrating/operating the echoed CR gate using repeated application/tune-up sweeps, and then using the results to configure subsequent operations, benchmark/calibration context consistent with repeated applications) . Claim s 2- 3 are rejected under 35 U.S.C. 103 as being unpatentable over Chow, Lauer, and U.S. Pat. Pub. No. 2019/0007051 to Sete et al. (“ Sete ”) . With regard to claim 2 -3 , Chow discloses echo pulses directed to the control qubit (echo pulse generation/routing) as part of the CR gate system. Chow, [0009-10]. Chow does not explicitly teach that the echo pulse is frequency modulated. Lauer teaches a state inversion pulse at the control qubit (echo-type inversion concept) but does not expressly state frequency modulated. Lauer, [0023]. Sete teaches at e.g. abstract [0109] using a control signal configured to modulate a transition frequency of a qubit device at a modulation frequency, with the transition frequency shown as modulated over time . For claim 3, see Sete [0109] explicity teaches a qubit transition frequency that is modulated over time (“transition frequency . . . is modulated at the modulation frequency.”) Therefore, it would have been obvious to one of ordinary skill in the quantum logic gates art before the effective filing date of the claimed invention to modify Chow, Lauer to include the frequency modulation of Sete , where the advantage is to supply the general quantum-control concept of frequency modulation of qubit-related control (transition frequency) at a modulation frequency. Further, see Sete at [0040] “control signals that include a modulation frequency (e.g., a microwave tone) can be more robust to, or even immune to, certain control imperfections (e.g., errors associated with fast dc pulses, etc.). As another example, parametrically activated two-qubit gates may be produced by an interaction having an effective interaction strength that is first order in the bare frequency coupling strength, which may provide an advantage over gates where the interaction strength scales inversely to the detuning (and the detuning can be quite large).” Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Chow, Lauer, Sete , and Schutjens et al. (2013). Single qubit gates in frequency-crowded transmon systems , arXiv:1306.2279 (referred to as “ Schutjens ”) . With regard to claim 4 , Chow does not teach claim 4. Schutjens teaches at e.g. page 2, shown here: Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the combination to include such a change in the anharmonicity, as this is used in the detuning process. See Schutjens , page 2. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Chow, Lauer, in view of Muradian, Rudolph et al. (2019) Generators and roots of the quantum logic gates . arXiv:quant -ph /0511250 (referred to as “ Rudolph ” ). With regard to claim 7 , Chow does not teach claim 7. Rudolph teaches that it would have been obvious to one of ordinary skill in the quantum logic gates art to modify Chow to include such square root of CNOT, for instance, Rudolph throughout teaches that the quantum gate logic can be a square root of CNOT, e.g. page 5-9, where the advantage is shown in Rudolph, page 9, “We have derived some useful relations for a series of quantum logic gates which can be assembled into circuits to perform more complicated quantum operations. For example, the Controlled-square-root of-NOT gate √ CNOT and square root of SWAP gate √ SW AP are frequently used in synthesis of quantum circuits.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT Peter Ludwig whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)270-5599 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT Mon-Fri 9-5 . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT Fahd Obeid can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT 571-270-3324 . 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