Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's arguments filed 01/23/2026 have been fully considered but they are not persuasive.
On pgs. 9-11, Applicant alleges that the combination of Sandberg and Niu does not teach or suggest “the respective cycle shifts are defined such that one or more cycles associated with a minimum length of the low-density parity-check code are associated with a restriction on at least second degree variable nodes,” as recited in independent claim 1.
Examiner believed this to be clear from the cited portions of Sandberg, but will explain in further detail here. For example, see Sandberg para. 63, describing a submatrix of the following form:
[[1 1 0 0]
[1 1 1 0]
[0 0 1 1]
[1 0 0 1]]
It is well known in the art that in a parity check matrix, such as the one above, the columns represent variable nodes, and the rows represent check nodes. It is also well known that the degree of variable nodes is the number of connections to check nodes it contains (represented by the number of 1s in the column representing it). Therefore, the rightmost three columns in the submatrix above are variable nodes of degree two (“at least second degree variable nodes”). While this matrix is a submatrix of the base matrix, in terms of restricting cycles, it is treated as separate from the base matrix as described in Sandberg, para. 60: “By constraining ACE values for different code rates, i.e., different sized sub-matrices, particular embodiments ensure lifting is optimal not only for the lowest code rate that the base matrix defines, but also for higher code rates.”
Returning to the above matrix, it can clearly be seen that a cycle exists from variable node 1 (col. 1)-> check node 1 (row 1) -> DEGREE 2 variable node 2 (col. 2) -> check node 2 (row 2). This is a valid cycle because there exists a connection from check node 2 back to variable node 1. Also note that this is the shortest possible cycle that can be made (length 4). This cycle must be in accordance with the restriction as disclosed by Sandberg in para. 16: “The constraints are set such that any cycles of a specified length or shorter should fulfil a certain ACE constraint.” Because the above discussed cycle is of minimum possible length, it is always a cycle of a specified length or shorter. Therefore, it will always have to fulfil a certain ACE constraint and is therefore in accordance with the restriction. Here, Sandberg clearly teaches that variable nodes in cycles of a minimum length will always be subject to a restriction.
Therefore, Sandberg clearly discloses: “the respective cycle shifts are defined such that one or more cycles associated with a minimum length of the low-density parity-check code are associated with a restriction on at least second degree variable nodes.”
Examiner concedes that Sandberg does not disclose: “wherein the minimum length of the low-density parity-check code corresponds to a length-six cycle,” as alleged by the Applicant on pg. 11. However, the rejection does not rely on Sandberg for this teaching. To copy from the non-final rejection:
“However, Sandberg does not explicitly disclose wherein the minimum length of the low-density parity-check code corresponds to a length-six cycle.
However, Niu discloses wherein the minimum length of the low-density parity-check code corresponds to a length-six cycle (see Niu, par. [0040]: in this example, MaxCycle = 4. Also see par. [43] and Fig. 7: where it can be seen that all length 4 cycles are eliminated (meaning the minimum length cycle must be 6).”
Therefore, Niu clearly cures this deficiency in Sandberg by removing all 4 length cycles, effectively setting the minimum possible cycle to be length-6.
On pg. 12, Applicant alleges that Sandberg fails to teach excluding “nodes
associated with the least significant bits”, as recited in claim 3. Examiner disagrees- as
discussed in the non-final rejection:
Regarding claim 3, Sandberg, further discloses wherein the nodes associated with the least significant bits are excluded from the one or more cycles associated with the minimum length in accordance with the restriction (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part.
Here, Sandberg clearly discloses that the cycles containing rightmost three
columns (least significant bits) are avoided based on ACE constraints. As discussed
above, Sandberg further discloses that any minimum length cycle is subject to ACE
constraints, and is therefore in accordance with the restriction.
Therefore, Applicant’s arguments regarding claims 1 and 3 are not found to be convincing. Applicant’s arguments regarding any of the other pending claims either correspond to their arguments directed at claims 1 and 3, and are similarly not found convincing, or depend on the allowability of claims 1 and 3, and are therefore not found to be convincing.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
Claim(s) 1-5, 7-11, 14, 19-23, and 25-27 is/are rejected under 35 U.S.C. 103 as being anticipated by Sandberg et al. (20190296767, pub. Sep. 26, 2019), hereinafter “Sandberg” in view of Niu et al. (20070136635, pub. Jun. 14, 2007), hereinafter “Niu”.
Regarding independent claim 1, Sandberg discloses:
A transmitting device (see Sandberg, Fig. 4A par. [0118]: wireless device 110), comprising:
a processing system (see Sandberg, Fig. 4A: Processing circuitry 92 and Memory 930) that includes processor circuitry (see Sandberg, Fig. 4A: Processing circuitry 92) and memory circuitry that stores code (see Sandberg, Fig. 4A par. [0121]: Memory 930 is generally operable to store computer executable code and data), the processing system configured to cause the transmitting device to (see Sandberg, par. [0120]: Processing circuitry 920 includes any suitable combination of hardware and software implemented in one or more integrated circuits or modules to execute instructions and manipulate data to perform some or all of the described functions of the wireless device):
encode a set of bits in accordance with a low-density parity-check code associated with a base graph (see Sandberg, par. [0118]: the wireless device is capable of encoding information bits using a PCM lifted from a base matrix, and see par. [0059]: An example base matrix is specified in Table 2, and see par. [0018]: encoding (e.g., LDPC) information bits using a PCM) and a lifting scheme (see Sandberg, Fig. 2, par. [0111]: At step 212, the wireless transmitter encodes information bits using a PCM. The PCM is lifted from a base matrix and the shift coefficients used for lifting were selected to satisfy particular ACE constraints that vary for different portions of the PCM), wherein the base graph comprises a plurality of check nodes and a plurality of variable nodes comprising at least one second degree variable node (see Sandberg, Table 2, par. [0060]: Table 2 includes two different rectangles. The smaller rectangle in the upper left corner corresponds to a higher code rate and the full base matrix corresponds to a lower code rate, where a larger base matrix that corresponds to a lower code rate, has higher variable node degrees and thereby also higher ACE values), wherein the lifting scheme defines a quantity of copies of the base graph used to generate the low-density parity-check code and respective cyclic shifts associated with connected variable nodes and check nodes of the base graph and the copies of the base graph (see Sandberg, par. [0002] – [0003]: The structure of a quasi-cyclic LDPC code may be described through a base matrix. A base matrix has one element for each Z×Z subblock in the corresponding parity-check matrix. Given a specific base matrix, the cyclic shifts (also called the shift coefficients), as well as Z, are defined to specify a parity-check matrix (PCM). The process of selecting the shift coefficients and specifying the parity-check matrix for a given base matrix is called lifting. The shift coefficients are typically specified through a matrix of the same size as the base matrix where each entry Pij corresponds to a Z×Z submatrix in the final PCM. A specific parity-check matrix is obtained by selecting a shift size Z with a corresponding shift coefficient design and replacing each entry with the corresponding Z×Z matrix), wherein the respective cycle shifts are defined such that one or more cycles associated with a minimum length of the low-density parity-check code are associated with a restriction on at least second degree variable nodes (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns (i.e., degree 2 variable nodes) in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles (i.e., cycle with minimum length) in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part), nodes associated with least significant bits of the set of bits, or a combination thereof; and
transmit a signal comprising the encoded set of bits (see Sandberg, Fig. 4A par. [0128]: transmitting module 954 may transmit encoded information bits).
However, Sandberg does not explicitly disclose wherein the minimum length of the low-density parity-check code corresponds to a length-six cycle.
However, Niu discloses wherein the minimum length of the low-density parity-check code corresponds to a length-six cycle (see Niu, par. [0040]: in this example, MaxCycle = 4. Also see par. [43] and Fig. 7: where it can be seen that all length 4 cycles are eliminated (meaning the minimum length cycle must be 6).
Sandberg and Niu are analogous arts, because they are about low density parity check encoding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the invention of Sandberg in which shift coefficients are optimized through selection of Z cycles, with the feature of removing all length 4 cycles as disclosed by Niu, with the motivation to provide flexible length with different expanding factors, as disclosed by Niu in par. [0030] and avoiding slow convergence and error floor, as disclosed by Niu in par. [0041].
Regarding claim 2, Sandberg, further discloses wherein the second degree variable nodes are excluded from the one or more cycles associated with the minimum length in accordance with the restriction (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns (i.e., degree 2 variable nodes) in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles (i.e., cycle with minimum length) in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part).
Regarding claim 3, Sandberg, further discloses wherein the nodes associated with the least significant bits are excluded from the one or more cycles associated with the minimum length in accordance with the restriction (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part).
Regarding claim 4, Sandberg, further discloses wherein in accordance with the restriction, at least one third degree variable node is included in a cycle of the one or more cycles associated with the minimum length that includes at least one second degree variable node (see Sandberg, par. [0067]: For both base matrix 1 and 2 described above, the column weights of the first two columns (or equivalently variable nodes) are higher than for the other columns, where for this code rate, it may in this case be advantageous to allow only length-4 cycles involving the two first variable nodes of the base matrix that have the highest variable node degree. This can be enforced by selecting an ACE constraint with dACE=2 and choosing etaACE such that length 4 cycles containing other variable nodes automatically violate this constraint).
Regarding claim 5, Sandberg, further discloses wherein in accordance with the restriction, a cycle of the one or more cycles associated with the minimum length excludes second degree variable nodes associated with the least significant bits and includes a second degree variable node associated with one or more bits of the set of bits that are more significant than the least significant bits (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part (Examiner’s note: it has been interpreted in base claim 1 that a minimum length of the low-density parity-check code are associated with a restriction on second degree variable nodes, instead of nodes associated with least significant bits of the set of bits)).
Regarding claim 7, Sandberg, further discloses wherein the respective cycle shifts are further defined such that a weighted girth of the low-density parity-check code satisfies a threshold, the weighted girth corresponding to a sum of respective weights of variable nodes and check nodes in a cycle having the weighted girth, the respective weights of the variable nodes being defined by respective degrees of the variable nodes (see Sandberg, par. [0006]: The ACE of a length 2d cycle is defined as: [see summation equation under par. 6], where di is the degree of the ith variable node in the cycle. Furthermore, an LDPC code has property (dACE, etaACE) if all the cycles whose length is 2- dACE or less have ACE values of at least etaACE, and see par. [0007]: The shift coefficients are selected such that there are no cycles in the graph with ACE values lower than a specified ACE constraint), respective reliabilities of bits corresponding to the variable nodes, or a combination thereof.
Regarding claim 8, Sandberg, further discloses wherein a first weight of a first variable node is greater than a second weight of a second variable node in accordance with the first variable node being associated with a greater degree than the second variable node (see Sandberg, par. [0067]: For both base matrix 1 and 2 described above, the column weights of the first two columns (or equivalently variable nodes) are higher than for the other columns. For this code rate, it may in this case be advantageous to allow only length-4 cycles involving the two first variable nodes of the base matrix that have the highest variable node degree. This can be enforced by selecting an ACE constraint with dACE=2 and choosing etaACE such that length 4 cycles containing other variable nodes automatically violate this constraint, and see par. [0068]: For a larger shift size Z, it may be possible to avoid all length-4 cycles, for example, select shift coefficients for shift size Z>10 that avoid all length-4 cycles).
Regarding claim 9, Sandberg, further discloses wherein the second variable node is associated with one or more bits that are more significant than one or more bits associated with the first variable node (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part).
Regarding claim 10, Sandberg, further discloses wherein a first weight of a first variable node is greater than a second weight of a second variable node in accordance with the first variable node being associated with a higher reliability than the second variable node, one or more bits that are more significant than one or more bits associated with the second variable node (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part), or any combination thereof.
Regarding claim 11, Sandberg, further discloses wherein the respective weights of the variable nodes are defined by whether the variable nodes correspond to punctured nodes of the base graph (see Sandberg, par. [0067]: For both base matrix 1 and 2 described above, the column weights of the first two columns (or equivalently variable nodes) are higher than for the other columns. For this code rate, it may in this case be advantageous to allow only length-4 cycles involving the two first variable nodes of the base matrix that have the highest variable node degree. This can be enforced by selecting an ACE constraint with dACE=2 and choosing etaACE such that length 4 cycles containing other variable nodes automatically violate this constraint, and see par. [0068]: For a larger shift size Z, it may be possible to avoid all length-4 cycles, for example, select shift coefficients for shift size Z>10 that avoid all length-4 cycles).
Regarding claim 14, Sandberg, further discloses wherein a girth of the low-density parity-check code fails to satisfy the threshold (see Sandberg, par. [0006]: an LDPC code has property (dACE, etaACE) if all the cycles whose length is 2- dACE or less have ACE values of at least etaACE, and see par. [0007]: The shift coefficients are selected such that there are no cycles in the graph with ACE values lower than a specified ACE constraint).
Regarding independent claim 19, Sandberg discloses:
A receiving device (see Sandberg, Fig. 4A par. [0118]: wireless device 110), comprising:
a processing system (see Sandberg, Fig. 4A: Processing circuitry 92 and Memory 930) that includes processor circuitry (see Sandberg, Fig. 4A: Processing circuitry 92) and memory circuitry that stores code (see Sandberg, Fig. 4A par. [0121]: Memory 930 is generally operable to store computer executable code and data), the processing system configured to cause the receiving device to (see Sandberg, par. [0120]: Processing circuitry 920 includes any suitable combination of hardware and software implemented in one or more integrated circuits or modules to execute instructions and manipulate data to perform some or all of the described functions of the wireless device):
receive a signal comprising an encoded set of bits (see Sandberg, Fig. 4A par. [0128]: transmitting module 954 may transmit encoded information bits by communicating with receiving module 950); and
decode the encoded set of bits in accordance with a low-density parity-check code associated with a base graph (see Sandberg, par. [0118]: the wireless device is capable of decoding information bits using a PCM lifted from a base matrix, and see par. [0059]: An example base matrix is specified in Table 2, and see par. [0018]: encoding (e.g., LDPC) information bits using a PCM) and a lifting scheme (see Sandberg, Fig. 2, par. [0111]: At step 212, the wireless transmitter encodes information bits using a PCM. The PCM is lifted from a base matrix and the shift coefficients used for lifting were selected to satisfy particular ACE constraints that vary for different portions of the PCM), wherein the base graph comprises a plurality of check nodes and a plurality of variable nodes comprising at least one second degree variable node (see Sandberg, Table 2, par. [0060]: Table 2 includes two different rectangles. The smaller rectangle in the upper left corner corresponds to a higher code rate and the full base matrix corresponds to a lower code rate, where a larger base matrix that corresponds to a lower code rate, has higher variable node degrees and thereby also higher ACE values), wherein the lifting scheme defines a quantity of copies of the base graph used to generate the low-density parity-check code and respective cyclic shifts associated with connected variable nodes and check nodes of the base graph and the copies of the base graph (see Sandberg, par. [0002] – [0003]: The structure of a quasi-cyclic LDPC code may be described through a base matrix. A base matrix has one element for each Z×Z subblock in the corresponding parity-check matrix. Given a specific base matrix, the cyclic shifts (also called the shift coefficients), as well as Z, are defined to specify a parity-check matrix (PCM). The process of selecting the shift coefficients and specifying the parity-check matrix for a given base matrix is called lifting. The shift coefficients are typically specified through a matrix of the same size as the base matrix where each entry Pij corresponds to a Z×Z submatrix in the final PCM. A specific parity-check matrix is obtained by selecting a shift size Z with a corresponding shift coefficient design and replacing each entry with the corresponding Z×Z matrix), wherein the respective cycle shifts are defined such that one or more cycles associated with a minimum length of the low-density parity-check code are associated with a restriction on second degree variable nodes (see Sandberg, par. [0066]: It is possible, however, to avoid cycles that contain the three rightmost columns (i.e., degree 2 variable nodes) in the structure above, and other columns in the matrix. Such columns are found in the systematic part of the base matrix, which correspond to the columns left to the matrix with the special submatrix structure marked in bold. To be able to avoid these cycles (i.e., cycle with minimum length) in the optimization of the shift coefficients, particular embodiments specify different ACE constraints for when starting ACE detection from variable nodes in the systematic part and from variable nodes in the parity part), nodes associated with least significant bits of the encoded set of bits, or a combination thereof.
However, Sandberg does not explicitly disclose wherein the minimum length of the low-density parity-check code corresponds to a length-six cycle.
However, Niu discloses wherein the minimum length of the low-density parity-check code corresponds to a length-six cycle (see Niu, par. [0040]: in this example, MaxCycle = 4. Also see par. [43] and Fig. 7: where it can be seen that all length 4 cycles are eliminated (meaning the minimum length cycle must be 6).
Sandberg and Niu are analogous arts, because they are about low density parity check encoding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the invention of Sandberg in which shift coefficients are optimized through selection of Z cycles, with the feature of removing all length 4 cycles as disclosed by Niu, with the motivation to provide flexible length with different expanding factors, as disclosed by Niu in par. [0030] and avoiding slow convergence and error floor, as disclosed by Niu in par. [0041].
Claim 20 is rejected according to the same reasons given above for claim 2.
Claim 21 is rejected according to the same reasons given above for claim 3.
Claim 22 is rejected according to the same reasons given above for claim 4.
Claim 23 is rejected according to the same reasons given above for claim 5.
Claim 25 is rejected according to the same reasons given above for claim 7.
Claim 26 is rejected according to the same reasons given above for claim 8.
Claim 27 is rejected according to the same reasons given above for claim 11.
Independent claim 29 is the method claim corresponding to claim 1 and hence rejected according to the same reasons given according to claim 1.
Independent claim 30 is the method claim corresponding to claim 19 and hence rejected according to the same reasons given according to claim 19.
Claim(s) 12, 13, 15-18, and 28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sandberg (20190296767, pub. Sep. 26, 2019), in view of Niu (20070136635, pub. Jun. 14, 2007), further in view of Robert Safavi et al. (20200099400, pub. Mar. 26, 2020), hereinafter “Safavi”.
Regarding claim 12, the combination of Sandberg and Niu discloses all the claimed limitations as set forth in the rejection of claim 7 above.
The combination of Sandberg and Niu does not disclose wherein the respective weights of the variable nodes are defined by the respective degrees of the variable nodes and the respective reliabilities in accordance with a modulation order associated with the set of bits satisfying a threshold order.
However, Safavi discloses wherein the respective weights of the variable nodes are defined by the respective degrees of the variable nodes and the respective reliabilities in accordance with a modulation order associated with the set of bits satisfying a threshold order (see Safavi, Fig. 5 par. [0082]: In order to obtain the desired mapping of the systematic bits and the parity-check bits, it is disclosed an interleaver structure and mapping to modulation symbols as shown FIG. 5. In order to obtain the desired mapping, the bits in each row of the matrix B are permuted using a row interleaver 120 prior to modulation mapping. The row interleaver 120 permutes the m bits in each row of matrix B in a way that, after interleaving, the systematic bits are mapped to the most reliable or least reliable bits in the modulation label depending on if the transmission is an initial transmission or a re-transmission).
Sandberg, Niu, and Safavi are analogous arts, because they are about low density parity check encoding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the invention of Sandberg, Niu, and Safavi, with the feature of modulation mapping in which to obtain the desired mapping, a row interleaver 120 permutes the m bits in each row of matrix B in a way that, after interleaving, the systematic bits are mapped to the most reliable or least reliable bits in the modulation label depending on if the transmission is an initial transmission or a re-transmission as disclosed by Safavi, with the motivation to provide low complexity a one-to-one mapping of the re-arranged rows to modulation symbols, as disclosed by Safavi in par. [0032].
Regarding claim 13, the combination of Sandberg and Niu discloses all the claimed limitations as set forth in the rejection of claim 7 above.
The combination of Sandberg and Niu does not disclose wherein the respective weights of the variable nodes are defined by the respective degrees of the variable nodes in accordance with a modulation order associated with the set of bits failing to satisfy a threshold order.
However, Safavi discloses wherein the respective weights of the variable nodes are defined by the respective degrees of the variable nodes in accordance with a modulation order associated with the set of bits failing to satisfy a threshold order (see Safavi, par. [0084]: the row interleaver 120 performs a left circular shift of each row of the matrix in the re-transmission. The bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability, and see par. [0023]: The re-transmission occurs when the initial transmission was unsuccessful).
Sandberg, Niu, and Safavi are analogous arts, because they are about low density parity check encoding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the invention of Sandberg, Niu, and Safavi, with the feature of performing circular shifts of each row of the matrix in the re-transmission when the initial transmission was unsuccessful, where the bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability, with the motivation to provide low complexity a one-to-one mapping of the re-arranged rows to modulation symbols, as disclosed by Safavi in par. [0032].
Regarding claim 15, the combination of Sandberg and Niu discloses all the claimed limitations as set forth in the rejection of claim 1 above.
The combination of Sandberg and Niu does not disclose wherein the least significant bits of the set of bits are associated with a least reliable bit location of a modulation scheme for encoding the set of bits.
However, Safavi discloses wherein the least significant bits of the set of bits are associated with a least reliable bit location of a modulation scheme for encoding the set of bits (see Safavi, par. [0083]: each row is left-circularly shifted until all systematic bits in that row occupy the first (left-most) positions and all parity-check bits occupy the last (right-most) positions. After row interleaving, each row is mapped to a modulation symbol. Hence, the row interleaver 120 herein is configured to circularly shift each row of the matrix so as to obtain a re-arranged row for each row of the matrix in which all systematic bits of a row of the matrix are arranged in the left-most positions of a re-arranged row and all parity-check bits of the row of the matrix are arranged in the right-most positions of the re-arranged row. The bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability, and see par. [0080]: each first reliability is higher than any second reliability).
Sandberg, Niu, and Safavi are analogous arts, because they are about low density parity check encoding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the invention of Sandberg, Niu, and Safavi, with the feature of left-circularly shifting each row until all systematic bits in that row occupy the first (left-most) positions and all parity-check bits occupy the last (right-most) positions, each row is mapped to a modulation symbol, configured to circularly shift each row of the matrix so as to obtain a re-arranged row for each row of the matrix in which all systematic bits of a row of the matrix are arranged in the left-most positions of a re-arranged row and all parity-check bits of the row of the matrix are arranged in the right-most positions of the re-arranged row, and the bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability where each first reliability is higher than any second reliability, with the motivation to provide low complexity a one-to-one mapping of the re-arranged rows to modulation symbols, as disclosed by Safavi in par. [0032].
Regarding claim 16, the combination of Sandberg and Niu discloses all the claimed limitations as set forth in the rejection of claim 1 above.
The combination of Sandberg and Niu does not disclose wherein the lifting scheme is associated with a first modulation scheme having a first modulation order, and the processing system is further configured to cause the transmitting device to:
encode a second set of bits in accordance with a second low-density parity-check code defined by the base graph and a second lifting scheme, wherein the second lifting scheme is associated with a second modulation scheme having a second modulation order; and
transmit a second signal comprising the encoded second set of bits.
However, Safavi discloses wherein the lifting scheme is associated with a first modulation scheme having a first modulation order (see Safavi, par. [0076]: The proposed interleaver operations permute the bit positions in a codeword so that the resulting permuted codeword contains a sequence of segments of coded bits, with each segment intended to be mapped to a separate modulation symbol. Each first reliability is higher than any second reliability), and the processing system is further configured to cause the transmitting device to:
encode a second set of bits in accordance with a second low-density parity-check code defined by the base graph and a second lifting scheme, wherein the second lifting scheme is associated with a second modulation scheme having a second modulation order (see Safavi, par. [0083]: each row is left-circularly shifted until all systematic bits in that row occupy the first (left-most) positions and all parity-check bits occupy the last (right-most) positions. After row interleaving, each row is mapped to a modulation symbol. Hence, the row interleaver 120 herein is configured to circularly shift each row of the matrix so as to obtain a re-arranged row for each row of the matrix in which all systematic bits of a row of the matrix are arranged in the left-most positions of a re-arranged row and all parity-check bits of the row of the matrix are arranged in the right-most positions of the re-arranged row. The bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability); and
transmit a second signal comprising the encoded second set of bits (see Safavi, par. [0085]: At transmission each re-arranged row is mapped onto a modulation symbol of the modulation constellation so as to obtain a plurality of modulation symbols. The plurality of modulation symbols are transmitted in a communication signal 510).
Sandberg, Niu, and Safavi are analogous arts, because they are about low density parity check encoding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the invention of Sandberg, Niu, and Safavi, with the feature of a codeword mapped to separate modulation symbol with first higher reliability than any second reliability, left-circularly shifting each row until all systematic bits in that row occupy the first (left-most) positions and all parity-check bits occupy the last (right-most) positions, each row is mapped to a modulation symbol, configured to circularly shift each row of the matrix so as to obtain a re-arranged row for each row of the matrix in which all systematic bits of a row of the matrix are arranged in the left-most positions of a re-arranged row and all parity-check bits of the row of the matrix are arranged in the right-most positions of the re-arranged row, and the bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability where each first reliability is higher than any second reliability, with the motivation to provide low complexity a one-to-one mapping of the re-arranged rows to modulation symbols, as disclosed by Safavi in par. [0032].
Regarding claim 17, the combination of Sandberg, Niu, and Safavi further discloses wherein the processing system is further configured to cause the transmitting device to:
select the low-density parity-check code to encode the set of bits in accordance with encoding the set of bits according to the first modulation scheme and the first modulation order satisfying a threshold (see Safavi, par. [0082]: In order to obtain the desired mapping, the bits in each row of the matrix B are permuted using a row interleaver 120 prior to modulation mapping, and see par. [0083]: configured to circularly shift each row of the matrix so as to obtain a re-arranged row for each row of the matrix in which all systematic bits of a row of the matrix are arranged in the left-most positions of a re-arranged row and all parity-check bits of the row of the matrix are arranged in the right-most positions of the re-arranged row. The bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability); and
select the second low-density parity-check code to encode the second set of bits in accordance with encoding the second set of bits according to the second modulation scheme and the second modulation order failing to satisfy the threshold (see Safavi, par. [0084]: the row interleaver 120 performs a left circular shift of each row of the matrix in the re-transmission. The bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability, and see par. [0023]: The re-transmission occurs when the initial transmission was unsuccessful).
Regarding claim 18, the combination of Sandberg and Niu discloses all the claimed limitations as set forth in the rejection of claim 1 above.
The combination of Sandberg and Niu does not disclose wherein the lifting scheme is associated with a uniform quadrature amplitude modulation scheme, and the processing system is further configured to cause the transmitting device to:
encode a second set of bits in accordance with a second low-density parity-check code defined by the base graph and a second lifting scheme, wherein the second lifting scheme is associated with probabilistic shaping; and
transmit a second signal comprising the encoded second set of bits.
However, Safavi discloses wherein the lifting scheme is associated with a uniform quadrature amplitude modulation scheme (see Safavi, par. [0076]: The proposed interleaver operations permute the bit positions in a codeword so that the resulting permuted codeword contains a sequence of segments of coded bits, with each segment intended to be mapped to a separate modulation symbol. Each first reliability is higher than any second reliability, and see par. [0070]: a LDPC-coded transmission scheme using quadrature amplitude modulation (QAM)), and the processing system is further configured to cause the transmitting device to:
encode a second set of bits in accordance with a second low-density parity-check code defined by the base graph and a second lifting scheme, wherein the second lifting scheme is associated with probabilistic shaping (see Safavi, par. [0083]: each row is left-circularly shifted until all systematic bits in that row occupy the first (left-most) positions and all parity-check bits occupy the last (right-most) positions. After row interleaving, each row is mapped to a modulation symbol. Hence, the row interleaver 120 herein is configured to circularly shift each row of the matrix so as to obtain a re-arranged row for each row of the matrix in which all systematic bits of a row of the matrix are arranged in the left-most positions of a re-arranged row and all parity-check bits of the row of the matrix are arranged in the right-most positions of the re-arranged row. The bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability); and
transmit a second signal comprising the encoded second set of bits (see Safavi, par. [0085]: At transmission each re-arranged row is mapped onto a modulation symbol of the modulation constellation so as to obtain a plurality of modulation symbols. The plurality of modulation symbols are transmitted in a communication signal 510).
Sandberg, Niu, and Safavi are analogous arts, because they are about low density parity check encoding. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the invention of Sandberg, Niu, and Safavi, with the feature of using quadrature amplitude modulation (QAM) in which a codeword mapped to separate modulation symbol with first higher reliability than any second reliability, left-circularly shifting each row until all systematic bits in that row occupy the first (left-most) positions and all parity-check bits occupy the last (right-most) positions, each row is mapped to a modulation symbol, configured to circularly shift each row of the matrix so as to obtain a re-arranged row for each row of the matrix in which all systematic bits of a row of the matrix are arranged in the left-most positions of a re-arranged row and all parity-check bits of the row of the matrix are arranged in the right-most positions of the re-arranged row, and the bits in the left-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the first reliability and bits in the right-most positions of the re-arranged row are mapped to modulation label positions of the modulation constellation with the second reliability where each first reliability is higher than any second reliability, with the motivation to provide low complexity a one-to-one mapping of the re-arranged rows to modulation symbols, as disclosed by Safavi in par. [0032].
Claim 28 is rejected according to the same reasons given above for claim 12.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Li et al. (20210050930, pub. Feb. 18, 2021) discloses a data channel quasi-cyclic LDPC encoding based base graph 1 of a basic graph matrix and a corresponding parity check matrices (PCMs) in which a modulation order is acquired based on a target code rate.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACK K BARNETT whose telephone number is (571)270-0431. The examiner can normally be reached M-Th 8-5, F 8-4 EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Mark Featherstone can be reached at 571-270-3750. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JACK KENSINGTON BARNETT/ Examiner, Art Unit 2111
/MARK D FEATHERSTONE/ Supervisory Patent Examiner, Art Unit 2111
Prosecution Insights