DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4, 9, 11, 15, 16 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cheng (US 2022/0406918).
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(Claim 1) Cheng teaches a semiconductor structure, comprising:
a first semiconductor layer (11), wherein the first semiconductor layer comprises a first surface and a second surface which are opposite to each other, and first protrusions at the first surface;
a second semiconductor layer (14) on the first surface of the first semiconductor layer,
wherein the second semiconductor layer (14) comprises second protrusions at a surface of the second semiconductor layer away from the first semiconductor layer, the second protrusions correspond to the first protrusions respectively in position, a second recess is between two adjacent second protrusions of the second protrusions,
a conductivity type (N) of the second semiconductor layer (14) is the same as a conductivity type of the first semiconductor layer (12), and a doping concentration of the second semiconductor layer is lower than a doping concentration of the first semiconductor layer (paragraphs 57 – 60); and
a third semiconductor layer (20) on the second semiconductor layer, wherein a conductivity type (P) of the third semiconductor layer is opposite (paragraph 30) to the conductivity type (N) of the first semiconductor layer (11, paragraph 20).
(Claim 2) Cheng teaches the semiconductor structure, further comprising a buffer layer (13) between the first semiconductor layer the second semiconductor.
(Claim 4) Cheng teaches wherein a surface of the third semiconductor layer (20) away from the second semiconductor layer is a plane, and the second recess is filled up with the third semiconductor layer.
(Claim 9) Cheng teaches the semiconductor structure, further comprising:
a first electrode (40) on a top surface of one of the second protrusions; and
a second electrode (50) on the second surface of the first semiconductor layer.
(Claim 11) Cheng teaches a method for manufacturing a semiconductor structure, comprising:
providing a first semiconductor layer (11), wherein the first semiconductor layer comprises a first surface and a second surface which are opposite to each other, and first protrusions are formed at the first surface;
forming a second semiconductor layer (14) covering the first surface, wherein second protrusions are formed at a surface of the second semiconductor layer away from the first semiconductor layer, the second protrusions correspond to the first protrusions respectively in position, a second recess is formed between two adjacent second protrusions of the second protrusions,
a conductivity type of the second semiconductor layer is the same as a conductivity type of the first semiconductor layer, and a doping concentration of the second semiconductor layer is lower than a doping concentration of the first semiconductor layer (paragraphs 57 – 60); and
forming a third semiconductor layer (20) covering the second semiconductor layer,
wherein a conductivity type (P, paragraph 30) of the third semiconductor layer (20) is opposite to the conductivity type (N, paragraph 20) of the first semiconductor layer (11).
(Claim 15) Cheng teaches wherein a surface of the third semiconductor layer (20) away from the second semiconductor layer is a plane, and the second recess is filled up with the third semiconductor layer.
(Claim 16) Cheng teaches wherein the first protrusions are formed at the first surface by:
etching the first surface to form the first protrusions; or
conformally growing the first semiconductor layer at a patterned substrate to form the first protrusions at the first semiconductor layer (paragraph 44).
(Claim 20) Cheng teaches the method, further comprising:
forming a first electrode (40) in contact with the third semiconductor layer (20) on a top surface of one of the second protrusions; and
forming a second electrode (50) on the second surface of the first semiconductor layer (11).
Allowable Subject Matter
Claims 3, 5 – 8, 10, 12 – 14 and 17 – 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Prior art made of record and not relied upon, considered pertinent to applicant's disclosure are listed in PTO – 892 Form.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to IGWE U ANYA whose telephone number is (571)272-1887. The examiner can normally be reached 8:00 AM - 6:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272- 1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/IGWE U ANYA/Primary Examiner, Art Unit 2891
March 7, 2026
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