DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, , filed 02/05/26, with respect to the rejection(s) of claim(s) 1-5, 8-10, 14-15, 19-28 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Kannan (Pub No 20170206111) in view of Larson (Pub No 20120242672) and newly cited Zheng (Pub No 20210360269).
Regarding claim 1,
Applicant argues that the prior art does not teach the amended limitation.
The examiner relies on newly cited Zheng (Pub No 20210360269) to teach the limitations.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 19, 21-22, 27-28 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kannan (Pub No 20170206111) in view of Larson (Pub No 20120242672) and Zheng (Pub No 20210360269)
Regarding claim 1 and 19 and 27,
Kannan teaches a method, comprising:
A memory configured to store computer instructions; and
A computer-readable storage medium and that, when executed by one or more processors, cause an apparatus to: (para [0018])
scheduling a first resource for the association thread to accelerate execution of the association thread; (interpreted as the scheduler 110 (also referred to herein as a scheduling component 110) operates to schedule threads among the processor cores 116 to balance the load that is being processed by the app processor 114, see para [0020])
determining a first load characteristic of the frame drawing thread; (interpreted as a percent of time a thread is running during a sample duration for a given processor frequency. For example, a thread running for 15 milliseconds of a 20 millisecond sample duration exerts a load of 75%, see para [0022])
determining, based on the first load characteristics, a predicted load value of the frame drawing thread based on the first load characteristic; (interpreted as calculates the predicted load of a processor based on an immediate load and the long-term historical load data. For example, the predicted load of a processor may be calculated as a sum of the predicted load of all the runnable or running threads in the processor. In some variants, the predicted load of the sleeping threads can also add to the predicted load of a processor, see para [0040])
determining based on the first load characteristic, the predicted load value; and scheduling a second resource for the frame drawing thread in the target resource scheduling manner. (interpreted as Utilizing the predicted load, the frequency governor 112 operates to adjust the operating frequency of each of the processor cores 116 based upon the predicted work that will be performed. If a particular one of the processor cores 116 has a heavy load, the frequency governor 112 may increase a frequency of the particular processor core. If another processor core has a relatively low load or is idle, the frequency of that processor core may be decreased (e.g., to reduce power consumption), see para [0023])
However Kannan does not teach determining an association thread of a frame drawing thread, wherein the frame drawing thread draws an image frame and the association thread is capable of causing the frame drawing thread to sleep;
Larson teaches determining an association thread of a frame drawing thread, wherein the frame drawing thread draws an image frame, and wherein the association thread is configured to cause the frame drawing thread to sleep; (interpreted as In addition, application thread 105 notifies or wakes up worker thread 107 concerning the pending query request. In some situations, if there is no graphics command pending in command queue 106 or command buffer 113 is full or some other conditions, worker thread 107 may enter into a sleep state or perform other tasks, see para [0028]. Also see drawing thread, para [0004])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan with the drawing threads taught by Larson with the motivation being to control the frequency/power in response to the predicted load thereby meeting the quality of service.
However Kannan in view of Larson does not teach first mapping relationship information, a target resource scheduling manner, wherein the first mapping relationship information comprises a plurality of pieces of load information and a resource scheduling manner corresponding to each of the pieces of load information, and wherein each of the pieces of load information comprises one load characteristic and one load value.
Zheng teaches determining the target resource scheduling manner based on the first load characteristic, the predicted load values (e.g. predicted load value is less than the third threshold) first mapping relationship information, a target resource scheduling manner, wherein the first mapping relationship information comprises a plurality of pieces of load information(e.g. load values, cpu usages) and a resource scheduling manner (e.g. target device whose current load is less than first threshold, avg cpu less than second threshold, etc) corresponding to each of the pieces of load information, and wherein each of the pieces of load information comprises one load characteristic and one load value.(interpreted as According to the current load values, the average CPU usages, and the predicted load values of the plurality of transcoding devices, the scheduling device may determine, from the plurality of transcoding devices, a target transcoding device whose current load value is less than the first threshold, average CPU usage is less than the second threshold, and predicted load value is less than the third threshold, see para [0206])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the load prediction taught by Kannan in view of Larson with the scheduling for the load based on multiple characteristics and values as taught by Zheng with the motivation being to optimize resource scheduled based on a plurality of metrics.
Regarding claim 2 and 28,
Kannan teaches the method of claim 1, wherein the first load characteristic indicates a resource requirement feature of the thread. (interpreted as a percent of time a thread is running during a sample duration for a given processor frequency. For example, a thread running for 15 milliseconds of a 20 millisecond sample duration exerts a load of 75%, see para [0022])
However Kannan does not teach frame drawing thread.
Larson teaches frame drawing thread (interpreted as drawing thread, para [0004])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan with the drawing threads taught by Larson with the motivation being to control the frequency/power in response to the predicted load thereby meeting the quality of service.
Regarding claim 21,
Kannan teaches the method of claim 1, wherein the second resource comprises a computing resource. (interpreted as a scheduler configured to schedule threads for execution by the plurality of processors and a load prediction module configured to provide a predicted load value, see para [0008])
Regarding claim 22,
Kannan teaches the method of claim 1, wherein the second resource comprises a storage resource. (interpreted as the scheduler 110 (also referred to herein as a scheduling component 110) operates to schedule threads among the processor cores 116 to balance the load that is being processed by the app processor 114. In general, the frequency governor 112 utilizes information from the scheduler 110 to arrive at one or more frequencies and voltages for the app processor 114, see para [0002])
Claim(s) 23-26 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kannan (Pub No 20170206111) in view of Larson (Pub No 20120242672), Zheng (Pub No 20210360269), and Palermo (Pub No 20170286142)
Regarding claim 23,
Kannan teaches the resource scheduling method of claim 1, however does not teach frame drawing thread.
Larson teaches frame drawing thread. (interpreted as drawing thread, para [0004])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan with the drawing threads taught by Larson with the motivation being to control the frequency/power in response to the predicted load thereby meeting the quality of service.
However Kannan in view of Larson and Zheng do not teach wherein the first load characteristic comprises a quantity of branch instructions of the thread.
Palermo teaches wherein the first load characteristic comprises a quantity of
branch instructions of the thread. (interpreted as The performance profiles may include any information that characterizes the workloads of the VMs, such as statistical information of the loads on the CPU 202 caused by each virtual machine, types of instructions executed by the CPU 202 (e.g., a percentage of branch instructions, a percentage of arithmetic instructions, etc.) for each virtual machine, frequency of reads and writes to memory (e.g., main memory 214) for each virtual machine, sizes of blocks of data read from and written to memory (e.g., main memory 214) for each virtual machine, cache hits/misses, thread occupancy, translation lookaside buffer (TLB) misses, page faults, etc, see para [0033])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the load characteristic taught by Kannan in view of Larson with the different characteristics taught by Palermo with the motivation being to monitor different metrics for determining load.
Regarding claim 24,
Kannan teaches the resource scheduling method of claim 1, however does not teach frame drawing thread.
Larson teaches frame drawing thread. (interpreted as drawing thread, para [0004])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan with the drawing threads taught by Larson with the motivation being to control the frequency/power in response to the predicted load thereby meeting the quality of service.
However Kannan in view of Larson and Zheng do not teach wherein the first load characteristic comprises a cache miss rate of the thread.
Palermo teaches wherein the first load characteristic comprises a cache miss rate of the thread.. (interpreted as The performance profiles may include any information that characterizes the workloads of the VMs, such as statistical information of the loads on the CPU 202 caused by each virtual machine, types of instructions executed by the CPU 202 (e.g., a percentage of branch instructions, a percentage of arithmetic instructions, etc.) for each virtual machine, frequency of reads and writes to memory (e.g., main memory 214) for each virtual machine, sizes of blocks of data read from and written to memory (e.g., main memory 214) for each virtual machine, cache hits/misses, thread occupancy, translation lookaside buffer (TLB) misses, page faults, etc, see para [0033])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the load characteristic taught by Kannan in view of Larson with the different characteristics taught by Palermo with the motivation being to monitor different metrics for determining load.
Regarding claim 25,
Kannan teaches the resource scheduling method of claim 1, wherein the first time
interval is a period of time between a start of execution of the frame drawing thread and an end of
the execution of the frame drawing thread. (interpreted as The immediate load can be tracked in multiple ways, including, but not limited to one of the following: measuring, using a “windowing” technique, how long a thread ran in a sample duration (e.g., a window of N milliseconds) (e.g., every 10 or 20 milliseconds) and in an alternative “continuous” technique tracking a “continuous” load value that gradually accumulates every unit of time a thread runs (or is runnable) and gradually decays every unit of time the thread sleep, see para [0025])
However does not teach frame drawing thread.
Larson teaches frame drawing thread. (interpreted as drawing thread, para [0004])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan with the drawing threads taught by Larson with the motivation being to control the frequency/power in response to the predicted load thereby meeting the quality of service.
However Kannan in view of Larson do not teach wherein the first load characteristic comprises a quantity of branch instructions of the thread.
Palermo teaches wherein the first load characteristic comprises a quantity of branch instructions of the thread.. (interpreted as The performance profiles may include any information that characterizes the workloads of the VMs, such as statistical information of the loads on the CPU 202 caused by each virtual machine, types of instructions executed by the CPU 202 (e.g., a percentage of branch instructions, a percentage of arithmetic instructions, etc.) for each virtual machine, frequency of reads and writes to memory (e.g., main memory 214) for each virtual machine, sizes of blocks of data read from and written to memory (e.g., main memory 214) for each virtual machine, cache hits/misses, thread occupancy, translation lookaside buffer (TLB) misses, page faults, etc, see para [0033])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the load characteristic taught by Kannan in view of Larson with the different characteristics taught by Palermo with the motivation being to monitor different metrics for determining load.
Regarding claim 26,
Kannan teaches the resource scheduling method of claim 1, wherein the first time
interval is a period of time between a start of execution of the frame drawing thread and an end of
the execution of the frame drawing thread. (interpreted as The immediate load can be tracked in multiple ways, including, but not limited to one of the following: measuring, using a “windowing” technique, how long a thread ran in a sample duration (e.g., a window of N milliseconds) (e.g., every 10 or 20 milliseconds) and in an alternative “continuous” technique tracking a “continuous” load value that gradually accumulates every unit of time a thread runs (or is runnable) and gradually decays every unit of time the thread sleep, see para [0025])
However does not teach frame drawing thread.
Larson teaches frame drawing thread. (interpreted as drawing thread, para [0004])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan with the drawing threads taught by Larson with the motivation being to control the frequency/power in response to the predicted load thereby meeting the quality of service.
However Kannan in view of Larson and Zheng do not teach wherein the first load characteristic comprises a cache miss rate of the thread.
Palermo teaches wherein the first load characteristic comprises a cache miss rate of the thread.. (interpreted as The performance profiles may include any information that characterizes the workloads of the VMs, such as statistical information of the loads on the CPU 202 caused by each virtual machine, types of instructions executed by the CPU 202 (e.g., a percentage of branch instructions, a percentage of arithmetic instructions, etc.) for each virtual machine, frequency of reads and writes to memory (e.g., main memory 214) for each virtual machine, sizes of blocks of data read from and written to memory (e.g., main memory 214) for each virtual machine, cache hits/misses, thread occupancy, translation lookaside buffer (TLB) misses, page faults, etc, see para [0033])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the load characteristic taught by Kannan in view of Larson and Zheng with the different characteristics taught by Palermo with the motivation being to monitor different metrics for determining load.
Claim(s) 5, 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kannan (Pub No 20170206111) in view of Larson (Pub No 20120242672), Zheng (Pub No 20210360269), and Martin (Pub No 20180336065)
Regarding claim 5,
Kannan in view of Larson and Zheng teaches the method of claim 1, however does not teach further determine, based on a preset target frame rate, the target resource scheduling manner.
Martin teaches further comprising further determining the target manner based on a preset target frame rate. (interpreted as the budget represents the user-space host processor CPU time that will be required for the associated thread that executes the rendering task setup processing on the host processor 7…. The “period” of the real time scheduling parameters 55 represents the period in which the “budget” will be used. In the present embodiment, the period is expressed in terms of the target or maximum frame rate to be met, see para [0167]-[0168])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan in view of Larson and Zheng with the target frame rate for the threads as taught by Martin with the motivation being to meet the quality of service by meeting the target frame rate.
Regarding claim 8,
Kannan teaches the method of claim 5, further comprising determining the predicted load value based on the first load characteristic and second mapping relationship information, wherein the second mapping relationship information comprises a plurality of load characteristics and a load value corresponding to each of the load characteristics. (interpreted as after the first window, the normalized load of the thread is calculated to be 7%; thus the 0-10% bucket is incremented to 8. And after the second and third windows (where the normalized loads were 15 and 18%, respectively), the counter in the 11-20% bucket was incremented by 8 after each of the second and third windows so that after the third window the count in the 11-20% bucket is 16. But after the fourth window (where the normalized load was 17%), the 11-20% bucket is incremented by the big increment step to 32. As depicted, after each of windows 2-4, the count in the 0-10% bucket was decremented by 2 because R was the 11-20% bucket after each of windows 2-4. The resultant counts in FIG. 4 (34 in the 11-20% bucket and 48 in the 91-100% bucket) convey that the thread generally runs (for a maximum CPU frequency) either a short period of time or a long period of time, see para [0038])
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kannan (Pub No 20170206111) in view of Larson (Pub No 20120242672), Zheng (Pub No 20210360269), and Young (Pub No 20170090988)
Regarding claim 14,
Kannan teaches The method of claim 1, however does not teach frame drawing thread;
Larson teaches frame drawing thread (interpreted as drawing thread, para [0004])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan with the drawing threads taught by Larson with the motivation being to control the frequency/power in response to the predicted load thereby meeting the quality of service.
Kannan in view of Larson does not teach wherein when execution of the thread is not completed within a predetermined time, the method further comprises scheduling an additional resource for the thread to accelerate the execution of the thread, and wherein the predetermined time is a time required for completing the execution of the thread when a resource is scheduled for the thread in the target manner.
Young teaches wherein when execution of the thread is not completed within a predetermined time, the method further comprises scheduling an additional resource for the thread to accelerate the execution of the thread, and wherein the predetermined time is a time required for completing the execution of the thread when a resource is scheduled for the thread in the target manner. (interpreted as For example, consider a computing system having a first set of processor cores operating at a first speed and a second set of processor core operating at a second, slower speed. If a particular thread has a speed requirement above a threshold (alternatively, if the thread has a target completion time below a threshold), then the assignment module 220 may assign the thread to a processor core of the first (faster) set of processor cores, otherwise the assignment module 220 may assign the thread to a processor core of the second (slower) set of processor cores (e.g., in response to the thread completion time being less than the speed requirement), see para [0091])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the threads taught by Kannan in view of Larson and Zheng with the thread execution time limit as taught by Young with the motivation being to maintain a certain quality of service by performing task within a time threshold.
Allowable Subject Matter
Claims 3-4, 9-10, 15, 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 3,
The prior art does not teach the method of claim 1, wherein the first load
characteristic comprises of an average quantity of cycles per instruction (CPI),
of the frame drawing thread.
Regarding claim 4,
The prior art does not teach the method of claim 1, further comprising
determining, based on an average quantity of cycles per instruction (CPI) of the frame drawing thread in a first time interval, the first load characteristic, wherein the first time interval is a period of time between a start of execution of the frame drawing thread and an end of the execution of the frame drawing thread.
Regarding claim 9,
The prior art does not teach the method of claim 8, further comprising determining a load value corresponding to a reference load characteristic as the predicted load value when the load characteristics in the second mapping relationship information comprise the reference load characteristic, wherein a similarity between the reference load characteristic and the first load characteristic is greater than or equal to a similarity threshold.
Regarding claim 10,
The prior art do not teach The method of claim 8, further comprising determining, as the predicted load value, a load value of a frame preceding the image frame that is drawn using the frame drawing thread when the load characteristics in the second mapping relationship information do not comprise a reference load characteristic, wherein a similarity between the reference load characteristic and the first load characteristic is greater than or equal to a similarity threshold.
Regarding claim 15,
The prior art do not teach The method of claim 14, wherein a positive correlation relationship is between a size of the additional resource and a first difference, and wherein the first difference is between a time point of scheduling the additional resource and an end time point of the predetermined time.
Regarding claim 20,
The prior art do not teach The apparatus of claim 19, wherein the one or more processors are further configured to execute the computer instructions to cause the apparatus to: determine a first predicted load value of the frame drawing thread based on the load characteristic; determine a second predicted load value based on the application scenario and fourth mapping relationship information, wherein the fourth mapping relationship information comprises a plurality of application scenarios and a load value corresponding to each of the application scenarios; and further determine the target predicted load value based on the first predicted load value and the second predicted load value.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BAO G NGUYEN whose telephone number is (571)272-7732. The examiner can normally be reached M-F 10pm - 6:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Vu can be reached at 571-272-3155. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BAO G NGUYEN/Examiner, Art Unit 2461
/JASON E MATTIS/Primary Examiner, Art Unit 2461
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