DETAILED ACTION
This action is responsive to U.S. Patent Application No. 18/450,150 filed on 15 August 2023.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
Acknowledgment is made of Applicant' s Information Disclosure Statement(s) (IDS). The IDS(es) has/have been considered.
Election/Restrictions
Applicant’s election without traverse of the Group I claims 1-15 in the reply filed on 24 February 2025 is acknowledged.
Accordingly, claims 16-19 are withdrawn from further consideration.
Claim Objections
Applicant is advised that should claim 4 be found allowable, claim 15 will be objected to under 37 CFR 1.75 as being a substantial duplicate thereof. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11 and 15 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
“The essential inquiry pertaining to this requirement is whether the claims set out and circumscribe a particular subject matter with a reasonable degree of clarity and particularity. ‘As the statutory language of “particular[ity]” and “distinct[ness]” indicates, claims are required to be cast in clear—as opposed to ambiguous, vague, indefinite—terms. It is the claims that notify the public of what is within the protections of the patent, and what is not.’” MPEP § 2173.02(II) (quoting In re Packard, 751 F.3d 1307, 1313, 110 U.S.P.Q.2d 1785, 1788 (Fed. Cir. 2014)).
Regarding claim 11: Claim 11 states, in relevant part, “and contacts each of the first-type dielectric bridge structure, the second-type dielectric bridge structure, and the first trench dielectric material portion.” It is unclear whether the abovementioned phrase describes (1) the retro-stepped dielectric material portion as a whole, including both the bottommost and topmost retro-stepped dielectric material portions, or (2) only one of the topmost or bottommost retro-stepped dielectric material portions. For the purposes of examination, the relevant language has been interpreted in accordance with (1).
Claim 12, which depends from claim 11, is rejected under § 112(b) for at least the same reasons as claim 11.
Regarding claim 15: Claim 15 states, in relevant part: “a plurality of the first-type dielectric bridge structures having the first volume and a first pitch; and a plurality of the second-type dielectric bridge structures . . . .”
There is insufficient antecedent basis for the limitation “the first-type dielectric bridge structures” in the claim.
There is insufficient antecedent basis for the limitation “the second-type dielectric bridge structures” in the claim.
Applicant may cancel the claims, amend the claims, or present a sufficient showing that the claims comply with the statutory requirements.
Appropriate correction is required.
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claims 4 and 12 are rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends.
Regarding claim 4: Claim 1 recites: “a first laterally-extending trench fill structure contacting the first lengthwise sidewall of the at least one alternating stack and comprising: a first-type dielectric bridge structure having a first volume; a second-type dielectric bridge structure having a second volume greater than the first volume . . . .” “A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.” MPEP § 608.01(n)(III). “For example, if claim 1 recites the combination of elements A, B, C, and D, a claim reciting the structure of claim 1 in which D was omitted or replaced by E would not be a proper dependent claim, even though it placed further limitations on the remaining elements or added still other elements.” Id. (emphasis added). Thus, claim 4, which depends from claim 1 and recites “a plurality of the first-type dielectric bridge structures” and “a plurality of the second-type dielectric bridge structures” (i.e., replacing the previously recited singular first- and second-type dielectric bridge structures with plural first- and second-type dielectric bridge structures) is not a proper dependent claim, even though it places further limitations on the remaining elements or adds further elements.
Regarding claim 12: Claim 11 recites: “and contacts each of the first-type dielectric bridge structure, the second-type dielectric bridge structure, and the first trench dielectric material portion.” “A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.” MPEP § 608.01(n)(III). “For example, if claim 1 recites the combination of elements A, B, C, and D, a claim reciting the structure of claim 1 in which D was omitted or replaced by E would not be a proper dependent claim, even though it placed further limitations on the remaining elements or added still other elements.” Id. (emphasis added). Thus, claim 12, which depends from claim 11 and recites “wherein: the first-type dielectric bridge structure does not contact any of the two or more retro-stepped dielectric material portions” (i.e., omitting the previously recited limitation wherein the retro-stepped dielectric material portion contacts the first-type dielectric bridge structure) is not a proper dependent claim, even though it places further limitations on the remaining elements or adds further elements.
Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-15 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by U.S. Patent Publication No. 2022/0254804 (published Aug. 11, 2022) (hereinafter “Yoshida”).
Regarding independent claim 1, Yoshida discloses: A three-dimensional memory device (FIGS. 1-19, depicting a three-dimensional memory device, [0190]), comprising:
at least one alternating stack of insulating layers (FIGS. 1-19, insulating layers 132L/232L, [0156]) and electrically conductive layers (FIGS. 1-19, conductive layers 146/246, [0156]) having a first lengthwise sidewall and a second lengthwise sidewall that laterally extend along a first horizontal direction (FIGS. 1-19, depicting alternating stacks of insulating layers 132L/232L and conductive layers 146/246 that include first and second lengthwise sidewalls that laterally extend along a first horizontal direction);
memory openings (FIGS. 1-19, memory opening fill structures 58 disposed in memory openings 49, [0132]) vertically extending through the at least one alternating stack (FIGS. 1-19, depicting wherein the memory opening fill structures 58 disposed in memory openings 49 vertically extend through the alternating stacks of insulating layers 132L/232L and conductive layers 146/246);
memory opening fill structures located in the memory openings (FIGS. 1-19, memory opening fill structures 58),
wherein each of the memory opening fill structures comprises a vertical semiconductor channel (FIGS. 1-19, vertical semiconductor channel 60, [0132]) and a respective vertical stack of memory elements (FIGS. 1-19, elements of the memory film 50, [0125]) located at levels of the electrically conductive layers (FIGS. 1-19, depicting wherein the elements of the memory film 50 are located at levels of the conductive layers 146/246); and
a first laterally-extending trench fill structure (FIGS. 1-19, depicting a structure comprising, e.g., backside bridge regions 178, dielectric material portions 165/265, insulating layers 132L/232L, dielectric wall structures 176, [0156]-[0157]) contacting the first lengthwise sidewall of the at least one alternating stack (FIGS. 1-19, depicting wherein the structure contacts a first lengthwise sidewall of the alternating stacks of insulating layers 132L/232L and conductive layers 146/246) and comprising:
a first-type dielectric bridge structure (FIGS. 1-19, depicting, e.g., the rightmost depicted backside bridge region 178 in the inter-array region 200 having a first volume) having a first volume;
a second-type dielectric bridge structure (FIGS. 1-19, depicting, e.g., second or third from the rightmost depicted backside bridge region 178 in the inter-array region 200 having a second volume greater than the first volume) having a second volume greater than the first volume; and
a first trench dielectric material portion (FIGS. 1-19, e.g., dielectric wall structures 176).
Regarding claim 2, Yoshida further discloses wherein the second-type dielectric bridge structure (FIGS. 1-19, depicting, e.g., second or third from the rightmost depicted backside bridge region 178 having a first vertical thickness) has a greater vertical thickness than the first-type dielectric bridge structure (FIGS. 1-19, depicting, e.g., the rightmost depicted backside bridge region 178 having a second vertical thickness that is less than the first vertical thickness).
Regarding claim 3, Yoshida further discloses wherein the first-type dielectric bridge structure (FIGS. 1-19, depicting, e.g., the rightmost depicted backside bridge region 178) has a first top surface located within a first horizontal plane and has a first bottom surface that is vertically spaced from the first horizontal plane by a first vertical distance (FIGS. 1-19, depicting wherein the rightmost depicted backside bridge region 178 has a top and bottom surface separated by a first vertical distance);
the second-type dielectric bridge structure (FIGS. 1-19, depicting, e.g., second or third from the rightmost depicted backside bridge region 178) has a second top surface located within the first horizontal plane and having a second bottom surface that is vertically spaced from the first horizontal plane by a second vertical distance greater than the first vertical distance (FIGS. 1-19, depicting wherein the rightmost depicted backside bridge region 178 has a top and bottom surface separated by a second vertical distance that is greater than the first vertical distance, and the top surfaces of the respective bridge regions 178 are located in the same plane); and
the first trench dielectric material portion (FIGS. 1-19, e.g., dielectric wall structures 176) comprises a topmost surface segment located within the first horizontal plane between the first-type dielectric bridge structure and the second-type dielectric bridge structure (FIGS. 1-19, depicting wherein the dielectric wall structures 176 include top surfaces located in the same plane as the top surfaces of the respective bridge regions 178, as well as between the respective bridge regions 178),
a first recessed surface segment contacting the first bottom surface (FIGS. 1-19, depicting wherein the dielectric wall structures 176 include recessed segments 176F contacting the bottom surfaces of the respective bridge regions 178), and
a second recessed surface segment contacting the second bottom surface (FIGS. 1-19, depicting wherein the dielectric wall structures 176 include recessed segments 176F contacting the bottom surfaces of the respective bridge regions 178).
Regarding claim 4, Yoshida further discloses wherein the first laterally-extending trench fill structure (FIGS. 1-19, depicting a structure comprising, e.g., backside bridge regions 178, dielectric material portions 165/265, insulating layers 132L/232L, dielectric wall structures 176, [0156]-[0157]) comprises:
a plurality of the first-type dielectric bridge structures (FIGS. 1-19, depicting wherein the rightmost depicted backside bridge region 178 comprises a plurality of bridge structures including a larger structure and smaller structures) having the first volume and a first pitch (FIGS. 1-19, depicting wherein the rightmost depicted backside bridge region 178 has a first volume and a first pitch of smaller structures); and
a plurality of the second-type dielectric bridge structures (FIGS. 1-19, depicting, e.g., wherein the second or third from the rightmost depicted backside bridge region 178 comprises a plurality of bridge structures including a larger structure and smaller structures) having a second volume greater than the first volume, and a second pitch different from the first pitch (FIGS. 1-19, depicting wherein the second or third from the rightmost depicted backside bridge region 178 has a second volume greater than the first volume and a second pitch of smaller structures different from the first pitch).
Regarding claim 5, Yoshida further discloses wherein the second-type dielectric bridge structure (FIGS. 1-19, e.g., the second or third from the rightmost depicted backside bridge region 178) has at least one of a greater horizontal length along the first horizontal direction or a greater horizontal width along a second horizontal direction perpendicular to the first horizontal direction than the first-type dielectric bridge structure (FIGS. 1-19, depicting wherein the second or third from the rightmost depicted backside bridge region 178 has a greater horizontal width along a second horizontal direction (e.g., in a direction extending down towards the substrate 8) perpendicular to the first horizontal direction than the rightmost bridge structure 178).
Regarding claim 6, Yoshida further discloses at least one retro-stepped dielectric material portion (FIGS. 1-19, e.g., dielectric material portion 265, which is retro-stepped, [0096]) embedded within the at least one alternating stack and comprising a respective dielectric material (FIGS. 1-19, depicting wherein the dielectric material portion 265 is embedded in the alternating stacks of insulating layers 132L/232L and conductive layers 146/246), wherein one of the at least one retro-stepped dielectric material portion contacts each of the first-type dielectric bridge structure, the second-type dielectric bridge structure, and the first trench dielectric material portion (FIGS. 1-19, depicting wherein the dielectric material portion 265 contacts rightmost bridge structure 178, the second or third from the rightmost bridge structure 178, and the dielectric wall structures 176).
Regarding claim 7, Yoshida further discloses wherein the at least one alternating stack comprises a staircase having stepped surfaces (FIGS. 1-19, depicting wherein the alternating stacks of insulating layers 132L/232L and conductive layers 146/246 have a staircase shape and include stepped surfaces, [0113]);
the stepped surfaces contact stepped bottom surfaces of the at least one retro-stepped dielectric material portion (FIGS. 1-19, depicting wherein the stepped surfaces of the alternating stacks of insulating layers 132L/232L and conductive layers 146/246 contact bottom surfaces of the dielectric material portion 265);
the staircase comprises a respective lengthwise sidewall that contacts the first laterally-extending trench fill structure (FIGS. 1-19, depicting wherein the structure comprising, e.g., backside bridge regions 178, dielectric material portions 165/265, insulating layers 132L/232L, dielectric wall structures 176 contacts a respective lengthwise sidewall of the staircase shaped alternating stacks of insulating layers 132L/232L and conductive layers 146/246);
the memory opening fill structures are located in a first memory array region (FIGS. 1-19, depicting wherein the memory opening fill structures 58 are located in a first memory array region 100A, [0084]) and in a second memory array region (FIGS. 1-19, depicting wherein the memory opening fill structures 58 are located in a first memory array region 100B, [0084]);
the staircase is located between the first and the second memory array regions (FIGS. 1-19, depicting wherein the staircase shaped alternating stacks of insulating layers 132L/232L and conductive layers 146/246 is located in an inter-array region 200 between the first and second memory array regions 100A/100B, [0084]);
the electrically conductive layers extend continuously from the first memory array region to the second memory array region (FIGS. 1-19, depicting wherein the conductive layers 146/246 extend from the first memory array region 100A to the second memory array region 100B);
the first-type dielectric bridge structure is located laterally adjacent to an upper portion of the staircase (FIGS. 1-19, depicting wherein the rightmost bridge structure 178 is located laterally adjacent to an upper portion of the staircase shaped alternating stacks of insulating layers 132L/232L and conductive layers 146/246); and
the second-type bridge structure is located laterally adjacent to a lower portion of the staircase (FIGS. 1-19, depicting wherein the second or third from the rightmost bridge structure 178 is located laterally adjacent to a lower portion, located lower than the upper portion, of the staircase shaped alternating stacks of insulating layers 132L/232L and conductive layers 146/246).
Regarding claim 8, Yoshida further discloses layer contact via structures (FIGS. 1-19, layer contact via structures 86, [0157]) vertically extending through the at least one retro-stepped dielectric material portion (FIGS. 1-19, depicting wherein the layer contact via structures 86 vertically extends through the dielectric material portion 265) and contacting a top surface of a respective electrically conductive layer within the at least one alternating stack (FIGS. 1-19, depicting wherein the layer contact via structures 86 contact a top surface of respective conductive layers 146/246, [0157]).
Regarding claim 9, Yoshida further discloses wherein the at least one retro-stepped dielectric material portion (FIGS. 1-19, e.g., dielectric material portion 265, which is retro-stepped, [0096]) is laterally spaced from the second lengthwise sidewall (FIGS. 1-19, depicting wherein the dielectric material portion 265 is laterally spaced from the second lengthwise sidewall bounded by, e.g., another structure comprising, e.g., backside bridge regions 178, dielectric material portions 165/265, insulating layers 132L/232L, dielectric wall structures 176 that is not the first structure that overlaps with the dielectric material portion 265, [0156]-[0157]).
Regarding claim 10, Yoshida further discloses wherein the first laterally-extending trench fill structure further comprises an additional first-type dielectric bridge structure (FIGS. 1-19, e.g., either backside bridge region 178 located in the first or second memory array regions 100A/100B) that is laterally spaced from the first-type dielectric bridge structure and from the second-type dielectric bridge structure (FIGS. 1-19, depicting wherein the bridge region 178 located in the first or second memory array regions 100A/100B is laterally spaced from the bridge regions 178 in the inter array region 200), and does not directly contact any electrically conductive layer within the at least one alternating stack (FIGS. 1-19, depicting wherein the bridge region 178 in the first or second memory array regions 100A/100B does not electrically contact the conductive layer within the alternating stack in the inter-array region 200) or the at least one retro-stepped dielectric material portion (FIGS. 1-19, depicting wherein the bridge region 178 in the first or second memory array regions 100A/100B is located outside of the region in which the dielectric material portion 265 is disposed, and thus does not contact the dielectric material portion 265).
Regarding claim 11, Yoshida further discloses wherein the at least one retro-stepped dielectric material portion comprises two or more retro-stepped dielectric material portions that comprise:
a bottommost retro-stepped dielectric material portion (FIGS. 1-19, dielectric material portion 165, [0096]); and
a topmost retro-stepped dielectric material portion that overlies the bottommost retro-stepped dielectric material portion (FIGS. 1-19, dielectric material portion 265, [0113]), and
contacts each of the first-type dielectric bridge structure, the second-type dielectric bridge structure, and the first trench dielectric material portion (FIGS. 1-19, depicting wherein the combined dielectric material portion 165/265 contacts each of the rightmost bridge structure 178, the second or third from the rightmost bridge structure 178, and the dielectric wall structures 176).
Regarding claim 12, Yoshida further discloses wherein the first-type dielectric bridge structure does not contact any of the two or more retro-stepped dielectric material portions (FIGS. 1-19, depicting wherein at least a portion of the rightmost bridge structure 178, e.g., the smaller structures of the rightmost bridge structure 178, does not contact either of the dielectric material portions 165/265); the second-type dielectric bridge structure contacts the topmost retro-stepped dielectric material portion (FIGS. 1-19, depicting wherein at least a portion of the second or third from the rightmost bridge structure 178 contacts the dielectric material portions 165/265); and the first trench dielectric material portion contacts each of the two or more retro-stepped dielectric material portions (FIGS. 1-19, depicting wherein the dielectric wall structures 176 in the inter array region 200 contact each of the dielectric material portions 165/265).
Regarding claim 13, Yoshida further discloses wherein the first laterally-extending trench fill structure (FIGS. 1-19, depicting a structure comprising, e.g., backside bridge regions 178, dielectric material portions 165/265, insulating layers 132L/232L, dielectric wall structures 176, [0156]-[0157]) further comprises a third-type dielectric bridge structure (FIGS. 1-19, third from the rightmost backside bridge structure in the inter-array region 200 having a third volume greater than the second volume) having a third volume greater than the second volume.
Regarding claim 14, Yoshida further discloses a second laterally-extending trench fill structure (FIGS. 1-19, depicting a structure comprising, e.g., backside bridge regions 178, dielectric material portions 165/265, insulating layers 132L/232L, dielectric wall structures 176, located in the second horizontal direction hd2 outside of the region in which the dielectric material portion 265 is disposed, [0156]-[0157]) contacting the second lengthwise sidewall of the at least one alternating stack (FIGS. 1-19, depicting wherein the structure contacts a second lengthwise sidewall of the alternating stacks of insulating layers 132L/232L and conductive layers 146/246) and comprising additional dielectric bridge structures (FIGS. 1-19, depicting, e.g., backside bridge regions 178 in a second horizontal direction hd2), wherein each of the additional dielectric bridge structures within the second laterally-extending trench fill structure has that first volume (FIGS. 1-19, depicting wherein the bridge regions 178 in the second horizontal direction hd2 would have a same volume as the rightmost bridge region 178), wherein: each of the additional dielectric bridge structures has a same vertical thickness, horizontal length and horizontal width as each of the first-type dielectric bridge structures (FIGS. 1-19, depicting wherein the bridge regions 178 in the second horizontal direction hd2 would have a same vertical thickness, horizontal length, and horizontal width as the rightmost bridge region 178); and the second laterally-extending trench fill structure comprises a second trench dielectric material portion (FIGS. 1-19, e.g., dielectric wall structures 176) contacting each of the additional dielectric bridge structures and having a same material composition as the first trench dielectric material portion (FIGS. 1-19, dielectric wall structures in the second horizontal direction hd2 contact each of the bridge regions 178 in the second horizontal direction hd2 and have the same material composition as the dielectric wall structures 176 of the structure not in the second horizontal direction hd2, [0155]-[0156]).
Regarding independent claim 15, Yoshida discloses: Regarding independent claim 1, Yoshida discloses: A three-dimensional memory device (FIGS. 1-19, depicting a three-dimensional memory device, [0190]), comprising:
at least one alternating stack of insulating layers (FIGS. 1-19, insulating layers 132L/232L, [0156]) and electrically conductive layers (FIGS. 1-19, conductive layers 146/246, [0156]) having a first lengthwise sidewall and a second lengthwise sidewall that laterally extend along a first horizontal direction (FIGS. 1-19, depicting alternating stacks of insulating layers 132L/232L and conductive layers 146/246 that include first and second lengthwise sidewalls that laterally extend along a first horizontal direction);
memory openings (FIGS. 1-19, memory opening fill structures 58 disposed in memory openings 49, [0132]) vertically extending through the at least one alternating stack (FIGS. 1-19, depicting wherein the memory opening fill structures 58 disposed in memory openings 49 vertically extend through the alternating stacks of insulating layers 132L/232L and conductive layers 146/246);
memory opening fill structures located in the memory openings (FIGS. 1-19, memory opening fill structures 58),
wherein each of the memory opening fill structures comprises a vertical semiconductor channel (FIGS. 1-19, vertical semiconductor channel 60, [0132]) and a respective vertical stack of memory elements (FIGS. 1-19, elements of the memory film 50, [0125]) located at levels of the electrically conductive layers (FIGS. 1-19, depicting wherein the elements of the memory film 50 are located at levels of the conductive layers 146/246); and
a first laterally-extending trench fill structure (FIGS. 1-19, depicting a structure comprising, e.g., backside bridge regions 178, dielectric material portions 165/265, insulating layers 132L/232L, dielectric wall structures 176, [0156]-[0157]) contacting the first lengthwise sidewall of the at least one alternating stack (FIGS. 1-19, depicting wherein the structure contacts a first lengthwise sidewall of the alternating stacks of insulating layers 132L/232L and conductive layers 146/246) and comprising:
a first trench dielectric material portion (FIGS. 1-19, e.g., dielectric wall structures 176);
a plurality of the first-type dielectric bridge structures (FIGS. 1-19, depicting wherein the rightmost depicted backside bridge region 178 comprises a plurality of bridge structures including a larger structure and smaller structures) having the first volume and a first pitch (FIGS. 1-19, depicting wherein the rightmost depicted backside bridge region 178 has a first volume and a first pitch of smaller structures); and
a plurality of the second-type dielectric bridge structures (FIGS. 1-19, depicting, e.g., wherein the second or third from the rightmost depicted backside bridge region 178 comprises a plurality of bridge structures including a larger structure and smaller structures) having a second volume greater than the first volume, and a second pitch different from the first pitch (FIGS. 1-19, depicting wherein the second or third from the rightmost depicted backside bridge region 178 has a second volume greater than the first volume and a second pitch of smaller structures different from the first pitch).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. U.S. Patent Publication Nos.: 2019/0378855; 2017/0179151; 2021/0391346; 2015/0318301; 2022/0052067; 2023/0058328.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADAM D WEILAND whose telephone number is (703)756-4760. The examiner can normally be reached Monday - Friday 9am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ADAM D WEILAND/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813