DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed June 09, 2026, has been entered. Claims 1-4 and 6-21 remain pending in the application.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6, 14, 16-18, and 21 are rejected under 35 U.S.C. 103 as being unpatentable over Bussing et. al. (US 20210033646 A1), hereinafter Bussing, in view of Abwa et. al. (US 20090315547 A1), hereinafter Abwa.
Regarding claim 1, Bussing teaches a current sensor integrated circuit (IC) (Fig 2C integrated current sensor 220, [0051]) comprising: a lead frame (Fig 2C lead frame 200, [0058]) having a first surface (See annotated figure) and a second surface (See annotated figure) opposite to the first surface (See annotated figure) and comprising a primary conductor (Fig 2A conductive loop 202, [0048]) and signal leads (Fig 2A not labeled part of lead frame 200c); a first semiconductor die (Fig 2C die 242, [0052]) having a first surface (See annotated figure) and a second opposite surface (See annotated figure), wherein the first semiconductor die (Fig 2C die 242, [0052]) comprises a first magnetic field sensing element (Fig 2C magnetic field sensing element 244, [0052]) separated from the primary conductor (Fig 2A conductive loop 202, [0048]) by a first distance (distance from first surface of the lead frame to first die first surface dependent on usage desired, [0054]) and supported by the first surface (See annotated figure) of the first semiconductor die (Fig 2C die 242, [0052]) and configured to sense a magnetic field associated with a current through (the magnetic field sensing element senses the magnetic field selected depending on placement, [0054]) the primary conductor (Fig 2A conductive loop 202, [0048]) and to generate a first output signal (signal from second die 242, [0053]) indicative of the current (the circuit of the die 242 generates a signal indicative of the sensed current, [0056]) for coupling to a first signal lead (Fig 2C signal lead from 200c coupled with wire bond 248, [0053]); and a second semiconductor die (Fig 2C die 222, [0051]) having a first surface (See annotated figure) and a second opposite surface (See annotated figure), wherein the second semiconductor die (Fig 2C die 222, [0051]) comprises a second magnetic field sensing element (Fig 2C magnetic field sensing element 224, [0051]) separated from the primary conductor (Fig 2A conductive loop 202, [0048]) by a second distance (distance from second surface of the lead frame to second die first surface dependent on usage desired; the second die does not align with the first die in the z-direction, [0054]) and supported by the second surface (See annotated figure) of the second semiconductor die (Fig 2C die 222, [0051]) and configured to sense the magnetic field associated with the current through (the magnetic field sensing element senses the magnetic field selected depending on placement, [0054]) the primary conductor (Fig 2A conductive loop 202, [0048]) and to generate a second output signal indicative of the current (the circuit of the die 222 generates a signal indicative of the sensed current, [0056]) for coupling to a second signal lead (Fig 2C signal lead from 200c coupled with wire bond 232, [0053]), wherein the first output signal (the circuit of the die 242 generates a signal indicative of the sensed current, [0056]) is indicative of the current within a first range of currents (the output signal would naturally have a range of currents) and the second output signal (the circuit of the die 222 generates a signal indicative of the sensed current, [0056]) is indicative of the current within a second range of currents (the output signal would naturally have a range of currents).
Bussing fails to teach wherein the first distance is different than the second distance and as a result the first range of currents is different than the second range of currents.
However, Bussing teaches different die configurations that may be used for placement of dies on a frame (Fig 1A-1D, [0039]). Further, Bussing teaches the first sensing element does not align with the second sensing element in the z-direction ([0054]). Abwa teaches similar die configurations for magnetic sensor bodies (Fig 2A-2D, [0075]). Further, Abwa teaches it was known to one having ordinary skill in the art before the effective filing date of the claimed invention that the die placement configurations could be arranged such that one die has a wire bond to couple the field sensor die with a carrier body ([0102]); and a second die has bumps to couple the field sensor die with a carrier body ([0103]). One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that the coupling of magnetic sensors to the main body could be achieved using some combination of die placements as taught by Bussing and Abwa. Additionally, Abwa teaches a combination with wire bonds and bumps. That is, "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103." KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 421.
In modifying structure of Bussing with the teachings of Abwa, the first distance would be different from the second distance, and as a result of the change in distances the first range of currents would be different than the second range of currents.
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Regarding claim 2, Bussing as modified in claim 1 teaches a solder bump (Fig 1B solder balls 128, [0042]) or copper pillar (optional so not considered) to couple the first output signal (signal from second die 242, [0053]) to the first signal lead (Fig 2C signal lead from 200c coupled with Fig 1B solder balls 128, [0053] for die 242) and a wire bond (Fig 2 wire bond 232, [0053]) to couple the second output signal (signal from second die 222, [0053]) to the second signal lead (Fig 2C signal lead from 200c coupled with wire bond 232, [0053]).
Regarding claim 3, Bussing as modified in claim 1 teaches a mold material configured (not shown but taught as understood by those in the art that an enclosure is used, [0039]) to enclose the first semiconductor die (Fig 2C die 242, [0052]), the second semiconductor die (Fig 2C die 222, [0051]), and a portion of the lead frame (Fig 2C lead frame 200, [0058]) to form a package (not shown but taught as understood by those in the art that an enclosure is used, [0039]).
Regarding claim 6, Bussing as modified in claim 1 teaches a first insulation structure (Fig 2C insulator 230, [0052]) disposed between (Fig 2C) the primary conductor (Fig 2A conductive loop 202, [0048]) and the first semiconductor die (Fig 2C die 242, [0052]); and a second insulation structure (Fig 2C insulator 228, [0052]) disposed between (Fig 2C) the primary conductor (Fig 2A conductive loop 202, [0048]) and the second semiconductor die (Fig 2C die 222, [0051]).
Regarding claim 14, Bussing as modified in claim 1 teaches the primary conductor (Fig 2A conductive loop 202, [0048]) comprises at least one notch (Fig 2A not labeled, located where point 204a is located) and wherein the first magnetic field sensing element (Fig 2C magnetic field sensing element 244, [0052]) is substantially vertically aligned with a first side (magnetic field sensing element 244 is aligned in the z-direction with one of points 204a, 204b, or 204c as shown in Fig 2B, [0048]) of the at least one notch (Fig 2A not labeled, located where point 204a is located) and the second magnetic field sensing element (Fig 2C magnetic field sensing element 224, [0051]) is substantially vertically aligned with a second side (magnetic field sensing element 224 is aligned in the z-direction with one of points 204a, 204b, or 204c, [0054]) of the at least one notch (Fig 2A not labeled, located where point 204a is located).
Regarding claim 16, Bussing teaches a current sensor integrated circuit (IC) (Fig 2C integrated current sensor 220, [0051]) comprising: a lead frame (Fig 2C lead frame 200, [0058]) having a first surface (See annotated figure) and a second surface (See annotated figure) opposite to the first surface (See annotated figure) and comprising a primary conductor (Fig 2A conductive loop 202, [0048]) and signal leads (Fig 2A not labeled part of lead frame 200c); a first semiconductor die (Fig 2C die 242, [0052]) having a first surface (See annotated figure) and a second opposite surface (See annotated figure), wherein the first semiconductor die (Fig 2C die 242, [0052]) comprises a first magnetic field sensing element (Fig 2C magnetic field sensing element 244, [0052]) separated from the primary conductor (Fig 2A conductive loop 202, [0048]) by a first distance (distance from first surface of the lead frame to first die first surface dependent on usage desired, [0054]) and supported by the first surface (See annotated figure) of the first semiconductor die (Fig 2C die 242, [0052]) and configured to sense a magnetic field associated with a current (the magnetic field sensing element senses the magnetic field selected depending on placement, [0054]) through the primary conductor (Fig 2A conductive loop 202, [0048]) and to generate a first output signal (signal from second die 242, [0053]) indicative of the current (the circuit of the die generates a signal indicative of the sensed current, [0056]) for coupling to a first signal lead (Fig 2B right most signal lead from 200c); and a second semiconductor die (Fig 2C die 222, [0051]) having a first surface (See annotated figure) and a second opposite surface (See annotated figure), wherein the second semiconductor die (Fig 2C die 222, [0051]) comprises a second magnetic field sensing element (Fig 2C magnetic field sensing element 224, [0051]) separated from the primary conductor (Fig 2A conductive loop 202, [0048]) by a second distance (distance from second surface of the lead frame to second die first surface dependent on usage desired; the second die does not align with the first die in the z-direction, [0054]) and supported by the first surface (See annotated figure) of the second semiconductor die (Fig 2C die 222, [0051]) and configured to sense the magnetic field associated with the current through (the magnetic field sensing element senses the magnetic field selected depending on placement, [0054]) the primary conductor (Fig 2A conductive loop 202, [0048]) and to generate a second output signal indicative of the current (the circuit of the die generates a signal indicative of the sensed current, [0056]) for coupling to a second signal lead (Fig 2C signal lead from 200c coupled with wire bond 248, [0053]), wherein the first output signal (the circuit of the die 242 generates a signal indicative of the sensed current, [0056]) is indicative of the current within a first range of currents (the output signal would naturally have a range of currents) and the second output signal (the circuit of the die 222 generates a signal indicative of the sensed current, [0056]) is indicative of the current within a second range of currents (the output signal would naturally have a range of currents).
Bussing fails to teach wherein the first distance is different than the second distance and as a result the first range of currents is different than the second range of currents.
However, Bussing teaches different die configurations that may be used for placement of dies on a frame (Fig 1A-1D, [0039]). Further, Bussing teaches the first sensing element does not align with the second sensing element in the z-direction ([0054]). Abwa teaches similar die configurations for magnetic sensor bodies (Fig 2A-2D, [0075]). Further, Abwa teaches it was known to one having ordinary skill in the art before the effective filing date of the claimed invention that the die placement configurations could be arranged such that one die has a wire bond to couple the field sensor die with a carrier body ([0102]); and a second die has bumps to couple the field sensor die with a carrier body ([0103]). One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that the coupling of magnetic sensors to the main body could be achieved using some combination of die placements as taught by Bussing and Abwa. Additionally, Abwa teaches a combination with wire bonds and bumps. That is, "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103." KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 421.
In modifying structure of Bussing with the teachings of Abwa, the first distance would be different from the second distance, and as a result of the change in distances the first range of currents would be different than the second range of currents.
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Regarding claim 17, Bussing as modified in claim 16 teaches a first solder bump (Fig 1B solder balls 128, [0042]) or copper pillar (optional so not considered) to couple the first output signal (signal from second die 242, [0053]) to the first signal lead (Fig 2C signal lead from 200c coupled with Fig 1B solder balls 128, [0053] for die 242) and a wire bond (Fig 2 wire bond 232, [0053]) to couple the second output signal (signal from second die 222, [0053]) to the second signal lead (Fig 2C signal lead from 200c coupled with wire bond 232, [0053]).
Regarding claim 18, Bussing as modified in claim 16 teaches a mold material configured (not shown but taught as understood by those in the art that an enclosure is used, [0039]) to enclose the first semiconductor die (Fig 2C die 242, [0052]), the second semiconductor die (Fig 2C die 222, [0051]), and a portion of the lead frame (Fig 2C lead frame 200, [0058]) to form a package (not shown but taught as understood by those in the art that an enclosure is used, [0039]).
Regarding claim 21, Bussing as modified in claim 1 teaches the primary conductor (Fig 2A conductive loop 202, [0048]) comprises at least one current path (Fig 2A not shown in conductive loop 202, [0048]) and wherein the first magnetic field sensing element (Fig 2C magnetic field sensing element 244, [0052]) is substantially vertically aligned (element 244 can be disposed near any of points 204a, 204b, or,204c as desired, [0054]) and substantially horizontally aligned (element 244 can be disposed near any of points 204a, 204b, or,204c as desired, [0054]) with a first side of the current path (Fig 2A not shown in conductive loop 202, [0048]) and the second magnetic field sensing element (Fig 2C magnetic field sensing element 224, [0051]) is substantially vertically aligned (element 224 can be disposed near any of points 204a, 204b, or,204c as desired, [0054]) and not substantially horizontally aligned (element 224 and element 244 do not align in the z-direction, [0054]) with a second side of the current path (Fig 2A not shown in conductive loop 202, [0048]).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Bussing et. al. (US 20210033646 A1), hereinafter Bussing, in view of Abwa et. al. (US 20090315547 A1), hereinafter Abwa in further view of Huang (US 20020130398 A1).
Bussing as modified in claim 1 fails to teach a first mold material to enclose the first semiconductor die and a portion of the lead frame and the current sensor IC further comprises a second mold material to enclose the second semiconductor die.
However, Huang teaches a first mold material (Fig 4 resin molded block 41, [0038]) to enclose the first semiconductor die (Fig 4 semiconductor chip 44a, [0038] corresponds to Bussing: Fig 2C die 242, [0052]) and a portion of the lead frame (Fig 4 lead frame 40, [0038] corresponds to Bussing: Fig 2C lead frame 200, [0058]) and the current sensor IC (Fig 4 semiconductor package, [0038]) further comprises a second mold material (Fig 5F frame 43, [0043] and Fig 5G covering member 46, [0043]) to enclose the second semiconductor die (Fig 4 image sensing chip 44b, [0038] corresponds to Bussing: Fig 2C die 222, [0051]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Bussing and Abwa to incorporate the teachings of Huang by having a two-step method for enclosing the semiconductor dies. This would reduce the occurrence of voids thus increasing product reliability ([0006] and [0009]).
Claims 7-11 are rejected under 35 U.S.C. 103 as being unpatentable over Bussing et. al. (US 20210033646 A1), hereinafter Bussing, in view of Abwa et. al. (US 20090315547 A1), hereinafter Abwa in further view of Bacha et. al. (US 20190391185 A1), hereinafter Bacha.
Regarding claim 7, Bussing as modified in claim 6 fails to teach each of the first insulation structure and the second insulation structure comprise a polymer film.
However, Bacha teaches an insulation structure (Fig 4 insulation structure 408, [0048] corresponds to Bussing: Fig 2C insulator 228 and 230, [0051] and [0052] respectively) comprises a polymer film (polyimide tape, [0048]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Bussing to incorporate the teachings of Bacha by having the insulation structure comprise a polymer film. This would allow for a minimum working voltage ([0018]).
In modifying Bussing with the teachings of Bacha, the first insulation structure (Bussing: Fig 2C insulator 228, [0051]) and the second insulation structure (Bussing: Fig 2C insulator 230, [0052]) would comprise a polymer film (Bacha: polyimide tape, [0048]).
Regarding claim 8, Bussing as modified in claim 7 teaches each of the first insulation structure (Bussing: Fig 2C insulator 228, [0051]) and the second insulation structure (Bussing: Fig 2C insulator 230, [0052]) further comprises an adhesive layer (Bacha: polyimide tape, [0048]; tape has an adhesive layer).
Regarding claim 9, Bussing as modified in claim 8 teaches the polymer film (Bacha: polyimide tape, [0048]) and the adhesive layer (Bacha: polyimide tape, [0048]; tape has an adhesive layer) are provided as a tape (Bacha: polyimide tape, [0048]).
Regarding claim 10, Bussing as modified in claim 9 teaches the tape (Bacha: polyimide tape, [0048]) extends beyond a periphery (Bacha: Fig 4 insulation structure extends beyond die 402) of the first semiconductor die (Bussing: Fig 2C die 222, [0051]) and the second semiconductor die (Bussing: Fig 2C die 242, [0052]; the modification of Bacha applies to a die so it would apply equally to both dies).
Regarding claim 11, Bussing as modified in claim 9 teaches the tape (Bacha: polyimide tape, [0048]) extends beyond the primary conductor (Bussing: Fig 2A conductive loop 202, [0048]) adjacent to the signal leads (Bussing: Fig 2A not labeled part of lead frame 200c) by 0.4mm (Bacha: a minimum on 0.4mm, [0048]).
Claims 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over Bussing et. al. (US 20210033646 A1), hereinafter Bussing, in view of Abwa et. al. (US 20090315547 A1), hereinafter Abwa in further view of Lambin et. al. (US 20180366424 A1), hereinafter Lambin.
Regarding claim 12, Bussing as modified in claim 6 fails to teach an attachment material to attach the first semiconductor die to the first insulation structure and to attach the second semiconductor die to the second insulation structure.
However, Lambin teaches an attachment material (Fig 1 interface structure 113, [0048]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to have modified Bussing and Abwa to incorporate the teachings of Bacha by having an attachment material. This would allow for mechanically coupling a die to a substrate ([0031]).
In modifying Bussing with the teachings of Lambin, there would be an attachment material (Lambin: Fig 1 interface structure 113, [0048]) to attach the first semiconductor die (Bussing: Fig 2C die 222, [0051]) to the first insulation structure (Bussing: Fig 2C insulator 228, [0051]) and to attach the second semiconductor die (Bussing: Fig 2C die 242, [0052]) to the second insulation structure (Bussing: Fig 2C insulator 230, [0052]).
Regarding claim 13, Bussing as modified in claim 12 teaches the attachment material (Lambin: Fig 1 interface structure 113, [0048]) comprises a non-conductive adhesive (Lambin: epoxy resin, [0029]).
Claims 15 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Bussing et. al. (US 20210033646 A1), hereinafter Bussing, in view of Abwa et. al. (US 20090315547 A1), hereinafter Abwa, in further view of Haas et. al. (US 20180365974 A1), hereinafter Hass.
Regarding claim 15, Bussing as modified in claim 1 teaches signal leads (Fig 2A not labeled part of lead frame 200c) comprise first signal leads (Fig 2C signal lead from 200c coupled with Fig 1B solder balls 128, [0053] for die 242) associated with the first semiconductor die (Fig 2C die 242, [0052]) and second signal leads (Fig 2C signal lead from 200c coupled with wire bond 232, [0053]) associated with the second semiconductor die (Fig 2C die 222, [0051]).
Bussing fails to teach one or both of the first semiconductor die and the second semiconductor die further comprises a diagnostic circuit having an input coupled to a signal lead associated with the other one of the first semiconductor die and the second semiconductor die and configured to generate a diagnostic signal indicative of a status of the other one of the first semiconductor die and the second semiconductor die.
However, Bussing teaches a fault detection system using electronic circuits on the dies connected to the signal leads that can be used to detect a fault in the circuits of the dies ([0103]). Bussing further teaches the integrated circuit sensor can determine a failure of circuits on one of the dies and generate an output signal corresponding to the correctly operating die ([0057] and [0066]). Haas teaches checker circuits (Fig 1 checker circuit 34/36, [0048]) in individual dies (Fig 1 Dotted line boxes 50, 50a, 50b, 50c, and 50d, and 60, [0050]; the circuits and sensors for the dies can be internal or external depending on design consideration, [0050]) of a sensor IC (Fig 1 sensor IC, [0050]). Haas further teaches input signals (Fig 1 processed signals 30a and 30b, [0047]) to the checker circuits. One having ordinary skill in the art before the effective filing date of the claimed invention would combine the circuits of Haas with the failure circuits of Bussing to be able to detect faults in either semiconductor die to be able to output a signal for the correctly operating semiconductor die. The combination yielding results predictable to one having ordinary skill in the art before the effective filing date of the claimed invention.
In combing the teachings of Bussing and Haas, the current sensor IC of Bussing would have one or both of the first semiconductor die (Bussing: Fig 2C die 222, [0051]) and the second semiconductor die (Bussing: Fig 2C die 242, [0052]) further comprises a diagnostic circuit (Haas: checker circuit 34/36,[0048] located within Bussing: Fig 2C electronic circuit 226/246, [0051] and [0052]) having an input coupled to a signal lead associated (not shown) with the other one of the first semiconductor die (Bussing: Fig 2C die 222, [0051]) and the second semiconductor die (Bussing: Fig 2C die 242, [0052]) and configured to generate a diagnostic signal indicative of a status (Haas: processed signals 30a/30b, [0047]) of the other one of the first semiconductor die (Haas: Fig 2C die 222, [0051]) and the second semiconductor die (Haas: Fig 2C die 242, [0052]).
Regarding claim 19, Bussing teaches a method of manufacturing ([0047]-[0054]) a current sensor integrated circuit (IC) (Fig 2C integrated current sensor 220, [0051]) comprising: providing a lead frame (Fig 2A lead frame 200, [0058]) having a first surface (See annotated figure) and a second surface (See annotated figure) opposite to the first surface (See annotated figure) with a primary conductor (Fig 2A conductive loop 202, [0048]) and signal leads (Fig 2A not labeled part of lead frame 200c); positioning (disposing under a bottom surface, [0052]) a first semiconductor die (Fig 2C die 242, [0052]) adjacent to the first surface (See annotated figure) of the lead frame (Fig 2C lead frame 200, [0058]), wherein the first semiconductor die (Fig 2C die 242, [0052]) is associated with a first plurality of the signal leads (Fig 2A not labeled leads with wire bonds {not labeled} coupled to part of lead frame 200c, right portion) and comprises a first magnetic field sensing element (Fig 2C magnetic field sensing element 244, [0052]) separated from the primary conductor (Fig 2A conductive loop 202, [0048]) by a first distance (distance from first surface of the lead frame to first die first surface dependent on usage desired, [0054]) and configured to sense a magnetic field associated with a current through (the magnetic field sensing element senses the magnetic field selected depending on placement, [0054]) the primary conductor (Fig 2A conductive loop 202, [0048]) and to generate a first output signal indicative of the current (the circuit of the die generates a signal indicative of the sensed current, [0056]) for coupling to one or more of the first plurality of signal leads (Fig 2A not labeled leads with wire bonds {not labeled} coupled to part of lead frame 200c, right portion); and positioning (disposing on top surface, [0051]) a second semiconductor die (Fig 2C die 222, [0051]) adjacent to the second surface (See annotated figure) of the lead frame (Fig 2C lead frame 200, [0058]), wherein the second semiconductor die (Fig 2C die 222, [0051]) is associated with a second plurality of the signal leads (Fig 2A not labeled leads with wire bonds 232 coupled to part of lead frame 200c, left portion) and comprises a second magnetic field sensing element (Fig 2C magnetic field sensing element 224, [0051]) separated from the primary conductor (Fig 2A conductive loop 202, [0048]) by a first distance (distance from second surface of the lead frame to second die first surface dependent on usage desired; the second die does not align with the first die in the z-direction, [0054]) and configured to sense the magnetic field associated with the current (the magnetic field sensing element senses the magnetic field selected depending on placement, [0054]) through the primary conductor (Fig 2A conductive loop 202, [0048]) and to generate a second output signal indicative of the current (the circuit of the die generates a signal indicative of the sensed current, [0056]) for coupling to one or more of the second plurality of signal leads (Fig 2A not labeled leads with wire bonds 232 coupled to part of lead frame 200c, left portion), wherein the first output signal (the circuit of the die 242 generates a signal indicative of the sensed current, [0056]) is indicative of the current within a first range of currents (the output signal would naturally have a range of currents) and the second output signal (the circuit of the die 222 generates a signal indicative of the sensed current, [0056]) is indicative of the current within a second range of currents (the output signal would naturally have a range of currents).
Bussing fails to teach the first semiconductor die comprises a diagnostic circuit having an input coupled to one or more of the second plurality of signal leads and configured to generate a first diagnostic signal indicative of a status of the second semiconductor die; and the first distance is different than the second distance and as a result the first range of currents is different than the second range of currents.
However, Bussing teaches a fault detection system using electronic circuits on the dies connected to the signal leads that can be used to detect a fault in the circuits of the dies ([0103]). Bussing further teaches the integrated circuit sensor can determine a failure of circuits on one of the dies and generate an output signal corresponding to the correctly operating die ([0057] and [0066]). Haas teaches checker circuits (Fig 1 checker circuit 34/36, [0048]) in individual dies (Fig 1 Dotted line boxes 50, 50a, 50b, 50c, and 50d, and 60, [0050]; the circuits and sensors for the dies can be internal or external depending on design consideration, [0050]) of a sensor IC (Fig 1 sensor IC, [0050]). Haas further teaches input signals (Fig 1 processed signals 30a and 30b, [0047]) to the checker circuits. One having ordinary skill in the art before the effective filing date of the claimed invention would combine the circuits of Haas with the failure circuits of Bussing to be able to detect faults in either semiconductor die to be able to output a signal for the correctly operating semiconductor die. The combination yielding results predictable to one having ordinary skill in the art before the effective filing date of the claimed invention.
In combing the teachings of Bussing and Haas, the current sensor IC of Bussing would have the first semiconductor die (Bussing: Fig 2C die 222, [0051]) comprises a diagnostic circuit (Haas: checker circuit 34/36,[0048] located within Bussing: Fig 2C electronic circuit 226/246, [0051] and [0052]) having an input coupled (not shown) to one or more of the second plurality of signal leads (Fig 2A not labeled leads with wire bonds {not labeled} coupled to part of lead frame 200c, right portion) and configured to generate a first diagnostic signal (Haas: processed signals 30a/30b, [0047]) indicative of a status of the second semiconductor die (Bussing: Fig 2C die 242, [0052]).
Bussing and Haas fail to teach the first range of currents is different than the second range of currents and the first distance is different than the second distance.
However, Bussing teaches different die configurations that may be used for placement of dies on a frame (Fig 1A-1D, [0039]). Further, Bussing teaches the first sensing element does not align with the second sensing element in the z-direction ([0054]). Abwa teaches similar die configurations for magnetic sensor bodies (Fig 2A-2D, [0075]). Further, Abwa teaches it was known to one having ordinary skill in the art before the effective filing date of the claimed invention that the die placement configurations could be arranged such that one die has a wire bond to couple the field sensor die with a carrier body ([0102]); and a second die has bumps to couple the field sensor die with a carrier body ([0103]). One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that the coupling of magnetic sensors to the main body could be achieved using some combination of die placements as taught by Bussing and Abwa. Additionally, Abwa teaches a combination with wire bonds and bumps. That is, "a person of ordinary skill has good reason to pursue the known options within his or her technical grasp. If this leads to the anticipated success, it is likely that product [was] not of innovation but of ordinary skill and common sense. In that instance the fact that a combination was obvious to try might show that it was obvious under § 103." KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 421.
In modifying structure of Bussing with the teachings of Abwa, the first distance would be different from the second distance, and as a result of the change in distances the first range of currents would be different than the second range of currents.
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Regarding claim 20, Bussing as modified in claim 19 teaches the one or more of the second plurality of signal leads (Fig 2A not labeled leads with wire bonds 232 coupled to part of lead frame 200c, left portion) comprises one or more of a supply connection (electrical signals, [0044]), a ground connection (optional so not considered), or an output connection (optional so not considered).
Response to Arguments
Applicant's arguments, see 35 USC §103 section starting on page 8, filed June 09, 2026, with
respect to the amendments to independent claim 1 as they pertain to Bussing, have been fully considered but they are not persuasive.
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Bussing teaches the first and second magnetic field sensing elements can be disposed near one of the points 204a, 204b, or 204c and do not align in the z-direction ([0054]). One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that by not having the same alignment and/or being placed near different points the distances the magnetic field sensed would be different for the first and second sensing elements.
Applicant's arguments, see 35 USC §103 section starting on page 10, filed June 09, 2026, with
respect to the amendments to independent claim 1 as they pertain to Abwa, have been fully considered but they are not persuasive.
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Variations in the vertical direction as taught by Abwa results in different distances for a stack of magnetic field sensitive elements from a magnetic source ([0070]). One having ordinary skill in the art before the effective filing date of the claimed invention would have modified Bussing using the teachings of Abwa to vary the distance in a vertical direction from the primary conductor. This variation would also cause variations in the magnetic field sensed.
Applicant's arguments, see 35 USC §103 section on page 13, filed June 09, 2026, with
respect to the amendments to independent claims 16 and 19 as they pertain to Bussing and Abwa, have been fully considered but they are not persuasive.
Similar to the above responses for independent claim 1, Bussing and Abwa in combination teach the limitations as claimed.
Conclusion
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
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/ALVIN L LEE/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
