DETAILED ACTION
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on March 18, 2026 has been entered. Claims 1, 3-12, and 14-20 are pending.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3-6, 12, and 14 -17 are rejected under 35 U.S.C. 103 as being unpatentable over Gupta et al. (US 2022/0221743 A1, herein “Gupta”) in view of Sato (JP-2004198697-A, herein “Sato”).
Regarding claim 1, Gupta discloses an optical transmitter (Fig.5: 600; Para [0062]), comprising:
a printed circuit board (PCB – Fig.6: 601; Para [0063]), comprising a transmitter circuit (Fig. 6: 604), the transmitter circuit having a set of signal output ports (606/610);
a photonic integrated circuit (Fig.6: 602; Para [0069]), comprising:
a photonic integrated circuit (PIC) substrate (Fig. 6: substrate of 602), having a set of input pads (616/618);
a micro ring modulator (Fig. 6: 404; Para [0070]), located on the PIC substrate (404 is on substrate of 602), the micro ring modulator (404) comprising a set of electrical pads (Fig. 6: 616/618), the set of input pads (portion of 616/618 extending to micro ring resonator 404) being electrically connected to the set of electrical pads, and the micro ring modulator (404) having a modulation impedance value (the impedance value depends on the signal of 606/610 since 604 is responsible for modulating signal Para [0058]; thus the impedance of wiring bonds 614 other circuit elements acts an impedance to the signal from 604; Para [0058-0060]); and
a matching circuit (Fig. 6: element 620/622/624/626 makes up the circuit for matching impedance to signal of 604 Para [0058]- [0060], wherein 620/622 are resistors to match impedance coming from 606/610; Para [0058]) located on the PIC substrate and electrically connected to the set of electrical pads 620/624/ 626/ 622 are electrically coupled 616 and 618); and
a set of PCB bond wires (Fig. 6: 614), electrically connected to the set of signal output ports (606/610) and the set of input pads (616/618);
wherein the matching circuit and the set of PCB bond wires have a matching impedance value (Para [0058]), and the matching impedance value substantially matches the modulation impedance value (Para [0058]).
Gupta further discloses a matching circuit comprises matching resistances (620/622) and a set of substrate bond wires (614), the matching resistances being connected to the set of electrical pads (616/624 and 618/626) through the set of substrate bond wires, and the set of substrate bond wires, the match resistances and the set of PCB bond wires having the matching impedance values (both resistors have 25 ohms – “matching impedance”).
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However, Gupta teaches the two branches of which each contains impedance matching resistors (622/620) can, but does not necessarily have the same matching impedance (for example, 25 ohms for a combine 50 ohms to match the impedance of bonding wires 614 [0058]). If both resistances 620 and 622 have matching resistance then the two branches combined would meet the limitations of “matching resistance and a set of substrate bond wires, the matching resistance being connected to the set of electrical pads through the set of substrate bond wires”.
One skilled in the art may be motivated to set both resistances 620 and 622 to the same resistance where those are found to be optimal values to reduce signal reflectance. For example, Sato teaches a matching impedance circuit wherein strip line 6 has a resistance of 50 ohms, wherein a series resistance (Figure 1: R) is used to provide a matching impedance in order to reduce reflectance (Para [0012]). This is the same solution provided by the applicant (pre-grant publication US 2024/0361548 A1: Paras [0030] ,[0037-0038]). Saito further indicates that the reflectance can be calculated by varying the resistance and inductance of the of the matching circuit (Para [0012]). Thus, it would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to set the two resistances of 620 and 622 of Gupta at the same value to optimize for reduction in signal reflection. Achieving a desired resistance that will reduce reflections within the ring resonator in order would promote optical coupling efficiency. One of ordinary skill in the art can modify the circuit to have similar or same resistances or varying resistance base on desired reflectance efficiency needed for the modulator.
Claim 3. Gupta in view of Sato (herein “Gupta / Sato”) teach the invention of claim 1, but Gupta / Sato do not disclose wherein the bond wires are 0.5 to 2 mil and has a length between 50- 3000 µm.
It would have been an obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the wire to be 0.5-2 mil and have a length of 50-3000 µm in order to adjust resistance impedance of modulation signal and the matching impedance of the circuit. The modification allows for the using less wires and reducing amount wires require and to reduce electrical heat within the device while ensure just enough impedance to maintain functionality. It has been held such a modification would have involved a mere change in the size of the component. A change of size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claims 4. Gupta / Sato teach the device of claim 1, wherein Gupta / Sato teach the matching circuit comprises a matching resistance (620/622), the matching resistance being directly electrically connected to the set of electrical pads (Fig. 6: 616/618 and 620/622).
Claim 5. Gupta / Sato teach the device of claim 1, wherein Gupta / Sato teach the set of signal output ports comprise an S signal output port and a G signal output port (See S and G output above), the set of input pads comprise an S input pad (See 626 above) and a G input pad (See 624 above), the set of electrical pads comprise an S electrical pad (See 618) and a G electrical pad (See 616 above), the matching circuit comprises a matching resistance (620/622), and the set of PCB bond wires comprise an S PCB bond wire (See 614 coupled 626) and a G PCB bond wire (See 614 coupled to 624), the S PCB bond wire and the G PCB bond wire electrically connecting the S signal output port and the G signal output port to the S input pad and the G input pad respectively (the bond wires 614 are all “electrically connecting” to output ports G / S), the S input pad and the G input pad being electrically connected to the S electrical pad and the G electrical pad respectively (626/624 are electrically connected to 616/618), and two ends of the matching resistance being electrically connected to the S electrical pad and the G electrical pad respectively (620 of 622 are electrically connected to 616/618).
Claim 6. Gupta / Sato teach the device of claim 5, wherein Gupta teaches the resistance value of the matching resistance is 10 to 1000 ohm (Para [0058]).
Claim 12. Gupta teach a photonic integrated circuit (Fig. 6: 601), comprising:
a photonic integrated circuit (PIC) substrate (substrate of 602), having a set of input pads (Fig. 6: 624/626);
a micro ring modulator (Fig. 6: 404), located on the PIC substrate (Fig. 6: 404/602), the micro ring modulator comprising a closed loop optical waveguide (See circular area of 404), a directional optical waveguide (Fig. 6: see straight area of 404 touching the loop portion) and a set of electrical pads (616/618), the closed loop optical waveguide being adjacent to the directional optical waveguide (Fig. 6: See circular and straight area of 404 touching each other), the set of input pads being electrically connected to the set of electrical pads (616/618 coupled 626/624) a, and the micro ring modulator having a modulation impedance value (Para [0058]); and
a matching circuit (620/622/624/626) located on the PIC substrate and electrically connected to the set of electrical pads (618/616), the matching circuit having a matching impedance value (Para [0058]), and the matching impedance value substantially matching the modulation impedance value (Para [0058]).
However, Gupta teaches the two branches of which each contains impedance matching resistors (622/620) can have the same matching impedance (25 ohms for a combine 50 ohms to match the impedance of bonding wires 614 [0058]). Thus the two branches combined would meet the limitations of “matching resistance and a set of substrate bond wires, the matching resistance being connected to the set of electrical pads through the set of substrate bond wires”.
Sato teaches a matching impedance circuit wherein strip line 6 has a resistance of 50 ohms, wherein a series resistance (Figure 1: R) is used to provide a matching impedance in order to reduce reflectance (Para [0012]). Following the rational provided in the rejection of claim 1 above, one skilled in the art would find it obvious to achieve the claimed invention.
Claim 14. Gupta / Sato teach the device of claim 12, but Gupta / Sato do not disclose wherein the bond wires are 0.5 to 2 mil and has a length between 50- 3000 µm.
It would have been an obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the wire to be 0.5-2 mil and have a length of 50-3000 µm in order to adjust resistance impedance of modulation signal and the matching impedance of the circuit. The modification allows for the using less wires and reducing amount wires require and to reduce electrical heat within the device while ensure just enough impedance to maintain functionality. It has been held such a modification would have involved a mere change in the size of the component. A change of size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Claim 15. Gupta / Sato teach the device of claim 12, wherein Gupta / Sato teach the matching circuit comprises a matching resistance (620/622), the matching resistance being directly electrically connected to the set of electrical pads (Fig. 6: 616/618 and 620/622).
Claim 16. Gupta / Sato teach the device of claim 1, wherein Gupta / Sato teach the set of input pads (624/626) comprise an S input pad (626) and a G input pad (624), and the set of electrical pads (616/618) comprise an S electrical pad ((618)and a G electrical pad (616), and the S input pad (626) and the G input pad (624) being electrically connected to the S electrical pad and the G electrical pad respectively (626/628 is electrically connected to 624/626), and the matching circuit (620/624/622/626) being electrically connected to the S electrical pad and the G electrical pad (616/618).
Claim 17. Gupta / Sato teach the device of claim 16, wherein Gupta / Sato teach the resistance value of the matching resistance is 10 to 1000 ohm (Para [0058]).
Claims 7-10 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Gupta / Sato, as applied to claims 1 and 12 above, and in view further view of Alfano et al. (US 2008/0031286 A1, herein “Alfano”).
Regarding claims 7-10 and 18-20, Gupta / Sato teach the device of claims 1 and 12, wherein Gupta / Sato teach the set of signal output ports comprise an S signal output port (See S output port on 604), a first G signal output port (See G port on 605), the set of input pads comprise an S input pad (626), a first G input pad (624), the set of electrical pads comprise an S electrical pad (618), a first G electrical pad (616) , the matching circuit comprises a first matching resistance (620) and a second matching resistance (622), and the set of PCB bond wires comprise an S PCB bond wire (see S – PCB Bond wire), a first G PCB bond wire (See G PCB bond wire), the S PCB bond wire, the first G PCB bond wire electrically connecting the S signal output port (See PCB Bond wires S/G are “electrically connected” to the S output port), the first G signal output port (See G output port) and, the first G input pad and the second G input pad respectively (Fig. 6), two ends of the first matching resistance (620/622) being electrically connected to the S electrical pad (618) and the first G electrical pad (616) respectively, and two ends of the second matching resistance being electrically connected to the S electrical pad and the second G electrical pad respectively (See 616/618 coupled to 620 and 622); wherein the resistance value of the matching resistance (620) and the second resistance (622) value is 10 to 1000 ohm (Para [0058]).
Gupta / Sato do not teach a second G signal output port, and a second G input pad, and a second G electrical pad, and a second G PCB bond wire, and the second G PCB bond wire electrically connecting the S signal output port, the second G signal output port to the S input pad, and the second G input pad being electrically connected to the S electrical pad, the first G electrical pad and the second G electrical pad respectively; wherein the two ends of the first matching resistance are directly electrically connected to the S electrical pad and the first G electrical pad, and the two ends of the second matching resistance are directly electrically connected to the S electrical pad and the second G electrical pad; wherein the matching circuit further comprises a set of substrate bond wires, the set of substrate bond wires comprising an S substrate bond wire, a first G substrate bond wire and a second G substrate bond wire, the S substrate bond wire and the first G substrate bond wire electrically connecting the two ends of the first matching resistance to the S electrical pad and the first G electrical pad respectively, and the S substrate bond wire and the second G substrate bond wire electrically connecting the two ends of the second matching resistance to the S electrical pad and the second G electrical pad respectively. The features above are shown in the applicant disclosure of Fig. 9 wherein a 3rd branch having 23c (2nd G input pad) and 248 (2nd G electric pad) is coupled to 14c (2nd G output port) the 3rd branch is also connected to a resistor 262. Gupta further does not disclose any input ports such as 15a-b as disclosed by the applicant.
The examiner finds the features relating wherein a 3rd branch having 23c (2nd G input pad) and 248 (2nd G electric pad) is coupled to 14c (2nd G output port) and coupled to a resistor to be obvious over the prior art of Gupta because it only requires a duplication of one of the branches taught by Gupta of having an electric pad, input ports, and input pads, another set bonding wires to the substrate and PCB which are all coupled to modulator 404 and each other electrically. The additional branch allows for the ring modulator to be modulated in different locations which will result in a more stable and modulator since the modulator driving signal will be more evenly distributed. Thus, resulting in configurations described by the limitations of “does not teach a second G signal output port, and a second G input pad, and a second G electrical pad, and a second G PCB bond wire, and the second G PCB bond wire electrically connecting the S signal output port, the second G signal output port to the S input pad, and the second G input pad being electrically connected to the S electrical pad, the first G electrical pad and the second G electrical pad respectively, wherein the matching circuit further comprises a set of substrate bond wires, the set of substrate bond wires comprising an S substrate bond wire, a first G substrate bond wire and a second G substrate bond wire, the S substrate bond wire and the first G substrate bond wire electrically connecting the two ends of the first matching resistance to the S electrical pad and the first G electrical pad respectively, and the S substrate bond wire and the second G substrate bond wire electrically connecting the two ends of the second matching resistance to the S electrical pad and the second G electrical pad respectively”.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the existing configuration of Gupta to include a 3rd branch will includes the additional structures of having 23c (2nd G input pad) and 248 (2nd G electric pad) is coupled to 14c (2nd G output port), since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8 (1977).
Gupta / Sato do not disclose the driver circuit has 2 input ports.
Alfano teaches a driver circuit element 1408 having multiple input I/O (Fig. 14a: 1408a). It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the driver circuit element 604 of Gupta to include multiple inputs ports that will instruct the driver to drive different output ports individually. This allows the driver signal to be better regulated to driver different location on the ring modulator with different parameters.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Gupta / Sato, as applied to claim 1 above, and in further view of Hjartarson (US 2020/0116932 A1, herein “Hjartarson”).
Gupta / Sato teach the device of claim 1. Gupta / Sato do not teach the transmitter circuit comprises a pulse amplitude modulation circuit, a drive circuit and a set of signal input ports, the pulse amplitude modulation circuit modulating an input signal from the set of signal input ports into a modulation signal, and the drive circuit converting the modulation signal into a drive signal.
Hjartarson teaches the transmitter circuit (Fig. 1) comprises a pulse amplitude modulation circuit (Fig. 1: 120 EAM which has pulse amplitude modulation functionality; Para [0047]), a drive circuit (Para [0047]) and a set of signal input ports (Fig. 1: 132 and 122), the pulse amplitude modulation circuit modulating an input signal from the set of signal input ports into a modulation signal, and the drive circuit converting the modulation signal into a drive signal (Fig. 1; Para [0047]). It would have been obvious to one of ordinary skill in art before the effective filing date of the claimed invention to modify the driver circuit 604 of Gupta to include the components of a pulse modulation amplifier (EAM) in order to process more complicated modulated schemes such QAM and QPSK (Para [0047]). This modification allows the device to be placed in more complicated modulation scheme applications.
Response to Arguments
Applicant’s arguments with respect to claims 13-12, and 14-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. As explained in the above rejections, the goal of the claimed invention is realized in Gupta. As explained in Gupta, “The resistance of the resistors 620, 622 is chosen to match the impedance of the transmission line, resulting in the resistors 620, 622 acting as terminators and absorbing the signal sent on the traces 606, 610. As there are two resistors 620, 622, each resistor has a resistance equal to about half of the impedance of the transmission line formed by the traces 606, 610.” [0058] One skilled in the art would recognize that the goal of “absorbing the signal sent on the trace is the same goal of the instant disclosure described in the publication paragraph [0030] which explains when the impedance values are matched, there is no reflection, therefore absorption of the signal sent on the traces, suppressing resonance generation. The electrical layout of the Gupta matching circuit and the disclosed matching circuit are slightly different, however the absorption/anti-reflection function is the same. Examiner further notes that Applicant’s comments of 3/18/2026 regarding that the “Examiner acknowledges that Gupta does not explicitly teach that the matching circuit comprises a matching resistance (Gupta teaches two resistances) for achieving matching impedance value” is not contradictory to the position take above with Gupta in view of Sato. While Gupta does not expressly teach or state that the resistance of both 620 and 622 must be the same, it does not exclude the possibility that they may be the same if that is found to be the optimum value for both to achieve the absorption/anti-reflection property desired.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Erin D Chiem whose telephone number is (571)272-3102. The examiner can normally be reached 10 am - 6 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas A. Hollweg can be reached at (571) 270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIN D CHIEM/Examiner, Art Unit 2874
/THOMAS A HOLLWEG/Supervisory Patent Examiner, Art Unit 2874
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