Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Regarding independent claims the limitations assign work based upon information and determine slots are unavailable, as drafted, recites functions that, under its broadest reasonable interpretation, covers a function that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitations as cited above as drafted, are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process.
Thus, these limitation falls within the “Mental Processes” grouping of abstract ideas under Prong 1.
Under Prong 2, this judicial exception is not integrated into a practical application. The claim recites the following additional limitations: circuitry, processor sub-units, hardware slots, control circuitry. The additional elements are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using generic computer, and/or mere computer components, MPEP 2106.05(f). Accordingly, the additional elements do not integrate the recited judicial exception into a practical application and the claim is therefore directed to the judicial exception. See MPEP 2106.05(g) (Ex. v. Consulting and updating an activity log, Ultramercial, 772 F.3d at 715, 112 USPQ2d at 1754).
Under Step 2B, the claims do not include additional elements that are sufficient to amount to significantly more than the judicial exception. As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of circuitry, processor sub-units, hardware slots, control circuitry amount to no more than mere instructions, or generic computer/computer components to carry out the exception.
The recitation of generic computer instruction and computer components to apply the judicial exception, and mere data gathering do not amount to significantly more, thus, cannot provide an inventive concept. Accordingly, the claims are not patent eligible under 35 USC 101.
Regarding claim 2, 4, 8, 19 the limitations of in response to an attempt to obtain and failure of the attempt, using a no-overlap mode, access a data structure and selecting work from the structure are nothing more than insignificant extra solution activity which is not a practical application under prong 2.
Regarding claim 3, 7 the limitation of using a number of slots and executing work using those slots, dedicated slots based upon a type are considered mere instructions, or generic computer/computer components to carry out the exception Accordingly, the additional element recited in claim 3 fails to provide a practical application under prong 2, or amount to significantly more under step 2B.
Regarding claim 5, 9, 10, 11, 12, 13, 14, 16, 17 the limitations of aggregating, assigning work, allocating a number within a range, determining a number of units are functions that can be reasonably performed in the human mind, thus, additional mental process defined in the claims. The claim does not include any additional element, thus, no limitation that needs to be analyzed under prong 2 for practical application, or under step 2B for significantly more. The limitation regarding writing to a buffer, under step 2B, the courts of identified the generic function of gathering data, the results of the judicial exception, is well-understood, routine and conventional activity
Regarding claim 6, 20 the limitations of waiting prior to executing are nothing more than insignificant extra solution activity which is not a practical application under prong 2. The limitation regarding storing, under step 2B, the courts of identified the generic function of gathering data, the results of the judicial exception, is well-understood, routine and conventional activity
Claim Rejections - 35 USC §103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim/s 1, 15, 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully (Pub. No. US 2023/0393898) in view of Gupta (Pat. No. US 9,223,686).
Claim 1, 15, 18 Cully teaches “an apparatus, comprising: graphics control circuitry that implements a plurality of logical slots ([0025] FIG. 3 depicts a work queue for a particular node, and idle and active sets of workloads that are tracked by orchestration service 105, according to embodiments. In the embodiment illustrated herein, pod VMs are examples of workloads, and a pod VM controller of a node manages the work queue for that node. Each entry of the work queue contains a descriptor for the workload and a priority of the workload. The work queue has entries for idle workloads and entries for active workloads. Orchestration service 105 tracks the idle workloads of all nodes in idle set 304, and tracks the active workloads in active sets 306, 308, 310 on a per-node basis. Examiner notes, Gupta teaches as evidence a queue may consist of logical slots and therefore would be obvious to one of ordinarily skilled in the art, Gupta teaches logical slots for the purposes of design choice [Col. 6, Lines 17-20] The logical set of slots 70 is merely an abstract logical structure that is utilized to describe the caching methodology and can be implemented as any form of data structure, such as queues); a set of graphics processor sub-units (i.e. node comprising GPU resources of which the workload will be migrated to) that each implement multiple distributed hardware slots ([0028] The resources that need to be freed up may be CPU cycles, RAM, disk space, or special hardware such as GPU or accelerator hardware. [0025] a pod VM controller of a node manages the work queue for that node… The work queue has entries … for active workloads.); and control circuitry configured to: assign respective portions of a set of graphics work from a logical slot to distributed hardware slots based on control information for the set of graphics work, including to assign a proper sub-set of portions of the set of graphics work to available distributed hardware slots in response to a determination that a full number of distributed hardware slots to be utilized by the set of graphics work are not available ([0028] Still referring to FIG. 4, in step 408, orchestration service 105 receives each adjusted priority and updates the priority of the corresponding workload in the idle and active sets. After doing so, orchestration service 105 executes step 410 to determine if the highest priority of the workloads in the idle set is greater than the priority of any of the workloads in the active sets. If so (step 410, Yes), orchestration service 105 looks for a node with one or more workloads in the active set (which have lower priority than the highest priority workload in the idle set), that would have sufficient resources freed up to support the execution of the highest priority workload in the idle set if the lower priority active workloads are suspended. The resources that need to be freed up may be CPU cycles, RAM, disk space, or special hardware such as GPU or accelerator hardware. Therefore, in step 412, orchestration service 105 communicates with each node that is executing the lower priority active workloads to determine if sufficient resources can be freed up. If there is such a node (step 412, Yes), orchestration service 105 instructs that node to suspend the lower priority active workloads, and in response, the pod VM controller of that node carries out the steps of FIG. 6 (described below). If there is no such node (step 412, No), the flow of operations in FIG. 4 returns to step 408. [0029] Upon receiving notification from the node suspending the lower priority active workloads that they have been suspended, orchestration service 105 in step 416 instructs the node to resume the highest priority workload in the idle set in that node.)”.
Claim/s 2, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta in view of Denneman (Pub. No. US 2023/0035310).
Claim 2, 19, Cully may not explicitly teach the limitation of the claim.
Denneman teaches “the apparatus of claim 1, wherein the control circuitry is configured to: for a portion of the set of graphics work to be assigned: attempt to obtain a distributed hardware slot in a graphics processor sub-unit that does not currently have a distributed hardware slot assigned to the logical slot; and in response to failure of the attempt, send the portion of the set of graphics work to an already-owned distributed hardware slot for the logical slot ([0109] In step 2913, the user attempts to deploy the workload on the currently considered candidate c. When deployment fails, as determined in step 2914, and when there is another candidate to consider, as determined in step 2915, c is set to the next candidate and control returns to step 2913. When there are no further candidates, as determined in step 2915, then a handler is called to handle the deployment failure, in step 2917. This may involve again requesting candidate hosts from the management personnel, deferring deployment of the workload, changing a range of acceptable launch times for the workload, and/or other such ameliorative actions. The attempt to deploy the workload on a candidate host, in step 2913, may fail for various reasons. For example, in the time between requesting placement information, in step 2907, and receiving the list of candidate hosts, in step 2911, other users may have successfully deployed applications on one or more of the candidate hosts so that they no longer have configurations and capacities needed for hosting the user's workload. For example, the workload may require exclusive access to a GPU or other accelerator, but that GPU may now be committed to a different application instance.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Denneman with the teachings of Cully, Gupta in order to provide a system that teaches details of scheduling workloads. The motivation for applying Denneman teaching with Cully, Gupta teaching is to provide a system that allows for improved resource scheduling. Cully, Gupta, Denneman are analogous art directed towards distributed workload processing. Together Cully, Gupta, Denneman teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Denneman with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta in view of Du (Pub. No. US 2020/0312006).
Claim 3, the combination may not explicitly teach the limitation of the claim.
Du teaches “the apparatus of claim 1, wherein the apparatus is configured to execute the set of graphics work using a smaller number of distributed hardware slots than a determined number of hardware slots for the set of graphics work ([0065] If, in block 320, the computing device determines that there is insufficient GPR space and/or insufficient physical wave slots available (block 320—NO), the process can proceed to block 325. [0066] If, in block 325, the computing device determines that GPR space and/or a physical wave slot is not needed for the first wave (block 325—NO), the process 300 can proceed to block 330. In block 330, the computing device can execute the texture operation without initially allocating or using GPR space and/or a physical wave slot.), including to execute multiple portions of the set of graphics work using the same distributed hardware slot ([0106] In block 520, the computing device can determine whether there is GPR space and/or physical wave slot available for the texture operation in a priority position in the deferred wave queue (e.g., the first wave slot in a FIFO queue). For example, the computing device can perform the determination based on the amount of GPR space available, the number of physical wave slots available, the size/number of the texture attributes associated with the texture operation, the number of execution threads associated with the texture operation, the number of execution waves associated with the texture operation, etc.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Du with the teachings of Cully, Gupta in order to provide a system that teaches details of scheduling workloads. The motivation for applying Du teaching with Cully, Gupta teaching is to provide a system that allows for improved resource scheduling. Cully, Gupta, Du are analogous art directed towards distributed workload processing. Together Cully, Gupta, Du teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Du with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta in view of Jurgens (Pub. No. US 2017/0277569).
Claim 4, the combination may not explicitly teach the limitation of the claim.
Jurgens teaches “the apparatus of claim 1, wherein the control circuitry is configured to implement a no-overlap mode in which different portions of the same set of graphics work cannot be assigned to the same distributed hardware slot ([0043] Various proximity rules can be used to implement the workload routing. Each proximity rule can be specified to apply to all or a sub-set of the workloads and infrastructure. Rule specifications can include the following properties: Rule Type, Mandatory flag, Proximity Group Type, Proximity Zone Type, Rule Scope based on Group Type(s), etc. There are three types of proximity rules for routing workloads, namely affinity, anti-affinity, and group-level anti-affinity. These rules can be specified to be mandatory or optional. If mandatory, the rule is enforced when routing the workloads. If optional, the routing algorithm will try to apply the rule, when possible. [0046] The second rule is an optional anti-affinity rule. This rule optionally tries to ensure that workload members of the specified proximity group (i.e. app sub-instance) are kept apart in different proximity zones (cabinet). The rule scope specifies “application” and “app instance” as the group types to indicate that this rule applies to app sub-instances (e.g. app server, web server) of the same application and same app instance (e.g. SAP PROD, SAP DR).)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Jurgens with the teachings of Cully, Gupta in order to provide a system that teaches details of scheduling workloads. The motivation for applying Jurgens teaching with Cully, Gupta teaching is to provide a system that allows for improved resource scheduling. Cully, Gupta, Jurgens are analogous art directed towards distributed workload processing. Together Cully, Gupta, Jurgens teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Jurgens with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 5, 10, 11, 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta in view of Lenihan (Pub. No. US 2024/0256353).
Claim 5, the combination may not explicitly teach the limitation of the claim.
Lenihan teaches “the apparatus of claim 1, wherein the control circuitry is configured to track runtime for portions of the set of graphics work in respective distributed hardware slots and store the tracked runtimes using one or more techniques of the following techniques: aggregating the tracked runtimes into a single runtime count; and writing the tracked runtimes to a completion buffer ([0030] Further, the workload scheduler 104 maintains a running workload repository 118 storing information of already-deployed workloads (e.g., VM1-VM6) in the private cloud 102. In particular, the running workload repository 118 stores information including, but not limited to, workload identifiers, infrastructure group metadata tag (IGMT), infrastructure group priority, preemptibility instruction (PTB), power state (PS), allocated resources, resource utilization, and age (in days). Table-1 represented below shows an example content of the running workload repository 118. In Table-1, resources R1, R2, and R3 respectively represent the number of CPUs, the amount of RAM in GB, and the amount of storage in GB.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Lenihan with the teachings of Cully, Gupta in order to provide a system that teaches details of managing workloads. The motivation for applying Lenihan teaching with Cully, Gupta teaching is to provide a system that allows for improved situational awareness. Cully, Gupta, Lenihan are analogous art directed towards distributed workload processing. Together Cully, Gupta, Lenihan teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Lenihan with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim 10, 17, the combination may not explicitly teach the limitation of the claim.
Lenihan teaches “the apparatus of claim 1, wherein the apparatus supports allocating any determined integer number of graphics processor sub-units in a range from one processor sub-unit to a total number of processor sub-units included in the apparatus ([0030] Further, the workload scheduler 104 maintains a running workload repository 118 storing information of already-deployed workloads (e.g., VM1-VM6) in the private cloud 102. In particular, the running workload repository 118 stores information including, but not limited to, workload identifiers, infrastructure group metadata tag (IGMT), infrastructure group priority, preemptibility instruction (PTB), power state (PS), allocated resources, resource utilization, and age (in days). Table-1 represented below shows an example content of the running workload repository 118. In Table-1, resources R1, R2, and R3 respectively represent the number of CPUs, the amount of RAM in GB, and the amount of storage in GB.)”.
Rationale to claim 5 is applied here.
Claim 11, the combination may not explicitly teach the limitation of the claim.
Lenihan teaches “the apparatus of claim 10, wherein the range includes one or more integer numbers of graphics processor sub-units that are not powers of two ([0030] Further, the workload scheduler 104 maintains a running workload repository 118 storing information of already-deployed workloads (e.g., VM1-VM6) in the private cloud 102. In particular, the running workload repository 118 stores information including, but not limited to, workload identifiers, infrastructure group metadata tag (IGMT), infrastructure group priority, preemptibility instruction (PTB), power state (PS), allocated resources, resource utilization, and age (in days). Table-1 represented below shows an example content of the running workload repository 118. In Table-1, resources R1, R2, and R3 respectively represent the number of CPUs (i.e. a single one as a range), the amount of RAM in GB, and the amount of storage in GB.)”.)”.
Rationale to claim 5 is applied here.
Claim/s 6, 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully in view of Ginzburg (Pub. No. US 2014/0344815).
Claim 6, 20, the combination may not explicitly teach the limitation of the claim.
Ginzburg teaches “the apparatus of claim 1, wherein the control circuitry is further configured to: in response to a context store, store information that indicates which distributed hardware slots were in use by the logical slot ([0044] Depending on implementation, the state information of specific accelerators can be individually saved/not saved during an active to inactive thread state transition as a function, for example, of whether or not the thread has actually used a specific accelerator. For example, the OS may enable three accelerators for a particular thread, yet, after initial execution of the thread up to its first active to inactive transition, only one of the accelerators has actually been used by the thread. In this case, only the state information of the actually used thread needs to be externally saved to memory.); and in response to a context load, wait for the indicated distributed hardware slots to be allocated before proceeding to execute the set of graphics work ([0043] Upon a later decision to revive the thread and convert it from an inactive to active state 207, the state information associated with the thread's one or more accelerators that was saved in process 206 is recalled from system memory and loaded into the one or more accelerators' associated register space 208)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Ginzburg with the teachings of Cully, Gupta in order to provide a system that teaches details of scheduling workloads. The motivation for applying Ginzburg teaching with Cully, Gupta teaching is to provide a system that allows for improved resource scheduling. Cully, Gupta, Ginzburg are analogous art directed towards workload processing. Together Cully, Gupta, Ginzburg teach every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Ginzburg with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully in view of Clark (Pub. No. US 2022/0188158).
Claim 7, Cully may not explicitly teach the limitation of the claim.
Clark teaches “the apparatus of claim 1, wherein the plurality of logical slots include one or more slots dedicated for one or more types of graphics work ([Fig. 3; 0037] Turning now to a detailed discussion of techniques for workload-based hardware composition, FIG. 3 is presented. FIG. 3 illustrates configuration 300 having several compute unit composition operations. Workload queue 390 is included which has several example execution jobs 320, 330, and 340 enqueued therein. Also included is an example pool of physical computing components, namely a set of sixteen (16) GPUs. Although only GPUs are shown in this example for clarity, other co-processing elements or other types of elements can be included with selected GPUs to form compute units, such as CPUs and storage units, among other elements. Thus, the execution jobs within queue 390 in FIG. 3 comprise jobs that employ graphics processing resources, such as machine learning jobs, artificial intelligence jobs, graphics rendering jobs, or other types of data processing jobs which can benefit from executing across multiple concurrent GPUs.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Clark with the teachings of Cully, Gupta in order to provide a system that teaches details of scheduling workloads. The motivation for applying Clark teaching with Cully, Gupta teaching is to provide a system that allows for design choice. Cully, Gupta, Clark are analogous art directed towards workload processing. Together Cully, Gupta, Clark teaches every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Clark with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta in view of Kakaiya (Pub. No. US 2022/0413909).
Claim 8, the combination teaches the claim, wherein Cully teaches “the apparatus of claim 1, further comprising: and queue select circuitry configured to select sets of graphics work from the data structure based on one or more selection parameters and store control information for selected sets of graphics work in slot tracking circuitry ([0025] FIG. 3 depicts a work queue for a particular node, and idle and active sets of workloads that are tracked by orchestration service 105, according to embodiments. In the embodiment illustrated herein, pod VMs are examples of workloads, and a pod VM controller of a node manages the work queue for that node. Each entry of the work queue contains a descriptor for the workload and a priority of the workload. The work queue has entries for idle workloads and entries for active workloads. Orchestration service 105 tracks the idle workloads of all nodes in idle set 304, and tracks the active workloads in active sets 306, 308, 310 on a per-node basis. [0026-0027] priority)”.
However, the combination may not explicitly teach the remaining limitations.
Kakaiya teaches “queue access circuitry configured to access a data structure in memory that specifies multiple queues, wherein respective queues enqueue control information for multiple sets of graphics work ([Fig. 2] acceptance unit [0015] The acceptance unit may accept work submissions and causes descriptors associated with the accepted work submissions to be included in SWQs of the scalable accelerator device.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Kakaiya with the teachings of Cully, Gupta in order to provide a system that teaches details of scheduling workloads. The motivation for applying Kakaiya teaching with Cully, Gupta teaching is to provide a system that allows for design choice. Cully, Gupta, Kakaiya are analogous art directed towards workload processing. Together Cully, Gupta, Kakaiya teaches every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Kakaiya with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta in view of Du (Pub. No. US 2020/0312006).
Claim 9, the combination may not explicitly teach the limitation of the claim.
Du teaches “the apparatus of claim 1, wherein the control circuitry is configured to assign a first set of geometry work to N-1 of N graphics processor sub-units of the apparatus ([0109] In block 530 and block 540, the computing device can allocate a physical wave slot and GPR space for the texture operation. In block 480, the computing device can allocate a physical wave slot by converting the virtual wave slot to the physical wave slot. For example, the computing device can update the physical wave slot to the coverage mask of the virtual wave slot and remove the virtual wave from the deferred wave queue.) and assign a second set of work to a single remaining graphics processor sub-unit of the apparatus ([0066] If, in block 325, the computing device determines that GPR space and/or a physical wave slot is not needed for the first wave (block 325—NO), the process 300 can proceed to block 330. In block 330, the computing device can execute the texture operation without initially allocating or using GPR space and/or a physical wave slot.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Du with the teachings of Cully, Gupta in order to provide a system that teaches details of workloads types. The motivation for applying Du teaching with Cully, Gupta teaching is to provide a system that allows for design choice. Cully, Gupta, Du are analogous art directed towards workload processing. Together Cully, Gupta, Du teaches every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Du with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta, Lenihan in further view of Xu (Pub. No. US 2023/0236879).
Claim 12, Cully may not explicitly teach the limitation of the claim.
Xu teaches “the apparatus of claim 10, wherein the set of graphics work is a fragment processing set of graphics work and the control circuitry is configured to determine the number of graphics processor sub-units based on a number of tiles included in the set of graphics work ([0041] Second, the number of computational nodes in each layer determines the number of GPU cores required and those nodes can be divided into multiple groups. Hence the runtime core consumption of a layer is controllable by grouping (sorting) technique. The maximum core usage of an inference job is controllable via splitting nodes in the largest layer(s). This disclosure leverages Dynamic Core Management (DCM) to implements splitting nodes in same layer into several groups, serializing these groups, loading all nodes in one group to GPU core in one shot.) or based on a number of pixels included in the set of graphics work”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Xu with the teachings of Cully, Gupta, Lenihan in order to provide a system that teaches details of workloads types. The motivation for applying Xu teaching with Cully, Gupta, Lenihan teaching is to provide a system that allows for design choice. Cully, Gupta, Lenihan, Xu are analogous art directed towards workload processing. Together Cully, Gupta, Lenihan, Xu teaches every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Xu with the teachings of Cully, Gupta, Lenihan by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta, Lenihan in further view of Suh (Pub. No. US 2021/0049042).
Claim 13, the combination may not explicitly teach the limitation of the claim.
Suh teaches “the apparatus of claim 10, wherein the set of graphics work is a compute set of graphics work and the control circuitry is configured to determine the number of graphics processor sub-units based on a number of workgroups, workitems, or both included in the set of graphics work ([Claim 1] information on whether the plurality of GPUs are used, based on an input job related to machine learning being received, identify a number of GPUs and a bandwidth value that are required for performing a plurality of tasks included in the input job, determine GPUs among the plurality of GPUs to perform the plurality of tasks based on the values of the bandwidths of the plurality of GPU pairs, the received information on whether the plurality of GPUs are used, and the number of GPUs and the bandwidth value that are required for performing the plurality of tasks, and control the communication interface to transmit learning data related to the plurality of tasks to the determined GPUs.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Suh with the teachings of Cully, Gupta, Lenihan in order to provide a system that teaches details of workloads scheduling. The motivation for applying Suh teaching with Cully, Gupta, Lenihan teaching is to provide a system that allows for design choice. Cully, Gupta, Lenihan, Suh analogous art directed towards workload processing. Together Cully, Gupta, Lenihan, Suh teaches every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Suh with the teachings of Cully, Gupta, Lenihan by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta, Lenihan in further view of Acharya (Pub. No. US 2023/0024130).
Claim 14, the combination may not explicitly teach the limitation of the claim.
Acharya teaches “the apparatus of claim 10, wherein the set of graphics work is a geometry set of graphics work and the control circuitry is configured to determine the number of graphics processor sub-units based on one or more of the following parameters: a number of primitives included in the set of graphics work; a number of vertices included in the set of graphics work; and a determined complexity of the set of graphics work ([0009] Using the techniques herein, a GPU is able to change configuration based on an identified workload, thereby tailoring the resources of the GPU for a given workload, and conserving resources that are not required. For example, in some embodiments, for a relatively light workload (e.g., a workload requiring relatively few shading operations), the GPU is configured so that only a relatively small subset of available workgroup processors are in an active mode, with the remaining workgroup processors placed in a low-power mode. For a relatively heavy workload (e.g., a game application requiring a large number of shading operations), the GPU is configured so that a higher number of workgroup processors are placed in an active mode. Thus, for lighter workloads, the GPU is configured so that power and other system resources are conserved while still providing enough resources for satisfactory execution of the workload. For heavier workloads, the GPU is configured so that more system resources are available, thereby ensuring satisfactory execution of the heavier workload. Accordingly, as the workload at the GPU varies, the configuration of the GPU is varied, thereby conserving resources while maintaining satisfactory performance.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Acharya with the teachings of Cully, Gupta, Lenihan in order to provide a system that teaches details of workloads scheduling. The motivation for applying Acharya teaching with Cully, Gupta, Lenihan teaching is to provide a system that allows for design choice. Cully, Gupta, Lenihan, Acharya analogous art directed towards workload processing. Together Cully, Gupta, Lenihan, Acharya teaches every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Acharya with the teachings of Cully, Gupta, Lenihan by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta in view of Dicorpo (Pub. No. US 2020/0159981).
Claim 15, Cully teaches “a non-transitory computer readable storage medium having stored thereon ([0006] Further embodiments include a computer-readable medium containing instructions that, when executed by a computing device, cause the computing device to carry out one or more aspects of the above method, and a system comprising a memory and a processor configured to carry out one or more aspects of the above method.)…design information specifies that the circuit includes: graphics control circuitry that implements a plurality of logical slots; a set of graphics processor sub-units that each implement multiple distributed hardware slots; and control circuitry configured to: assign respective portions of a set of graphics work from a logical slot to distributed hardware slots based on control information for the set of graphics work, including to assign a proper sub-set of portions of the set of graphics work to available distributed hardware slots in response to a determination that a full number of distributed hardware slots to be utilized by the set of graphics work are not available” is similar to claim 1 and therefore rejected with the same references and citations.
However, the combination may not explicitly teach further details of the medium.
Dicorpo teaches “a non-transitory computer readable storage medium having stored thereon… design information that specifies a design of at least a portion of a hardware integrated circuit in a format recognized by a semiconductor fabrication system that is configured to use the design information to produce the circuit according to the design, wherein the design information specifies ([0117] FIG. 1C is a diagram of an embodiment of a system 160 to illustrate that a circuit design 131B and a layout design 131C are generated based on the template design 131A (FIG. 1b) and the specification of the template design 131A by the one or more servers of the DES 104 in response to receiving an indication from the customer 1 that the SoC is to be fabricated. For example, the circuit design 131B and the layout design 131C are generated by applying the template design 131A and the specification, of the template design 131A, stored in the SoC design file 150A.)”.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to apply the teachings of Dicorpo with the teachings of Cully, Gupta in order to provide a system that teaches details of the environment. The motivation for applying Dicorpo teaching with Cully, Gupta teaching is to provide a system that allows for design choice. Cully, Gupta, Dicorpo analogous art directed towards computing environments based upon design choice. Together Cully, Gupta, Dicorpo teaches every limitation of the claimed invention. Since the teachings were analogous art known at the filing time of invention, one of ordinary skill could have applied the teachings of Dicorpo with the teachings of Cully, Gupta by known methods before the effective filing date of the claimed invention and gained expected results.
Claim/s 16, 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cully, Gupta, Dicorpo in view of Lenihan.
Claim 16, circuitry is configured to track runtime for portions of the set of graphics work in respective distributed hardware slots and store the tracked runtimes using one or more techniques of the following techniques: aggregating the tracked runtimes into a single runtime count; and writing the tracked runtimes to a completion buffer” is similar to claim 5 and therefore rejected with the same references and citations.
Claim 17, “the non-transitory computer readable storage medium of claim 15, wherein the circuit 17. supports allocating any determined integer number of graphics processor sub-units in a range from one processor sub-unit to a total number of processor sub-units included in the circuit” is similar to claim 10 and therefore rejected with the same references and citations.
Conclusion
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/WYNUEL S AQUINO/Primary Examiner, Art Unit 2199