DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 09/02/2026 has been entered.
Response to Arguments
Applicant's arguments filed 08/27/2026 have been fully considered but they are not persuasive.
Applicant argues the reference Koh et al. (US20190348258A1; hereinafter, “Koh”) in view of Kuthi et al [US 2010/0315064 A1] does not teach or discloses “A method for wafer biasing in a plasma chamber, the method comprising: generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer; measuring a voltage or current signal associated with the wafer, chuck, or electrode; and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, or burst repetition frequency voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal to achieve or modify the configurable ion energy distribution.” (see page 1-5)
Examiner disagrees:
Koh discloses a method for wafer biasing in a plasma chamber (see FIG. 1 and claim 1, for example), the method comprising:
Koh does not specify explicitly in fig 1 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source;
coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer.
Koh discloses in Fig. 4 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; (see ¶ 54; FIG. 4, step 404);
generating one or more of low and medium voltages by a second pulsed voltage source; (FIG. 4, step 406; ¶ 55);
coupling, capacitively, the one or more of low and medium voltages to the wafer (FIG. 4, step 408; ¶ 56); and
pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer (FIG. 4, step 410; ¶ 56).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use Koh of Fig. 1 with Fig. 4 to discloses or teaches generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer for purpose of controlling independently the first pulsed voltage source and the second pulsed voltage source based on one or more parameters of the first pulsed voltage source and the second pulsed voltage source in order to tailor ion energy distribution of the flux of ions directed to the workpiece as disclosed by Koh (Paragraph [0005])
Koh does not specify measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal to achieve or modify the configurable ion energy distribution.
Kuthi discloses measuring (Fig. 3, 84) a voltage (Fig. 16, 84 & Paragraph [0095]) or current signal associated with the wafer, chuck, or electrode (Fig. 3, 66) and adjusting (Paragraph [0099] “The controller 318 receives the signal 316 and compares it to a value of a reference setpoint signal 320 that identifies the desired voltage value of the pulsed RF bias signal 68P. The difference (or "error") is applied as an error signal 322 to the feedback circuit 150 that outputs the feedback signal 152 to adjust the RF generator 64 so that the pulsed RF bias signal 68P is returned to the desired voltage value. The controller 318 may be configured to cause the feedback circuit 150 to adjust the output of the RF generator 64 [Examiner Note: Paragraph [0082] “The feedback circuit 150 generates a control signal 152 at the update rate. The update rate is less than the pulse rate and defines a time period between updates of the control signal 152”] based, for example, on the history and rate of change of the error signal 322, for accurate and stable control of the voltage of the signal 68P. In review, it may be understood that the apparatus 40 is configured to measure the pulsed RF bias signal 68P applied to the bias electrode 66 of the chamber 42. Apparatus 40 is seen to include the detector 84 configured for response to the pulsed RF bias signal 68P. The detector 84 is configured to generate the detector signal 86 in the form of the successive RF voltage envelopes 88. Each of the envelopes 88 has the amplitudes 90 (FIG. 4) representing voltage values as a function of time of a respective ON mode pulse 70. The voltage envelope 88 is shown in FIG. 4 rising from a leading edge at time ti, corresponding to the start of portion 108.” [Examiner note: Kuthi teaches controller 318 adjusting in real time the duty cycle of the output of RF generator 64 to modify the output as broadly as the claims are presented]), in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal (Paragraph [0058-64])
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It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use teachings of Kuthi with Koh to discloses or teaches measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal for purpose of provided to detect and control a voltage potential applied in a plasma chamber for processing a semiconductor wafer as disclosed by Kuthi (Abstract).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5,7-14,19-21 and 23-24 are rejected under 35 U.S.C. 103 as being unpatentable over Koh et al. (US20190348258A1; hereinafter, “Koh”) in view of Kuthi et al [US 2010/0315064 A1]
In regards to claims 1, Koh discloses a method for wafer biasing in a plasma chamber (see FIG. 1 and claim 1, for example), the method comprising:
Koh does not specify explicitly in fig 1 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source;
coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer.
Koh discloses in Fig. 4 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; (see ¶ 54; FIG. 4, step 404);
generating one or more of low and medium voltages by a second pulsed voltage source; (FIG. 4, step 406; ¶ 55);
coupling, capacitively, the one or more of low and medium voltages to the wafer (FIG. 4, step 408; ¶ 56); and
pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer (FIG. 4, step 410; ¶ 56).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use Koh of Fig. 1 with Fig. 4 to discloses or teaches generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer for purpose of controlling independently the first pulsed voltage source and the second pulsed voltage source based on one or more parameters of the first pulsed voltage source and the second pulsed voltage source in order to tailor ion energy distribution of the flux of ions directed to the workpiece as disclosed by Koh (Paragraph [0005])
Koh does not specify measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal to achieve or modify the configurable ion energy distribution.
Kuthi discloses measuring (Fig. 3, 84) a voltage (Fig. 16, 84 & Paragraph [0095]) or current signal associated with the wafer, chuck, or electrode (Fig. 3, 66) and adjusting (Paragraph [0099]), in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal (Paragraph [0058-64])
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It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use teachings of Kuthi with Koh to discloses or teaches measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal for purpose of provided to detect and control a voltage potential applied in a plasma chamber for processing a semiconductor wafer as disclosed by Kuthi (Abstract).
In regards to claims 2. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source at a first frequency of approximately 0.1 kHz to approximately 10 MHz (¶ 33; claim 2).
In regards to claims 3. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source with a duty cycle of approximately 0% to approximately 100% (claim 3).
In regards to claims 4. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source at a first voltage for at least one or more duty cycles and at a second voltage for at least one or more duty cycles (claim 4).
In regards to claims 5. Koh in view of Kuthi discloses the method of claim 1, further comprising: generating a second high voltage by a third pulsed voltage source using DC voltages and coupling the second high voltage to the wafer in the plasma chamber (claim 5).
In regards to claims 7. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the second pulsed voltage source a frequency of approximately 400 kHz (¶ 33; claim 9).
In regards to claims 8. Koh in view of Kuthi discloses the method of claim 1, further comprising: adjusting one or more voltage parameters with a biasing controller to modify a waveform emitted by the second pulsed voltage source, based on voltages sensed at the wafer (claim 10).
In regards to claims 9. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source with a biasing controller at a voltage from approximately 1 kV to approximately 10 kV during a first pulse (Claim 11).
In regards to claims 10. Koh in view of Kuthi discloses the method of claim 1, further comprising: generating voltages with a shaped bias waveform with the second pulsed voltage source (FIG. 1: shaped bias waveform generator 130; claim 13).
In regards to claims 11. Koh in view of Kuthi discloses the method of claim 1, further comprising: generating the second pulsed voltage source with one or more voltages in a continuous range of low to medium voltages of greater than 0 to approximately 1.5 kV (claim 14).
In regards to claims 12. Koh in view of Kuthi discloses a method for wafer biasing in a plasma chamber (see FIG. 1, for example), the method comprising:
a biasing controller (Fig. 1, 140 & Paragraph [0027])
Koh does not specify explicitly in fig 1 generating a high voltage by a first pulsed voltage source and coupling the high voltage to the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling the one or more of low and medium voltages to the wafer; and pulsing the high voltage and the one or more of low and medium voltages by a biasing controller, wherein the first pulsed voltage source supplies a high voltage, a maximum of the high voltage during a pulse being approximately 1 to 10 kV, and wherein the second pulsed voltage source supplies one or more voltages in a continuous range of low to medium voltages, wherein the continuous range is greater than 0 to approximately 1.5 kV.
Koh discloses in Fig. 4 generating a high voltage by a first pulsed voltage source and coupling the high voltage to the plasma chamber (¶ 54; FIG. 4, step 404); generating one or more of low and medium voltages by a second pulsed voltage source (FIG. 4, step 406; ¶ 55); coupling the one or more of low and medium voltages to the wafer (FIG. 4, step 408; ¶ 56); and pulsing the high voltage and the one or more of low and medium voltages (FIG. 4, step 410; ¶ 56) by a biasing controller (Paragraph [0054]), wherein the first pulsed voltage source supplies a high voltage (¶ 55), a maximum of the high voltage during a pulse being approximately 1 to 10 kV, and wherein the second pulsed voltage source supplies one or more voltages in a continuous range of low to medium voltages, wherein the continuous range is greater than 0 to approximately 1.5 kV (claim 15).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use Koh of Fig. 1 with Fig. 4 to discloses or teaches generating a high voltage by a first pulsed voltage source and coupling the high voltage to the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling the one or more of low and medium voltages to the wafer; and pulsing the high voltage and the one or more of low and medium voltages by a biasing controller, wherein the first pulsed voltage source supplies a high voltage, a maximum of the high voltage during a pulse being approximately 1 to 10 kV, and wherein the second pulsed voltage source supplies one or more voltages in a continuous range of low to medium voltages, wherein the continuous range is greater than 0 to approximately 1.5 kV for purpose of controlling independently the first pulsed voltage source and the second pulsed voltage source based on one or more parameters of the first pulsed voltage source and the second pulsed voltage source in order to tailor ion energy distribution of the flux of ions directed to the workpiece as disclosed by Koh (Paragraph [0005])
Koh does not specify measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal to achieve or modify a configurable ion energy distribution.
Kuthi discloses measuring (Fig. 3, 84) a voltage (Fig. 16, 84 & Paragraph [0095]) or current signal associated with the wafer, chuck, or electrode (Fig. 3, 66) and adjusting (Paragraph [0099] “The controller 318 receives the signal 316 and compares it to a value of a reference setpoint signal 320 that identifies the desired voltage value of the pulsed RF bias signal 68P. The difference (or "error") is applied as an error signal 322 to the feedback circuit 150 that outputs the feedback signal 152 to adjust the RF generator 64 so that the pulsed RF bias signal 68P is returned to the desired voltage value. The controller 318 may be configured to cause the feedback circuit 150 to adjust the output of the RF generator 64 based, for example, on the history and rate of change of the error signal 322, for accurate and stable control of the voltage of the signal 68P. In review, it may be understood that the apparatus 40 is configured to measure the pulsed RF bias signal 68P applied to the bias electrode 66 of the chamber 42. Apparatus 40 is seen to include the detector 84 configured for response to the pulsed RF bias signal 68P. The detector 84 is configured to generate the detector signal 86 in the form of the successive RF voltage envelopes 88. Each of the envelopes 88 has the amplitudes 90 (FIG. 4) representing voltage values as a function of time of a respective ON mode pulse 70. The voltage envelope 88 is shown in FIG. 4 rising from a leading edge at time ti, corresponding to the start of portion 108.” [Examiner note: Kuthi teaches controller 318 adjusting in real time the duty cycle of the output of RF generator 64 to modify the output as broadly as the claims are presented]), in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal (Paragraph [0058-64])
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It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use teachings of Kuthi with Koh to discloses or teaches measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal to achieve or modify a configurable ion energy distribution for purpose of provided to detect and control a voltage potential applied in a plasma chamber for processing a semiconductor wafer as disclosed by Kuthi (Abstract).
In regards to claims 13. Koh in view of Kuthi discloses the method of claim 12, further comprising: adjusting one or more voltage parameters based on voltages sensed at a chuck within the plasma chamber to modify a waveform of the second pulsed voltage source (FIG. 1; ¶ 22; claim 6).
In regards to claims 14. Koh in view of Kuthi discloses the method of claim 12, wherein the high voltage source is coupled with a wafer of the plasma chamber (FIG. 1; ¶¶ 22-24; claim 6).
In regards to claims 19. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the first pulsed voltage source at a first frequency of approximately 0.1 kHz to approximately 10 MHz (¶ 33; claim 2).
In regards to claims 20. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the first pulsed voltage source with a duty cycle of approximately 0% to approximately 100% (claim 3).
In regards to claims 21. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the first pulsed voltage source at a first voltage for at least one or more duty cycles and at a second voltage for at least one or more duty cycles (claim 4).
In regards to claims 23. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the second pulsed voltage source a frequency of approximately 400 kHz (¶ 33; claim 9).
In regards to claims 24. Koh in view of Kuthi discloses the method of claim 12, further comprising: generating voltages with a shaped bias waveform with the second pulsed voltage source (FIG. 1: shaped bias waveform generator 130; claim 13).
Claims 25 is rejected under 35 U.S.C. 103 as being unpatentable over Koh et al. (US20190348258A1; hereinafter, “Koh”) in view of Kuthi et al [US 2010/0315064 A1] [Examiner note: Radovanov et al [US 7,309,997 B1]]
In regards to claims 25. Koh in view of Kuthi discloses a method for wafer biasing in a plasma chamber (see FIG. 1 and claim 1, for example), the method comprising:
Koh does not specify explicitly in fig 1 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; pulsing the first high voltage and the one or more of low and medium voltages;
Koh discloses in Fig. 4 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection (see ¶ 54; FIG. 4, step 404);
generating one or more of low and medium voltages by a second pulsed voltage source (FIG. 4, step 406; ¶ 55);
coupling, capacitively, the one or more of low and medium voltages to the wafer (FIG. 4, step 408; ¶ 56);
pulsing the first high voltage and the one or more of low and medium voltages (FIG. 4, step 410; ¶ 56);
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use Koh of Fig. 1 with Fig. 4 to discloses or teaches generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; pulsing the first high voltage and the one or more of low and medium voltages for purpose of controlling independently the first pulsed voltage source and the second pulsed voltage source based on one or more parameters of the first pulsed voltage source and the second pulsed voltage source in order to tailor ion energy distribution of the flux of ions directed to the workpiece as disclosed by Koh (Paragraph [0005])
Koh does not specify measuring a current signal indicative of a characteristic of the plasma chamber; and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, or burst repetition frequency of the first pulsed voltage source or the second pulsed voltage source based on the measured current signal.
Kuthi discloses measuring (Fig. 3, 150 and 322 & Paragraph [0082-85] “The feedback circuit 150 shown in FIG. 3 includes a summing amplifier 154 that receives the output signal 132 from the averaging circuit 130 and receives a set point voltage signal 156 that defines a reference for the desired voltage of the pulsed RF signal 68P.” & Examiner Note: A summing amplifier converts incoming voltage signals into input currents at a virtual ground node, sums those currents together, and translates the total current into a single proportional output voltage……Each input voltage (V₁, V₂) connects to the op-amp's inverting input through an input resistor (R₁, R₂). Because the non-inverting input is tied to ground (0V) and negative feedback holds the inverting terminal at a virtual ground (approximately 0V), Ohm's law dictates that each input current is I = V/R). Also by evidence Radovanov of Fig. 6 using a voltage measurement circuit 120 having a known input impedance. The sensor output on the test wafer is connected to a resistor 122 and to the input of an amplifier 124. The voltage at the input of amplifier 124 is representative of the sensor current The output of amplifier 124 is provided to data acquisition system 24.) a current signal indicative of a characteristic of the plasma chamber; and
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adjusting (Paragraph [0099] “The controller 318 receives the signal 316 and compares it to a value of a reference setpoint signal 320 that identifies the desired voltage value of the pulsed RF bias signal 68P. The difference (or "error") is applied as an error signal 322 to the feedback circuit 150 that outputs the feedback signal 152 to adjust the RF generator 64 so that the pulsed RF bias signal 68P is returned to the desired voltage value. The controller 318 may be configured to cause the feedback circuit 150 to adjust the output of the RF generator 64 based, for example, on the history and rate of change of the error signal 322, for accurate and stable control of the voltage of the signal 68P. In review, it may be understood that the apparatus 40 is configured to measure the pulsed RF bias signal 68P applied to the bias electrode 66 of the chamber 42. Apparatus 40 is seen to include the detector 84 configured for response to the pulsed RF bias signal 68P. The detector 84 is configured to generate the detector signal 86 in the form of the successive RF voltage envelopes 88. Each of the envelopes 88 has the amplitudes 90 (FIG. 4) representing voltage values as a function of time of a respective ON mode pulse 70. The voltage envelope 88 is shown in FIG. 4 rising from a leading edge at time ti, corresponding to the start of portion 108.” [Examiner note: Kuthi teaches controller 318 adjusting in real time the duty cycle of the output of RF generator 64 to modify the output as broadly as the claims are presented]), in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, or burst repetition frequency of the first pulsed voltage source or the second pulsed voltage source based on the measured current signal (Fig. 3, 154 & Paragraph [0085]).
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It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use teachings of Kuthi with Koh to discloses or teaches measuring a current signal indicative of a characteristic of the plasma chamber; and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, or burst repetition frequency of the first pulsed voltage source or the second pulsed voltage source based on the measured current signal for purpose of provided to detect and control a voltage potential applied in a plasma chamber for processing a semiconductor wafer as disclosed by Kuthi (Abstract).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WEI (VICTOR) CHAN whose telephone number is (571)272-5177. The examiner can normally be reached M-F 9:00am to 6:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander H Taningco can be reached at 571-272-8048. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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WEI (VICTOR) CHAN
Primary Examiner
Art Unit 2844
/WEI (VICTOR) Y CHAN/Primary Examiner, Art Unit 2845
