DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-14 and 19-24 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-14 and 19-24 are rejected under 35 U.S.C. 103 as being unpatentable over Koh et al. (US20190348258A1; hereinafter, “Koh”) in view of Kuthi et al [US 2010/0315064 A1]
In regards to claims 1, Koh discloses a method for wafer biasing in a plasma chamber (see FIG. 1 and claim 1, for example), the method comprising:
Koh does not specify explicitly in fig 1 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source;
coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer.
Koh discloses in Fig. 4 generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; (see ¶ 54; FIG. 4, step 404);
generating one or more of low and medium voltages by a second pulsed voltage source; (FIG. 4, step 406; ¶ 55);
coupling, capacitively, the one or more of low and medium voltages to the wafer (FIG. 4, step 408; ¶ 56); and
pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer (FIG. 4, step 410; ¶ 56).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use Koh of Fig. 1 with Fig. 4 to discloses or teaches generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer for purpose of controlling independently the first pulsed voltage source and the second pulsed voltage source based on one or more parameters of the first pulsed voltage source and the second pulsed voltage source in order to tailor ion energy distribution of the flux of ions directed to the workpiece as disclosed by Koh (Paragraph [0005])
Koh does not specify measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal.
Kuthi discloses measuring (Fig. 3, 84) a voltage (Fig. 16, 84 & Paragraph [0095]) or current signal associated with the wafer, chuck, or electrode (Fig. 3, 66) and adjusting (Paragraph [0099]), in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal (Paragraph [0058-64])
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It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use teachings of Kuthi with Koh to discloses or teaches measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal for purpose of provided to detect and control a voltage potential applied in a plasma chamber for processing a semiconductor wafer as disclosed by Kuthi (Abstract).
In regards to claims 2. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source at a first frequency of approximately 0.1 kHz to approximately 10 MHz (¶ 33; claim 2).
In regards to claims 3. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source with a duty cycle of approximately 0% to approximately 100% (claim 3).
In regards to claims 4. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source at a first voltage for at least one or more duty cycles and at a second voltage for at least one or more duty cycles (claim 4).
In regards to claims 5. Koh in view of Kuthi discloses the method of claim 1, further comprising: generating a second high voltage by a third pulsed voltage source using DC voltages and coupling the second high voltage to the wafer in the plasma chamber (claim 5).
In regards to claims 6. Koh in view of Kuthi discloses the method of claim 1, further comprising: adjusting either or both the first voltage source and the second pulsed voltage source using a voltage ramp (FIG. 1: 130; ¶ 32).
In regards to claims 7. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the second pulsed voltage source a frequency of approximately 400 kHz (¶ 33; claim 9).
In regards to claims 8. Koh in view of Kuthi discloses the method of claim 1, further comprising: adjusting one or more voltage parameters with a biasing controller to modify a waveform emitted by the second pulsed voltage source, based on voltages sensed at the wafer (claim 10).
In regards to claims 9. Koh in view of Kuthi discloses the method of claim 1, further comprising: pulsing the first pulsed voltage source with a biasing controller at a voltage from approximately 1 kV to approximately 10 kV during a first pulse (Claim 11).
In regards to claims 10. Koh in view of Kuthi discloses the method of claim 1, further comprising: generating voltages with a shaped bias waveform with the second pulsed voltage source (FIG. 1: shaped bias waveform generator 130; claim 13).
In regards to claims 11. Koh in view of Kuthi discloses the method of claim 1, further comprising: generating the second pulsed voltage source with one or more voltages in a continuous range of low to medium voltages of greater than 0 to approximately 1.5 kV (claim 14).
In regards to claims 12. Koh in view of Kuthi discloses a method for wafer biasing in a plasma chamber (see FIG. 1, for example), the method comprising:
a biasing controller (Fig. 1, 140 & Paragraph [0027])
Koh does not specify explicitly in fig 1 generating a high voltage by a first pulsed voltage source and coupling the high voltage to the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling the one or more of low and medium voltages to the wafer; and pulsing the high voltage and the one or more of low and medium voltages by a biasing controller, wherein the first pulsed voltage source supplies a high voltage, a maximum of the high voltage during a pulse being approximately 1 to 10 kV, and wherein the second pulsed voltage source supplies one or more voltages in a continuous range of low to medium voltages, wherein the continuous range is greater than 0 to approximately 1.5 kV.
Koh discloses in Fig. 4 generating a high voltage by a first pulsed voltage source and coupling the high voltage to the plasma chamber (¶ 54; FIG. 4, step 404); generating one or more of low and medium voltages by a second pulsed voltage source (FIG. 4, step 406; ¶ 55); coupling the one or more of low and medium voltages to the wafer (FIG. 4, step 408; ¶ 56); and pulsing the high voltage and the one or more of low and medium voltages (FIG. 4, step 410; ¶ 56) by a biasing controller (Paragraph [0054]), wherein the first pulsed voltage source supplies a high voltage (¶ 55), a maximum of the high voltage during a pulse being approximately 1 to 10 kV, and wherein the second pulsed voltage source supplies one or more voltages in a continuous range of low to medium voltages, wherein the continuous range is greater than 0 to approximately 1.5 kV (claim 15).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use Koh of Fig. 1 with Fig. 4 to discloses or teaches generating a high voltage by a first pulsed voltage source and coupling the high voltage to the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling the one or more of low and medium voltages to the wafer; and pulsing the high voltage and the one or more of low and medium voltages by a biasing controller, wherein the first pulsed voltage source supplies a high voltage, a maximum of the high voltage during a pulse being approximately 1 to 10 kV, and wherein the second pulsed voltage source supplies one or more voltages in a continuous range of low to medium voltages, wherein the continuous range is greater than 0 to approximately 1.5 kV for purpose of controlling independently the first pulsed voltage source and the second pulsed voltage source based on one or more parameters of the first pulsed voltage source and the second pulsed voltage source in order to tailor ion energy distribution of the flux of ions directed to the workpiece as disclosed by Koh (Paragraph [0005])
Koh does not specify measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal.
Kuthi discloses measuring (Fig. 3, 84) a voltage (Fig. 16, 84 & Paragraph [0095]) or current signal associated with the wafer, chuck, or electrode (Fig. 3, 66) and adjusting (Paragraph [0099]), in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal (Paragraph [0058-64])
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It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention was made to use teachings of Kuthi with Koh to discloses or teaches measuring a voltage or current signal associated with the wafer, chuck, or electrode and adjusting, in real time or between pulses, at least one of pulse width, pulse repetition frequency, duty cycle, burst repetition frequency, or voltage of the first pulsed voltage source or the second pulsed voltage source based on the measured voltage or current signal for purpose of provided to detect and control a voltage potential applied in a plasma chamber for processing a semiconductor wafer as disclosed by Kuthi (Abstract).
In regards to claims 13. Koh in view of Kuthi discloses the method of claim 12, further comprising: adjusting one or more voltage parameters based on voltages sensed at a chuck within the plasma chamber to modify a waveform of the second pulsed voltage source (FIG. 1; ¶ 22; claim 6).
In regards to claims 14. Koh in view of Kuthi discloses the method of claim 12, wherein the high voltage source is coupled with a wafer of the plasma chamber (FIG. 1; ¶¶ 22-24; claim 6).
In regards to claims 19. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the first pulsed voltage source at a first frequency of approximately 0.1 kHz to approximately 10 MHz (¶ 33; claim 2).
In regards to claims 20. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the first pulsed voltage source with a duty cycle of approximately 0% to approximately 100% (claim 3).
In regards to claims 21. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the first pulsed voltage source at a first voltage for at least one or more duty cycles and at a second voltage for at least one or more duty cycles (claim 4).
In regards to claims 22. Koh in view of Kuthi discloses the method of claim 12, further comprising: adjusting either or both the first voltage source and the second pulsed voltage source using a voltage ramp (FIG. 1: 130; ¶ 32).
In regards to claims 23. Koh in view of Kuthi discloses the method of claim 12, further comprising: pulsing the second pulsed voltage source a frequency of approximately 400 kHz (¶ 33; claim 9).
In regards to claims 24. Koh in view of Kuthi discloses the method of claim 12, further comprising: generating voltages with a shaped bias waveform with the second pulsed voltage source (FIG. 1: shaped bias waveform generator 130; claim 13).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WEI (VICTOR) CHAN whose telephone number is (571)272-5177. The examiner can normally be reached M-F 9:00am to 6:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander H Taningco can be reached at 571-272-8048. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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WEI (VICTOR) CHAN
Primary Examiner
Art Unit 2844
/WEI (VICTOR) Y CHAN/ Primary Examiner, Art Unit 2845
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