Prosecution Insights
Last updated: April 19, 2026
Application No. 18/451,814

DISPLAY APPARATUS

Non-Final OA §102§103
Filed
Aug 17, 2023
Examiner
BREVAL, ELMITO
Art Unit
2875
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Auo Corporation
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
87%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allow Rate
1052 granted / 1380 resolved
+8.2% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
43 currently pending
Career history
1423
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
51.6%
+11.6% vs TC avg
§102
30.6%
-9.4% vs TC avg
§112
11.0%
-29.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1380 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on 08/17/2023 and 01/16/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 5-13 is/are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by IM et al. (US. Pub: 2022/0367424 A1~ hereinafter “IM”). Regarding claim 1, IM discloses (in at least fig. 3) a display apparatus, comprising: a driving circuit substrate (100); a plurality of light emitting devices (ED), disposed on the driving circuit substrate and electrically connected to the driving circuit substrate (see at least fig. 3); a filler (OC2), disposed on the light emitting devices; a color filter substrate (CF), disposed opposite to the driving circuit substrate and having a plurality of color filter patterns (CF1, CF2, CF3), wherein the color filter patterns are overlapped with the light emitting devices (see fig. 3); a first bank layer (BK1), located between the color filter substrate and the filler (see fig. 3), wherein the first bank layer (BK1) has a plurality of openings respectively overlapped with the color filter patterns and a body defining the openings (see fig. 3); a plurality of color conversion patterns (WLC1, WLC2, LTU), respectively disposed in the openings of the first bank layer; and a plurality of reflective structures (RS, AE and CE; [0013]-[0014]; [0152]-[0153]), disposed on the driving circuit substrate (100) and located between the light emitting devices (ED) and the driving circuit substrate (100); wherein each of the reflective structures ( AE and CE) has a reflective concave surface (i.e. the concave portion of AE and CE; see fig. 3) caved toward the driving circuit substrate (100), and a reflectivity of the reflective structures falls within a range from 95% to 98% ([0014]; i.e. silver is known to have a reflectivity in that range for visible light). Regarding claim 5, IM discloses (in at least fig. 3) a second bank layer (BNK2), disposed on the driving circuit substrate (100) and located between the filler (OC2) and the driving circuit substrate (100), wherein the second bank layer (BNK2) has a plurality of openings and a body (see fig. 3), the body of the second bank layer defines the openings of the second bank layer (see fig. 3), and the light emitting devices (ED) and the reflective structures (RS, AE and CE) are disposed in the openings of the second bank layer (BNK2). Regarding claim 6, IM discloses (in at least fig. 3) the body of the second bank layer (BNK2) has a sidewall, and the reflective structures (AE and CE) cover a first portion of the sidewall close to the driving circuit substrate (see fig. 3) and expose a second portion of the sidewall away from the driving circuit substrate (see fig. 3). Regarding claim 7, IM discloses (in at least fig. 3) the body of the second bank layer (BNK2) has a top surface, one of the reflective structures (AE, CE) has an end point away from the driving circuit substrate (100), and the end point of the one of the reflective structures (AE, CE) is spaced from the top surface of the second bank layer by a distance. Regarding claim 8, IM discloses (in at least fig. 3) the filler (OC2) is disposed between the first bank layer (BK1) and the second bank layer (BNK2), and the reflective structures (RS, AE and CE) are partially overlapped. Regarding claim 9, IM discloses (in at least fig. 3) a first insulation layer (CAP1), located between the first bank layer (OC2) and the filler (OC2) and between the color conversion patterns (WLC1, WLC2, LTU) and the filler (OC2), wherein the first insulation layer (CAP1) is partially overlapped with the reflective structures (RS, AE and CE). Regarding claim 10, IM discloses (in at least fig. 3) a second insulation layer (CAP2), located between the color filter substrate (CF) and the first bank layer (BK1) and between the color filter substrate and the color conversion patterns (WLC1, WLC2, LTU), wherein the second insulation layer (CAP2) is partially overlapped with the reflective structures. Regarding claim 11, IM discloses (in at least fig. 3) a protection layer (OC3), located between the color filter substrate and the second insulation layer (CAP2), wherein the protection layer (OC3) is partially overlapped with the reflective structures. Regarding claim 12, IM discloses (in at least fig. 3) the color filter patterns comprise a first color filter pattern (WLC1), a second color filter pattern (WLC2), and a third color filter pattern (LTU), and the reflective structures (RS, AE and CE) are respectively overlapped with the first color filter pattern and the second color filter pattern and are staggered with the third color filter pattern (see fig. 3). Regarding claim 13, IM discloses (in at least fig. 3) a second bank layer (BNK2), disposed on the driving circuit substrate (100) and located between the filler (OC2) and the driving circuit substrate, wherein the second bank layer (BNK2) has a plurality of openings and a body (see fig. 3), the body of the second bank layer (BNK2) defines the openings of the second bank layer (see fig. 3), and the light emitting devices (ED) and the reflective structures (RS, AE and CE) are disposed in the openings of the second bank layer, wherein the color filter patterns comprise a first color filter pattern (WLC1), a second color filter pattern (WLC2), and a third color filter pattern (LTU), wherein the openings of the second bank layer (BNK2) comprise a first opening and a second opening, the first opening of the second bank layer (BNK2) is overlapped with the first color filter pattern (see fig. 3), the second opening of the second bank layer (BNK2) is overlapped with the second color filter pattern and the third color filter pattern (see at least fig. 3), the light emitting devices (ED) comprise a first light emitting device and a second light emitting device (see fig. 3), and the first light emitting device and the second light emitting device are respectively disposed in the first opening and the second opening of the second bank layer (see fig. 3). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 2-4 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over IM et al. (US. Pub: 2022/0367424 A1~ hereinafter “IM”). Regarding claims 2 and 3, IM does not expressly disclose a minimum thickness of the reflective structures falls within a range from 2 μm to 4 μm; and a curvature radius of the reflective concave surface falls within a range from 16 mm to 18 mm. However, IM discloses (in at least figs. 3) a plurality of reflective structures (RS, AE and CE; [0013]-[0014]; [0152]-[0153]), disposed on the driving circuit substrate (100) and located between the light emitting devices (ED) and the driving circuit substrate (100); wherein each of the reflective structures ( AE and CE) has a reflective concave surface (i.e. the concave portion of AE and CE; see fig. 3) caved toward the driving circuit substrate (100). It is well-known in the art to form reflective structures with a minimum thickness in the range of 2 μm to 4 μm as evident by Herrmann (US. Pub: 2018/0309030 A1) of record at least ([0061]-[0062]). Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to consider forming the reflective structures of IM with a minimum thickness within a range of 2 μm to 4 μm and a curvature radius of the reflective concave surface falls within a range from 16 mm to 18 mm, since it has been held that a mere change in size of a component is generally recognized as being within the level of ordinary skill in the art. Regarding claim 4, IM does not expressly a material of the reflective structures comprises epoxy resin, an ethylene compound, a benzoic acid, or a combination of at least two of the above materials. However, IM discloses (in at least [0013]-[0014]) the reflective structures comprises silver. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to replace silver reflective structures of IM with epoxy resin, an ethylene compound, a benzoic acid, or a combination of at least two of the above materials, since it has been held that simple substitution of one known element for another to obtain predictable results is obvious. Regarding claim 14, IM discloses (in at least fig. 3) the body of the second bank layer (BNK2) has a sidewall defining the second opening (see fig. 3), the sidewall comprises a first sub-sidewall and a second sub-sidewall opposite to each other (see fig. 3), the second light emitting device (ED) is spaced from the first sub-sidewall by a first distance (see fig. 3), the second light emitting device (ED) is spaced from the second sub-sidewall by a second distance (see fig. 3), but fails to disclose the first distance is greater than the second distance. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the display device of IM such that the second light emitting device is spaced from the first sub-sidewall by a first distance, the second light emitting device is spaced from the second sub-sidewall by a second distance, and the first distance is greater than the second distance, since it has been held that rearranging parts of an invention involves only routine skill in the art. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ELMITO BREVAL whose telephone number is (571)270-3099. The examiner can normally be reached M-Th~ 7:30-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James R. Greece can be reached at 571-272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. ELMITO BREVAL Primary Examiner Art Unit 2875 /ELMITO BREVAL/Primary Examiner, Art Unit 2875
Read full office action

Prosecution Timeline

Aug 17, 2023
Application Filed
Feb 11, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
87%
With Interview (+10.8%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 1380 resolved cases by this examiner. Grant probability derived from career allow rate.

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