Prosecution Insights
Last updated: April 19, 2026
Application No. 18/452,603

RESTORING STATES OF REAL TIME CLOCK DEVICES FOR MULTIPLE HOSTS

Final Rejection §103
Filed
Aug 21, 2023
Examiner
OTTO, ALAN
Art Unit
2132
Tech Center
2100 — Computer Architecture & Software
Assignee
Hewlett Packard Enterprise Development LP
OA Round
2 (Final)
66%
Grant Probability
Favorable
3-4
OA Rounds
3y 7m
To Grant
85%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allow Rate
244 granted / 368 resolved
+11.3% vs TC avg
Strong +19% interview lift
Without
With
+18.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
21 currently pending
Career history
389
Total Applications
across all art units

Statute-Specific Performance

§101
6.7%
-33.3% vs TC avg
§103
52.0%
+12.0% vs TC avg
§102
23.2%
-16.8% vs TC avg
§112
13.0%
-27.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 368 resolved cases

Office Action

§103
Detailed Action The instant application having Application No. 18/452,603 has a total of 23 claims pending in the application; there are 3 independent claims and 20 dependent claims, all of which are ready for examination by the examiner. This Office action is in response to the claims filed 11/10/25. Claims 1-23 are pending. NOTICE OF PRE-AIA OR AIA STATUS The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . REJECTIONS BASED ON PRIOR ART Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-7, 14 and 17-23 are rejected under 35 U.S.C. 103 as being unpatentable over Shih (U.S. Patent Application Publication No. 2008/0244301), herein referred to as Shih. in view of Pfeffer et al. (U.S. Patent Application Publication No. 2017/0353346), herein referred to as Pfeffer et al., and in view of Lambert et al. (U.S. Patent Application Publication No. 2021/0248038), herein referred to as Lambert et al. Referring to claim 1, Shih disclose as claimed, a method comprising: responsive to a primary power source being enabled, receiving, from a real time clock (RTC) device of a computer platform, an indication of a first time (see para. 26, where the RTC provides time values according to a specific clock); responsive to the primary power source being enabled, storing first data in a first non-volatile storage of the computer platform representing a snapshot of the first time and repeatedly updating the snapshot to cause the snapshot to track the first time (see fig. 5, showing storing data at T1, T2, T3 and T6 representing snapshots tracking times. There is no data stored when the power is off, but data is stored again in T6 as soon as the power is back on); responsive to the primary power source being disabled to begin a power outage, providing, by a timer of the computer platform powered by a secondary power source, a timer output representing an accumulated time corresponding to the power outage (see fig. 4, showing a timeline with a time when the power is shut off and the time the power is turned back on. The closest time previously before the power got shut off would be T3. Therefore T5-T3 would be the accumulated time. Also see para. 31-32); and restoring a state of the RTC device responsive to the primary power source being reenabled to end the power outage, wherein the restoring comprises: based on the accumulated time and the snapshot, determining a second time; and storing second data in the RTC device representing the second time (see para 31-32, where a second time is calculated based on the accumulated time and the snapshot, which would be T3. This is then stored in the RTC device). Shih discloses the claimed invention except for receiving, by a timer of the computer platform other than the RTC device, power from a secondary power source, wherein the RTC device does not receive power from the secondary power source; and initiating counting by the timer to cause the timer to prove a timer output representing an accumulated time corresponding to the power outage, wherein the state of the RTC device is corrupted responsive to the primary power source being disabled to begin the power outage. However, Lambert et al. disclose receiving, by a timer of the computer platform other than the RTC device, power from a secondary power source, wherein the RTC device does not receive power from the secondary power source (see fig. 2, showing an FPGA with an RTC which would be the RTC device. See para. 18-19, where the host RTC includes a battery and provides accurate real time clock information even without primary power. It is also used to update BMC RTC 192, which is used to update the FPGA RTC 210) wherein the state of the RTC device is corrupted responsive to the primary power source being disabled to begin the power outage (see para. 21-23, where the RTC device copies its clock information to hold registers during a power outage and therefore would be inaccurate and corrupted after the power outage when the hold registers are copied back). Shih and Lambert et al. are analogous art because they are from the same field of endeavor of real time clocks (see Shih, abstract and Lambert, abstract, regarding real time clocks). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Shih to receiving, by a timer of the computer platform other than the RTC device, power from a secondary power source, wherein the RTC device does not receive power from the secondary power source, wherein the state of the RTC device is corrupted responsive to the primary power source being disabled to begin the power outage, as taught by Lambert, in order to save power by not needing a backup power source in every RTC. Shih and Lambert et al. disclose the claimed invention except for initiating counting by the timer to cause the timer to prove a timer output representing an accumulated time corresponding to the power outage. However, Pfeffer et al. disclose initiating counting by the timer to cause the timer to prove a timer output representing an accumulated time corresponding to the power outage (see para. 50-53 and para. 93-94, where a power outage timer is started at the beginning of the power outage, and then the elapsed time is outputted from the value of the outage timer). Shih and Pfeffer et al. are analogous art because they are from the same field of endeavor of loss of power (see Shih, para. 13 and Pfeffer et al., abstract regarding loss of power). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Shih to comprise counting by the timer to cause the timer to prove a timer output representing an accumulated time corresponding to the power outage, as taught by Pfeffer, in order to determine the length of a power outage and use it for determining uptime (see Pfeffer et al., para. 96). As to claim 2, Shih, Lambert and Pfeffer et al. also disclose responsive to the primary source being enabled, storing third data in a second non-volatile storage of the computer platform representing content stored in a volatile memory of the RTC device, wherein restoring the state of the RTC device further comprises: reading the third data from the second non-volatile storage; and responsive to the reading, storing the third data in the volatile memory. (see Lambert, para. 21-22, where during a power loss, data from the RTC device’s volatile memory is copied to non-volatile storage, and then restoring the data back to the volatile memory when the power is restored). As to claim 3, Shih, Lambert and Pfeffer et al. also disclose the method of claim 1, wherein the first time comprises a first time-of-day and a first date before the beginning of the power outage, and the second time comprises a second time-of-day and a second date (see Shih, fig. 4, showing where T3 is right before the power outage and the second time would be the correct time after the power outage. See para. 7, where seconds, minutes, hours, days, and years are counted as an example. Para. 29-32 also list time values stored at various times and compared against each other. Therefore a standard time format is utilized). As to claim 4, Shih, Lambert and Pfeffer et al. also disclose responsive to the primary source being enabled, storing third data in a second non-volatile storage of the computer platform representing a snapshot of a first calendar date indicated by the RTC device, wherein restoring the state of the RTC device further comprises: reading the third data; responsive to the reading of the third data, determining an adjustment to be made to the calendar date based on the accumulated time to provide a second calendar date; and storing fourth data in the RTC device to cause the RTC device to indicate the second calendar date. (see Lambert, para. 21-22, where during a power loss, data from the RTC device’s volatile memory is copied to non-volatile storage, and then restoring the data back to the volatile memory when the power is restored. This is clock information, which when combined with Shih, which teaches calendar dates and updating the time on power restoration, would allow for saving the date in a second non-volatile storage during power loss and then restoring it). As to claim 5, Shih, Lambert and Pfeffer et al. also disclose the method of claim 1, wherein restoring the state of the RTC device further comprises: determining a format associated with the first time; and determining the second data based on the format (see Shih, para. 6-7, where the RTC time has a specific format. Para. 29-32 also list time values stored at various times and compared against each other. Therefore a standard time format is utilized. See para. 29 where the correct time value is calculated and used to set the RTC as well as being stored). As to claim 6, Shih, Lambert and Pfeffer et al. also disclose the method of claim 1, wherein the restoring further comprises: reading a first latched representation of the accumulated time; and determining the second time based on the first latched representation and the snapshot (see Shih, para. 31-32, where a latched representation of the accumulated time is read and a second time is determined based on the first representation of the time ). As to claim 7, Shih, Lambert and Pfeffer et al. also disclose the method of claim 6, wherein: the snapshot of the first time is one of a plurality of snapshots associated with the RTC device (see Shih, fig. 4, showing calibrations and time snapshots at different times); and the restoring further comprises: responsive to the reading of the first latched representation, reading first snapshot data from the non-volatile storage representing a first part of the plurality of snapshots; reading second snapshot data from the non-volatile storage representing a second part of the plurality of snapshots; reading a second latched representation of the accumulated time (see Shih, para. 29-32, where multiple time points may be read to calculate whether there is an error or the time is accurate); based on a comparison of the first latched representation and the second latched representation, determining whether the output of the timer changed between the reading of the first snapshot data and the reading of the second snapshot; and determining whether to repeat the reading of the first snapshot data and the reading of the second snapshot data based on a result of the comparison (data (see Shih, para. 29-32, where it is determined if there is an error, and if so, the time may be corrected. If the data is correct, than the second snapshot or time data may be re-read in the future when calculating for the next time. If its incorrect, then a new correct time and error is written instead). Referring to claim 14, Shih disclose as claimed, a computer platform comprising: a real time clock (RTC) device to provide a first time responsive to a primary power source being enabled (see para. 26, where the RTC provides time values according to a specific clock. See fig. 5, showing storing data at T1, T2, T3 and T6 representing snapshots tracking times. There is no data stored when the power is off, but data is stored again in T6 as soon as the power is back on); a non-volatile storage (see fig. 2, showing non-volatile memory 204); an update controller to, responsive to the primary power source being enabled, store data in the non-volatile storage representing a snapshot of the first time and repeatedly update the snapshot to cause the snapshot to track the first time (See fig. 5, showing storing data at T1, T2, T3 and T6 representing snapshots tracking times. There is no data stored when the power is off, but data is stored again in T6 as soon as the power is back on. See fig. 2, showing a processor, which would constitute an update controller); a timer to, responsive to the primary power source being disabled, provide an output representing an accumulated time corresponding to a primary power outage (see fig. 4, showing a timeline with a time when the power is shut off and the time the power is turned back on. The closest time previously before the power got shut off would be T3. Therefore T5-T3 would be the accumulated time. Also see para. 31-32); and a restore controller to, responsive to the primary power source being reenabled: sample the output of the timer to provide a sampled accumulated time; based on the sampled accumulated time and the snapshot, determine a second time; and cause the RTC device to be updated based on the second time (see fig. 2, showing a processor, which would constitute a restore controller. see para 31-32, where a second time is calculated based on the accumulated time and the snapshot, which would be T3. This is then stored in the RTC device to update the RTC device based on the second time and responsive to the power being restored). Shih discloses the claimed invention except for receiving, by a timer other than the RTC device, to receive power from a secondary power source; and initiating counting to provide an output representing an accumulated time corresponding to a primary power outage. However, Lambert et al. disclose receiving, by a timer other than the RTC device, to receive power from a secondary power source (see fig. 2, showing an FPGA with an RTC which would be the RTC device. See para. 18-19, where the host RTC includes a battery and provides accurate real time clock information even without primary power. It is also used to update BMC RTC 192, which is used to update the FPGA RTC 210). Shih and Lambert et al. are analogous art because they are from the same field of endeavor of real time clocks (see Shih, abstract and Lambert, abstract, regarding real time clocks). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Shih to receiving, by a timer of the computer platform other than the RTC device, power from a secondary power source, wherein the RTC device does not receive power from the secondary power source, wherein the state of the RTC device is corrupted responsive to the primary power source being disabled to begin the power outage, as taught by Lambert, in order to save power by not needing a backup power source in every RTC. Shih and Lambert et al. disclose the claimed invention except for initiating counting to provide an output representing an accumulated time corresponding to a primary power outage. However, Pfeffer et al. disclose initiating counting to provide an output representing an accumulated time corresponding to a primary power outage (see para. 50-53 and para. 93-94, where a power outage timer is started at the beginning of the power outage, and then the elapsed time is outputted from the value of the outage timer). Shih and Pfeffer et al. are analogous art because they are from the same field of endeavor of loss of power (see Shih, para. 13 and Pfeffer et al., abstract regarding loss of power). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Shih to comprise initiating counting to provide an output representing an accumulated time corresponding to a primary power outage, as taught by Pfeffer, in order to determine the length of a power outage and use it for determining uptime (see Pfeffer et al., para. 96). As to claim 17, Shih, Lambert and Pfeffer et al. also discloses the computer platform of claim 14, wherein the restore controller to further reset the timer responsive to the RTC device being updated (see Shih, para. 29, where the timer is reset on updates). As to claim 18, Shih, Lambert and Pfeffer et al. also disclose the computer platform of claim 14, wherein the update controller is disabled responsive to the primary power source being reenabled, and the restore controller to further enable the update controller responsive to the RTC device being updated (see Shih et al., para. 29-32, where on power being re-enabled, the RTC device is updated with the correct time by the processor or restore controller. The updates are stopped until the RTC device is updated). As to claim 19, Shih, Lambert and Pfeffer et al. also disclose the computer platform of claim 14, wherein: the RTC device to further provide data representing a first calendar day; the first time corresponds to rotational cycles of the Earth (see Shih et al., para. 6-7, where an example is given of where the RTC device may provide seconds, minutes, hours, days and years, which would correspond to the rotational cycle); the update controller to further, responsive to the primary power source being enabled, store data in the non-volatile storage representing a snapshot of the calendar day (see Shih et al., fig. 4 and para.29, where the correct time value gets stored on calibration); and the restore controller to, responsive to the primary power source being reenabled: based on the sampled accumulated time and the snapshot, determine a second calendar day; and cause the RTC device to be updated based on the second calendar day (see Shih et al., para. 29-32, where when the power source is re-enabled, the correct time is calculated and updated. If it is a different day, then the new day would be determined and used). As to claim 20, Shih, Lambert and Pfeffer et al. also disclose wherein the RTC device comprising a volatile memory to store configuration data for the computer platform; the update controller to, responsive to the primary power source being enabled, store data in the non-volatile storage representing a snapshot of the configuration data; the restore controller to further, responsive to the primary power source being reenabled, read data representing the snapshot of the configuration data and cause the data representing the snapshot of the configuration data to be stored in the volatile memory of the RTC device. (see Lambert, para. 21-22, where during a power loss, data from the RTC device’s volatile memory is copied to non-volatile storage, and then restoring the data back to the volatile memory when the power is restored. When combined with Shih, this would allow copying the configuration data to non-volatile storage in the event of a power loss, and then restoring it when power is restored). As to claim 21, Shih, Lambert and Pfeffer et al. also disclose the method of claim 1, further comprising: resetting the timer output responsive to completion of the restoring of the state (see Pfeffer et al., para. 50-53 and 93-94 where the outage timer measures the duration of the outage and is started at the beginning and stopped at the end. At the end of each outage, the outage duration is set to the value of the outage timer, and therefore the timer must be reset every time to properly measure the next outage). As to claim 22 Shih, Lambert and Pfeffer et al. also disclose the method of claim 1, further comprising: resetting the timer output responsive to the end of the power outage (see Pfeffer et al., para. 50-53 and 93-94 where the outage timer measures the duration of the outage and is started at the beginning and stopped at the end. At the end of each outage, the outage duration is set to the value of the outage timer, and therefore the timer must be reset every time to properly measure the next outage). As to claim 23, Shih, Lambert and Pfeffer et al. also disclose the computer platform of claim 14, wherein: the RTC device does not receive power from the secondary power source; and a state of the RTC device is corrupted responsive to the primary power source being disabled to begin the power outage (see Lambert, para. 21-23, where the RTC device copies its clock information to hold registers during a power outage and therefore would be inaccurate and corrupted after the power outage when the hold registers are copied back). Claims 8-10 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Kashtan et al. (U.S. Patent Application Publication No. 2022/0137995), herein referred to as Kashtan et al. in view of Lambert et al. (U.S. Patent Application Publication No. 2021/0248038), herein referred to as Lambert et al. Referring to claim 8, Kashtan et al. disclose as claimed, a computer platform comprising: a plurality of resources to provide a plurality of hosts, wherein each host of the plurality of hosts is associated with a logical computer platform instance (see fig. 1, showing multiple hosts or virtual devices and associated with a logical computer platform instance. Fig. 1 also shows a plurality of resources for those virtual machines); and a management controller comprising a semiconductor package, wherein the semiconductor comprises: a hardware processor to provide management services for the plurality of hosts (see para. 38-42, where a RTC module, a device module and synchronization module may be integrated together and are implemented in hardware and used to manage the time with the virtual machines/hosts.); and a plurality of hardware real time clock (RTC) devices to provide a plurality of RTC instances (see para. 39-40, where there are multiple RTC devices utilized for different hosts. Also see para.28). Kashtan et al. disclose the claimed invention except where the management controller is a baseboard management controller. However, Lambert et al. disclose where the management controller is a baseboard management controller (see abstract and para. 10-12, where the management controller is a baseboard management controller). Kashtan et al. and Lambert et al. are analogous art because they are from the same field of endeavor of real time clocks (see Kashtan et al., abstract and Lambert, abstract, regarding real time clocks). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kashtan et al. to comprise where the management controller is a baseboard management controller, as taught by Lambert, in order to be able to remotely monitor and administer a hardware system (see para. 12, regarding advantages of a baseboard management controller). As to claim 9 , Kashtan et al. and Lambert also disclose the computer platform of claim 8, wherein a given RTC instance of the plurality of RTC instances measures time for the management controller (see Kashtan et al., para. 38-42, where the device module obtains time from a specific RTC device). As to claim 10 , Kashtan et al. and Lambert also disclose the computer platform of claim 8, wherein a given RTC instances of the plurality of RTC instances corresponds to a given host (see Kashtan et al., para. 44, where each RTC device may have a list of virtual devices it is associated with). As to claim 13 , Kashtan et al. and Lambert also disclose the computer system of claim 8, wherein the RTC devices operate independently from each other in respective time domains (see Kashtan et al., para. 39, where different RTC devices may be used for a virtual machine and a reference time from an external device/service may be used). Claims 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Kashtan et al. in view Lambert et al. and in view of Shih. As to claim 11, Kashtan et al. and Lambert disclose the claimed invention except for the computer platform of claim 8, further comprising: a back-up system to maintain snapshots of states of the RTC devices and restore responsive to a primary power, maintain the snapshots responsive to an outage of the primary power, and update the states of the RTC devices responsive to primary power being restored. However, Shih discloses a back-up system to maintain snapshots of states of the RTC devices and restore responsive to a primary power, maintain the snapshots responsive to an outage of the primary power, and update the states of the RTC devices responsive to primary power being restored. (see fig. 5, showing storing data at T1, T2, T3 and T6 representing snapshots tracking times. See para. 29-32, where the status and time of an RTC device is updated after primary power is restored). Kashtan et al. and Shih are analogous art because they are from the same field of endeavor of real time clocks (see Kashtan et al., abstract and Shih, abstract, regarding real time clocks). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Kashtan et al. to comprise a back-up system to maintain snapshots of states of the RTC devices and restore responsive to a primary power, maintain the snapshots responsive to an outage of the primary power, and update the states of the RTC devices responsive to primary power being restored, as taught by Shih, in order to be able to restore the time in case of power loss. As to claim 12, Kashtan et al., Lambert et al. and Shih also disclose the computer platform of claim 11, wherein the power outage corrupts the states of the RTC devices, the back-up system further comprises a timer to measure a time interval corresponding to the power outage, and the back-up system restores the states based on the time interval and the snapshots (see Shih, para. 29-32, where the back-up system restores the RTC state based on the time intervale and previous calibration snapshots). Claims 15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Shih in view of Lambert and Pfeffer et al., and in view of Pindi (U.S. Patent Application Publication No. 2010/0220558), herein referred to as Pindi. As to claim 15, Shih, Lambert and Pfeffer et al. disclose the claimed invention except for the computer platform of claim 14, further comprising: a stored energy source to provide secondary power associated with a secondary power domain, wherein: the primary power source to provide primary power associated with a primary power domain; and the update controller, the restore controller and the RTC device are part of the secondary power domain. However, Pindi. disclose a stored energy source to provide secondary power associated with a secondary power domain, wherein: the primary power source to provide primary power associated with a primary power domain; and the update controller, the restore controller and the RTC device are part of the secondary power domain. (see fig. 1, showing a backup battery as a secondary power source and a secondary power domain. See a power supply 14, which would be the primary power domain. See fig. 1, showing that the RTC and its components may be powered by both the primary and secondary power domain). Shih and Pindi are analogous art because they are from the same field of endeavor of real time clocks (see Shih, abstract, and Pindi, abstract regarding real time clocks). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Shih to comprise a stored energy source to provide secondary power associated with a secondary power domain, wherein: the primary power source to provide primary power associated with a primary power domain; and the update controller, the restore controller and the RTC device are part of the secondary power domain, as taught by Pindi, in order to be continue powering the RTC device in the event of a power loss. Backup power sources are well known in the art and it would be obvious to include one with Shih. As to claim 16, Shih, Lambert and Pfeffer et al. disclose the claimed invention except for the computer platform of claim 14, further comprising: shadow registers, wherein the shadow registers are part of the secondary power domain, wherein the restore controller, responsive to the primary power source being enabled: write shadow data representing a restored state of the RTC device to the shadow registers, wherein the shadow data includes data representing the second time; and responsive to completion of the writing of the shadow data, cause content of the shadow registers to be transferred to the RTC device. However, Pindi. disclose shadow registers, wherein the shadow registers are part of the secondary power domain, wherein the restore controller, responsive to the primary power source being enabled: write shadow data representing a restored state of the RTC device to the shadow registers, wherein the shadow data includes data representing the second time; and responsive to completion of the writing of the shadow data, cause content of the shadow registers to be transferred to the RTC device (see fig. 1, showing shadow registers as part of an RTC device. A backup battery 22 would be a secondary power source and a secondary power domain. See a power supply 14, which would be the primary power domain. See fig. 1, showing that the RTC and its components may be powered by both the primary and secondary power domain. See para. 35, where snapshots of time are written to the shadow registers and then copied to the counters). Shih and Pindi are analogous art because they are from the same field of endeavor of real time clocks (see Shih, abstract, and Pindi, abstract regarding real time clocks). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Shih to comprise shadow registers, wherein the shadow registers are part of the secondary power domain, wherein the restore controller, responsive to the primary power source being enabled: write shadow data representing a restored state of the RTC device to the shadow registers, wherein the shadow data includes data representing the second time; and responsive to completion of the writing of the shadow data, cause content of the shadow registers to be transferred to the RTC device, as taught by Pindi, in order to be continue powering the RTC device in the event of a power loss. Backup power sources are well known in the art and it would be obvious to include one with Shih. CLOSING COMMENTS Conclusion a. STATUS OF CLAIMS IN THE APPLICATION The following is a summary of the treatment and status of all claims in the application as recommended by M.P.E.P. 707.07(i): a(1) CLAIMS REJECTED IN THE APPLICATION Per the instant office action, claims 1-23 stand rejected. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. b. DIRECTION OF FUTURE CORRESPONDENCES Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALAN OTTO whose telephone number is (571)270-1626. The examiner can normally be reached M-F 8:30AM-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hosain Alam can be reached at 571-272-3978. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /A.O/ Examiner, Art Unit 2132 /HOSAIN T ALAM/ Supervisory Patent Examiner, Art Unit 2132
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Prosecution Timeline

Aug 21, 2023
Application Filed
Aug 09, 2025
Non-Final Rejection — §103
Nov 07, 2025
Examiner Interview Summary
Nov 07, 2025
Applicant Interview (Telephonic)
Nov 10, 2025
Response Filed
Jan 27, 2026
Final Rejection — §103 (current)

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3-4
Expected OA Rounds
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85%
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3y 7m
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Based on 368 resolved cases by this examiner. Grant probability derived from career allow rate.

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